System Timing Diagrams

T-State:
— One clock period is referred to as a T-State

T-State
— An operation takes an integer number of T-States

CPU Bus Cycle:

— A bus cycle consists of 4 or more T-States

T1 T2 T3 T4

TE/EXTC/V/MPI 9
 Wait and Idle States
• Idle State
– No bus activity required
– Each is 1 clock period long
– Occurs when instruction queue is full or the MPU does
not need to read/write to memory
• Wait State
– Triggered by events external to MPU
– Buffer full will trigger a wait state
– Triggered by READY pin
– Inserted between T3 and T4

TE/EXTC/V/MPI 10
 Memory Segmentation

.
 Physical Address

 Base Address

 Offset

 Effective Address

 Use of segment
registers, and
pointers TE/EXTC/V/MPI 16
 Stack Addressing

 The 8086 let you set aside an entire 64Kb

segment as a stack.
 The upper 16 bits of the starting address for
this segment are kept in the stack segment
register.
 The stack pointer register holds the offset (16
bit).
 The memory location where a word was most
recently stored is called the top of stack.
TE/EXTC/V/MPI 17
 Stack Addressing

 The physical address for a stack read or a stack

write is produced by adding the contents of the
stack pointer register to the stack segment
register.
 Example:
SS = 5000H * 10H = 50000H
SP = FFE0H
SS + SP = 50000H + FFE0H
= 5FFE0H
TE/EXTC/V/MPI 18
 Minimum and Maximum Modes

The minimum mode is selected by applying logic

1 to the MN / MX# input pin. This is a single
microprocessor configuration.

The maximum mode is selected by applying

logic 0 to the MN / MX# input pin. This is a multi
micro processors configuration.

TE/EXTC/V/MPI 19
Difference : Min and Max mode

TE/EXTC/V/MPI 20
 Minimum Mode Interface

When the Minimum mode operation is selected, the 8086

provides all control signals needed to implement the memory
and I/O interface.
The minimum mode signal can be divided into the following
basic groups : address/data bus, status, control, interrupt and
DMA.
Address/Data Bus : these lines serve two functions. As an
address bus is 20 bits long and consists of signal lines A 0
through A19. A19 represents the MSB and A0 LSB. A 20bit address
gives the 8086 a 1Mbyte memory address space. More over it
has an independent I/O address space which is 64K bytes in
length.

TE/EXTC/V/MPI 21
8086 Minimum-Mode Signals
Power supply

Vcc GND

INTR Address / data bus

AD0-AD15,
_____ A16/S3-A19/S6
INTA

Interrupt _____
interface TEST ALE
____
BHE/S7
NMI
8086 MPU M/IO’
RESET DT/R’
Memory/IO
___
controls
RD
HOLD ___
DMA WR
interface HLDA ____
DEN

READY
Mode
Select MN/MX’

CLK
TE/EXTC/V/MPI 22
System Clock Generator-8284

TE/EXTC/V/MPI 23
8086 Minimum-Mode

TE/EXTC/V/MPI 24
Read/Write Cycle Timing Diagram for Minimum Mode

T1 T2 T3 TW T4 T1

ALE

BHE S7 – S3
ADD / STATUS A19 – A16

ADD / DATA A15 – A0 Valid data D 15 – D0

WR

DEN

DT / R
TE/EXTC/V/MPI 25
TE/EXTC/V/MPI 26
 T1 T2 T3 TW T4

CLK

M/IO

ALE
MEMORY ACCESS TIME
ADDR/ RESERVED FOR VALID
A15-A0
DATA DATA D15-D0

ADDR/
A19-A16
STATUS
RD/INTA
READY
DT/R
DEN
TE/EXTC/V/MPI 27
 T1 T2 T3 TW T4

CLK

M/IO

ALE
ADDR/
A15-A0 DATA OUT (D15-D0)
DATA
ADDR/
A19-A16
STATUS
WR
READY
DT/R
DEN
TE/EXTC/V/MPI 28
 8086
Microprocessor Pins and Signals Min/ Max Pins

The 8086 microprocessor can work in two

modes of operations : Minimum mode and
Maximum mode.

In the minimum mode of operation the

microprocessor do not associate with any
co-processors and can not be used for
multiprocessor systems.

In the maximum mode the 8086 can work

in multi-processor or co-processor
configuration.

Minimum or maximum mode operations

are decided by the pin MN/ MX(Active low).

When this pin is high 8086 operates in

minimum mode otherwise it operates in
Maximum mode.

29
 8086
Microprocessor Pins and SignalsMinimum mode signals

(Data Transmit/ Receive) Output signal from the

processor to control the direction of data flow through
the data transceivers

(Data Enable) Output signal from the processor used as

out put enable for the transceivers

ALE (Address Latch Enable) Used to demultiplex the address

and data lines using external latches

Used to differentiate memory access and I/O access. For

memory reference instructions, it is high. For IN and OUT
instructions, it is low.

Write control signal; asserted low Whenever processor

writes data to memory or I/O port

(Interrupt Acknowledge) When the interrupt request is

accepted by the processor, the output is low on this line.

30
 8086
Microprocessor Pins and SignalsMinimum mode signals

HOLD Input signal to the processor form the bus masters as a

request to grant the control of the bus.

Usually used by the DMA controller to get the control of

the bus.

HLDA (Hold Acknowledge) Acknowledge signal by the processor

to the bus master requesting the control of the bus
through HOLD.

The acknowledge is asserted high, when the processor

accepts HOLD.

31
 8086
Microprocessor Pins and SignalsMaximum mode signals

Status signals; used by the 8086 bus controller to

generate bus timing and control signals. These are
decoded as shown.

32
 8086
Microprocessor Pins and SignalsMaximum mode signals

(Queue Status) The processor provides the status of

queue in these lines.

The queue status can be used by external device to track

the internal status of the queue in 8086.

The output on QS0 and QS1 can be interpreted as shown

in the table.

33
 8086
Microprocessor Pins and SignalsMaximum mode signals

34
 Maximum Mode Interface
 When the 8086 is set for the maximum-mode configuration, it provides
signals for implementing a multiprocessor / coprocessor system
environment.

 By multiprocessor environment we mean that one microprocessor

exists in the system and that each processor is executing its own
program.

 Usually in this type of system environment, there are some system

resources that are common to all processors.

 They are called as global resources. There are also other resources that
are assigned to specific processors. These are known as local or private
resources.
TE/EXTC/V/MPI 35
Bus Controller - 8288

TE/EXTC/V/MPI 36
TE/EXTC/V/MPI 37
8086 Maximum Mode System

TE/EXTC/V/MPI 38
TE/EXTC/V/MPI 39
 Memory Read Timing in Maximum mode.

One bus cycle

T1 T2 T3 T4 T1
Clk

ALE

S2 – S 0 Inactive
Active Active

Add/Status BHE, A 19 – A 16 S7 – S3

Add/Data A 15 – A 0 D 15 – D 0

MRDC

DT / R

DEN
TE/EXTC/V/MPI 40
 Memory Write Timing in Maximum mode.

One bus cycle

T1 T2 T3 T4 T1

Clk

ALE

S2 – S0 Active Inactive Active

ADD/STATUS BHE S7 – S3

ADD/DATA A15-A0 Data out D 15 – D0

AMWC or
AIOW C
MWTC or IOWC

DT / R high
DEN

TE/EXTC/V/MPI 41
Assembler directives
 8086
Microprocessor Assemble Directives

Instructions to the Assembler regarding the program being executed.

Control the generation of machine codes and organization of the program; but no
machine codes are generated for assembler directives.

Also called ‘pseudo instructions’

Used to :
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/ output data
› define start and end of segments, procedures, macros etc..

43
 8086
Microprocessor Assemble Directives

DB Define Byte

DW Define a byte type (8-bit) variable

SEGMENT Reserves specific amount of memory locations to each

ENDS variable

ASSUME Range : 00H – FFH for unsigned value; 00H – 7FH for
positive value and 80H – FFH for negative value
ORG
END
EVEN General form : variable DB value/ values
EQU

PROC
FAR Example:
NEAR LIST DB 7FH, 42H, 35H
ENDP
Three consecutive memory locations are reserved for
SHORT the variable LIST and each data specified in the
instruction are stored as initial value in the reserved
MACRO memory location
ENDM 44
 8086
Microprocessor Assemble Directives

DB Define Word

DW Define a word type (16-bit) variable

SEGMENT Reserves two consecutive memory locations to each variable

ENDS
Range : 0000H – FFFFH for unsigned value;
ASSUME
0000H – 7FFFH for positive value and 8000H – FFFFH
ORG for negative value
END
EVEN General form : variable DW value/ values
EQU

PROC
FAR Example:
NEAR ALIST DW 6512H, 0F251H, 0CDE2H
ENDP
Six consecutive memory locations are reserved for
SHORT the variable ALIST and each 16-bit data specified in
the instruction is stored in two consecutive memory
MACRO location.
ENDM 45
 8086
Microprocessor Assemble Directives

DB SEGMENT : Used to indicate the beginning of a code/ data/

stack segment
DW
ENDS : Used to indicate the end of a code/ data/ stack
SEGMENT segment
ENDS
General form:
ASSUME

ORG
END Segnam SEGMENT
EVEN …
… Program code
EQU … or
… Data Defining Statements
…
PROC …
FAR
Segnam ENDS
NEAR
ENDP

SHORT

MACRO User defined name of the

segment
ENDM 46
 8086
Microprocessor Assemble Directives

DB Informs the assembler the name of the

program/ data segment that should be used
DW for a specific segment.

SEGMENT General form:

ENDS
ASSUME segreg : segnam, .. , segreg : segnam
ASSUME

ORG
User defined name of the
END Segment Register
segment
EVEN
EQU

PROC Example:
FAR
NEAR ASSUME CS: ACODE, DS:ADATA Tells the compiler that the instructions of the
program are stored in the segment ACODE and
ENDP data are stored in the segment ADATA

SHORT

MACRO
ENDM 47
 8086
Microprocessor Assemble Directives
ORG (Origin) is used to assign the starting address
DB
(Effective address) for a program/ data segment

DW END is used to terminate a program; statements

after END will be ignored
SEGMENT
ENDS EVEN : Informs the assembler to store program/
data segment starting from an even address
ASSUME
EQU (Equate) is used to attach a value to a
variable
ORG
Examples:
END
EVEN ORG 1000H Informs the assembler that the statements following ORG
1000H should be stored in memory starting with effective
EQU address 1000H

PROC
FAR LOOP EQU 10FEH Value of variable LOOP is 10FE H
NEAR
ENDP
_SDATA SEGMENT In this data segment, effective address of memory location
ORG 1200H assigned to A will be 1200 H and that of B will be 1202 H and
SHORT A DB 4CH 1203H.
EVEN
B DW 1052H
MACRO _SDATA ENDS
ENDM 48
 8086
Microprocessor Assemble Directives
PROC Indicates the beginning of a procedure
DB
ENDP End of procedure
DW
FAR Intersegment call
SEGMENT
ENDS NEAR Intrasegment call

General form
ASSUME

ORG procname PROC[NEAR/ FAR]

END
…
EVEN … Program statements of the procedure
EQU …
Last statement of the procedure
RET
PROC
ENDP procname ENDP
FAR
NEAR

SHORT User defined name of the

procedure
MACRO
ENDM 49
 8086
Microprocessor Assemble Directives

DB
Examples:
DW

SEGMENT ADD64 PROC NEAR The subroutine/ procedure named ADD64 is declared as
NEAR and so the assembler will code the CALL and RET
ENDS … instructions involved in this procedure as near call and
… return
…
ASSUME
RET
ADD64 ENDP
ORG
END
EVEN
EQU CONVERT PROC FAR The subroutine/ procedure named CONVERT is declared as
FAR and so the assembler will code the CALL and RET
… instructions involved in this procedure as far call and return
…
PROC …
ENDP
RET
FAR CONVERT ENDP
NEAR

SHORT

MACRO
ENDM 50
 8086
Microprocessor Assemble Directives

DB Reserves one memory location for 8-bit

signed displacement in jump instructions
DW
Example:
SEGMENT
ENDS

ASSUME JMP SHORT AHEAD The directive will reserve one memory location
for 8-bit displacement named AHEAD

ORG
END
EVEN
EQU

PROC
ENDP
FAR
NEAR

SHORT

MACRO
ENDM 51
 8086
Microprocessor Assemble Directives

DB MACRO Indicate the beginning of a macro

DW ENDM End of a macro

SEGMENT General form:

ENDS
macroname MACRO[Arg1, Arg2 ...]
ASSUME Program statements in
… the macro
ORG …
…
END
EVEN macroname ENDM
EQU

PROC
ENDP
FAR
NEAR User defined name of the macro

SHORT

MACRO
ENDM 52
 To write an assembly language program to perform division of
16-bit unsigned number by 8-bit unsigned number.

.MODEL SMALL
DATA SEGMENT
OPR1 DW 2C58H
OPR2 DB 56H
RESQ DB ?
RESR DB ?
DATA ENDS

ASSUME CS : CODE, DS : DATA

CODE SEGMENT
START:MOV AX, DATA
MOV DS, AX
MOV AX, OPR1
DIV OPR2
MOV RESQ, AL
MOV RESR, AH
MOV AH, 4CH
INT 21H
CODE ENDS
END START
53
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