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CPE11 IHDL Module 1

This document introduces Hardware Description Languages (HDLs), which are used to describe the behavior and structure of digital circuits. It compares two leading HDLs, Verilog and VHDL, highlighting their origins, syntax, and ease of learning. The document also discusses different modeling levels in HDL, including behavioral, gate-level, and dataflow modeling, along with examples and the use of simulators.

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Cronica Joy Tayting
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5 views18 pages

CPE11 IHDL Module 1

This document introduces Hardware Description Languages (HDLs), which are used to describe the behavior and structure of digital circuits. It compares two leading HDLs, Verilog and VHDL, highlighting their origins, syntax, and ease of learning. The document also discusses different modeling levels in HDL, including behavioral, gate-level, and dataflow modeling, along with examples and the use of simulators.

Uploaded by

Cronica Joy Tayting
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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INTRODUCTION

TO HDL
MODULE 1
Introduction to Hardware Description
Language Programming
What is HDL?
● Hardware description language describes the hardware of
digital systems in textual form. It is a programming language
used to describe the behavior or structure of digital circuits
(ICs) and electronic circuits.

● Simulation of designs before fabrication.

● With the advent of Very large-scale integration (VLSI) which


is the process of creating an integrated circuit (IC) by
combining thousands of transistors into a single chip, it is not
possible to verify a complex design with millions of gates on a
breadboard, HDLs came into existence to verify the
functionality of these circuits.

● Two leading HDLs: Verilog and VHDL


3
Verilog vs VHDL
Verilog
● Introduced in 1985 by Gateway Design System Corporation, now a
part of Cadence Design System, Inc.’s Systems Division.
● Became an IEEE Standard in 1995.
● Syntax based on C Programming Language.
● Easier to learn.
VHDL (“V” short for VHSIC)
● Very High Speed Integrated Circuits (VHSIC) - was a United States
Department of Defense (DOD) research program that ran from 1980
to 1990. Its mission was to research and develop very high-speed
integrated circuits for the United States Armed Forces.
● Designed for and sponsored by US Department of Defense.
● Designed by committee (1981-1985).
● Became an IEEE Standard in 1987.
● Syntax based on Ada Programming Language.

4
An Example of HDL Code

5
Programming Languages vs
Hardware Description Languages
● Statements in HDL code involve parallel operation, whereas
programming languages represent sequential operation.

● When we write a computer program or firmware module, we


understand that the processor will execute lines of code one
at a time, following the top-to-bottom organization that we
use when reading text on a page.

● In HDL code, we are describing digital hardware and separate


portions of this hardware can operate simultaneously,
despite the fact that the corresponding lines of code are
written using a top-to-bottom organization.
:

6
HDL Simulators

There are many logic simulators used for HDL.


Most commonly used are:

● ModelSim
● Xilinx
● Veriwell

7
In HDL, a module can be defined using
various levels of abstraction. There are
four levels of abstraction in HDL. They
are:

 Behavioral or algorithmic level


 Data flow level
 Gate level
 Switch level

8
What is Behavioral Modeling?
● The behavioral modeling style
is a higher abstraction in the
entire saga of HDL
programming. By higher
abstraction, what is meant is
that the designer only needs
to know the algorithm of the
circuit to code it.
● Hence, this modeling style is
also occasionally referred to
as an algorithmic modeling
style. The designer does not
need to know the gate-level 9
Behavioral Modeling Example:

10
What is Gate Level Modeling?
Modeling done at
this level is usually
called gate level
modeling as it
involves gates and
has a one to one
relation between a
hardware schematic
and the HDL code.

11
Gate Level Modeling Example:

12
What is Dataflow Modeling?
Dataflow
modeling provides the
means of describing
combinational circuits by
their function rather than
by their gate
structure. Dataflow
modeling uses a number
of operators that act on
operands to produce the
desired results.
13
Dataflow Operators

14
Dataflow Modeling Example:

15
Link for Video Installation

● ModelSim - https://youtu.be/cu4G8RjEMf4

16
Self-Assessment Questionnaire (SAQ
1)
1. Do you think the utilization of
HDL is an advantage or
disadvantage? Why? (5pts.)

2. What language do you prefer to


use in HDL? Verilog or VHDL?
Why? (5pts.)

3. Differentiate Behavioral, Gate-


Level and Dataflow Modeling.
(10pts.)

17
Thank you!

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