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8086 & 8085 Microprocessor.: 8255 Is A Programmable Peripheral Interface Device

The document describes the 8255 Programmable Peripheral Interface (PPI), which connects I/O devices to microprocessors like the 8086 and 8085, facilitating communication through various operational modes. It details the pin configuration, operational modes (including Bit Set-Reset and I/O modes), and the interfacing process with the 8086 microprocessor. The 8255 PPI is essential for managing data transmission and handshaking between the CPU and external devices.

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16 views13 pages

8086 & 8085 Microprocessor.: 8255 Is A Programmable Peripheral Interface Device

The document describes the 8255 Programmable Peripheral Interface (PPI), which connects I/O devices to microprocessors like the 8086 and 8085, facilitating communication through various operational modes. It details the pin configuration, operational modes (including Bit Set-Reset and I/O modes), and the interfacing process with the 8086 microprocessor. The 8255 PPI is essential for managing data transmission and handshaking between the CPU and external devices.

Uploaded by

neethuj.aaps
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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• Connecting I/O devices with the processor’s data bus is not

possible directly.
• So in its place, there must be some device to which I/O ports
must connect I/O devices like 8255 PPI.
• This processor is from the Family of MCS-85, which Intel
designed, and it can be used with an 8086 & 8085
microprocessor.
• The 8255 is a Programmable peripheral interface device used to
achieve the basic communication method between the
microprocessor & machines.
• It is a peripheral device used for a machine programmed to
perform as an interface.
• This 8255 PPI is an interface between the microprocessors and
the I/O devices.
• 8255 microprocessor is a popularly used programmable
peripheral interface or PPI chip.
• The function of the 8255 microprocessor is to transmit data in
various conditions, from simple I/O to interrupted I/O.
• This microprocessor is also designed to interface the CPU with
its external world, such as ADC, keyboard, DAC, etc.
• This PPI is economical, functional, and flexible and thus can be
used with any microprocessor.
• So this peripheral device is also called an I/O device because the
I/O ports of this PPI are used for connecting I/O devices.
• This processor includes three 8-bit bidirectional I/O ports, which
can be configured based on necessity.
PA7 to PA0 (PortA Pins)
The PA7 to PA0 are Port A data line pins (1 to 4 & 37 to 40) distributed equally on two sides of
the top of the microprocessor. These eight port A pins work as either buffered input lines or
latched output based on the loaded control word into the control word register.
PB0 to PB7 (Port B Pins)
The PB0 to PB7 from 18 to 25 are the data line pins that carry the port B data.
PC0 to PC7 (Port C Pins)
PC0 to PC7 pins are port C pins, which include pin10 to pin17, which carry the port A data bits.
From there, pins 10 – pin13 are known as Port C upper pins & pin14 to pin17 are known as
lower pins. The pins from these two sections can be used individually to transmit 4 data bits
using two separate port C parts.
D0 to D7 (Data bus pins)
These D0 to D7 pins are data I/O lines which include 27-pin to 34-pin. These pins are used to
carry the 8-bit binary code and are utilized to train the entire IC work. These pins are jointly
known as the control register/control word which holds the data of the control word.
A0 & A1
A0 and A1 pins at pin8 & pin9 simply decide which port will be preferred for transmitting the
data.
If A0 = 0 & A1=0 then Port-A is selected.
If A0 = 0 & A1=1 then Port-B is selected.
If A0 = 1 & A1=0 then Port-C is selected.
If A0 = 1 & A1=1 then the control register is selected.
CS’
Pin 6, is a chip select input pin responsible for choosing a chip. A low signal at
the CS’ pin allows communication between the 8255 & the processor, which
means at this pin, the operation of data transfer gets allowed by an active low
signal.
RD’
Pin5, RD’, is a read input pin that puts the chip in reading mode. A low signal at
this RD’s pin provides data to the CPU by a data buffer.
WR’
The pin36 is the WR pin, a write input pin that puts the chip within writing mode.
So, a low signal at WR’s pin allows the CPU to execute the write operation
above the ports; otherwise, the microprocessor’s control registers through the
data bus buffer.
RESET
The pin35 is the RESET pin, which resets the data available in all the keys to
their default values when in set mode. It is an active high signal where the high
signal at the RESET pin clears the control registers &the ports are placed within
the input mode.
 It comprises 40 pins and operates in a +5V regulated
power supply.
 Port C is further divided into two 4-bit ports, i.e., port C
lower and port C upper, and port C can work in either
BSR (bit set reset) mode or in mode 0 of input-output
mode of 8255.
 Port B can work in either mode 0 or mode 1 of input-
output mode.
 Port A can work either in mode 0, mode 1, or mode 2 of
input-output mode.
 It has two control groups, control group A and control

group B.
 Control group A consists of port A and port C upper.

 Control group B consists of port C lower and port B.

 Depending upon the CS’, A1, and A0 values, we can

select different ports in different modes as an input-

output function or BSR.


 This is done by writing a suitable word in the control

register (control word D0-D7).


8255 Microprocessor Operating Modes
The 8255 microprocessor has two operating modes, Bit Set-Reset
Mode and Input/Output mode.

Bit Set-Reset Mode


• Bit set-reset mode is mainly utilized to set/reset only the Port-C
bits.
• This operating mode only affects one bit of Port C.
• Once the user sets the bit, it stays set until it is unset by the user.
• The user requires loading the bit pattern within the control
register to modify the bit.
• Once port C is used for status/ control operation, send an OUT
instruction, and every port C bit can be set/reset.
I/O Mode
I/O mode has three different modes like Mode 0, Mode 1 & Mode 2.
Mode 0:
This I/O mode in 8255 allows each port’s programming, such as an I/P or
an O/P port. So, the I/O feature of this mode includes:
•The I/P ports are buffered whenever O/P is latched.
•It does not support interrupt capability/ handshaking.
Mode 1:
Mode 1 of 8255 is I/O with handshaking, so in this mode, Port A & Port B
ports are used as I/O ports, whereas Port C is used for handshaking. So,
this mode supports handshaking by the programmed ports as either I/P
or O/P mode. Handshaking signals are mainly used to synchronize data
transfer between two devices at different speeds. The inputs & outputs
in this mode are latched, and this mode can also interrupt handling &
signal control to match the CPU & I/O device’s speed.
Mode 2:
Mode 2 is a Bidirectional I/O port with handshaking. So, the ports in
this mode can be used for the bidirectional data flow through
handshaking signals. The group A pins can be programmed to
perform like bidirectional data bus & PC7 – PC4 in port C are used
through the handshaking signal. The remaining lower port C bits are
used for Input/Output operations. This mode can handle interrupts.
8255 PPI Interfacing with 8086
The need for interfacing the 8255 PPI with the 8086 microprocessor
is that the 8086 microprocessor triggers the input RD pin of 8255
once it needs to read the available data within an 8255 port. For 8255,
It is an active low I/P pin. This pin is connected to the WR O/P of the
8086 microprocessor. The 8086 microprocessor triggers the WR I/P
of 8255 once it needs to write data toward a port of 8255.

8255 transfers data with an 8-bit data bus to the 8086


microprocessor. The serial communication protocol is used for
communication between 8086 & 8255. The two address lines, A1 &
A0, are utilized to make inside selections within 8255. The data bus
pins 8255, like D0 to D7, are connected to 8086 microprocessor’s
data lines, read input pin RD & write input pin WR are connected to
I/O read and I/O write of 8086.
They have four main ports to select PA, PB, PC & control word. These ports are
mainly used for transferring data, and the control word is chosen to send
signals. Two signals are sent to 8255 like the I/O signal and BSR signal. The I/O
signal is used for initializing the mode & direction of the ports, whereas BSR is
useful for setting and resetting a signal line.
In the following device, assume the device connected to be an input device. At
first, this device looks for permission from PPI to transmit data.

8255 PPI Interfacing with 8086


The 8255 PPI allows input devices to transmit data whenever there is no data left
within 8255, which must be transmitted to the 8086 processor. If 8255 PPI has
some previous data left, it is still not sent to the 8086 microprocessor and
doesn’t allow the Input device.
When 8255 PPI allows input device, then data is obtained & stored
within temporary registers of 8255 PPI. When 8255 PPI holds some
data, then that must be transmitted to 8086 microprocessor, then
sends a signal to PPI.

Once the 8086 microprocessor is free to get the information,


8086 transmits back a signal, then data transmission occurs
between 8255 & 8086. If the 8086 microprocessor does not turn
into free up for a long time, that means 8255 PPI includes some
value that is not sent to the 8086 microprocessor. Thus 8255 PPI
does not allow the Input device to transmit any data because the
existing data will be overwritten. The curved arrow signal in the
above diagrams is the handshake signal. So this data transmission
process is known as handshaking.

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