Chapter 1

MICROPROCESSOR
AND ORGANISATION
OF 8085 1
2
 What is microprocessor?
1. It is an IC(integrated chip) that contains
much of the processing capabilities of a
computer.
OR
2. It is small but extremely complex LSI (large
scale integrated) device that is
programmable.
3
4
 EVOLUTION OF MICROPROCESSOR
Evolution of microprocessor starts with the five generations.
1. First Generation : (4-bit µp) Intel 4004, a 4-bit PMOS microprocessor,
designed by scientist Faggin in 1971 , used in calculators. In 1972, Intel
introduced 8008 , the first general purpose 8-bit µp with development of
LSI technology with 45 instructions. Intel introduced its successor, 8080.
Motorola introduced 6800.
2. Second Generation : (8-bit µp) In 1974, successors to 8080 & 6800 were
introduced the Z80 , 8085 from Intel , 6809 from Motorola. In 1976 ,
8085 was introduced. These µps were 8-bit.
The development of µps has been in the direction towards a complete
microcomputer system with CPU, ROM , RAM, clock, I/O ports, all in
single package. 5
3. Third Generation : (16-bit µp) In 1978, Intel introduced its high
performance 16-bit µp ,8086 or iAPX 86 introduced by Stephen
Mors , Drus Ravenal. In this generation , memory space was 64KB.
e.g. 8086.
4. Fourth Generation : (32-bit µp) In 1981, Intel has introduced a first
32-bit microprocessor. It can address physical memory of 4GB .
Other 32-bit µp in 1982 was HP 32.
5. Fifth Generation : (64-bit µp) Intel made a drastic improvement in
microprocessor design to provide greatest speed and to run the
system on new OS like UNIX. The processor in this generation is
called as Pentium or 80586 followed by PentiumII ,III, IV. It is 64-bit.
6
 MICROCOMPUTER ORGANISATION:-

CONTROL
INPUT & OUTPUT
DEVICE ARITHMATIC
DEVICE

BLOCK
PM DM
DIAGRAM OF A
COMPUTER : MEMORY

CPU
7
 Microcomputer Organisation
Computer system always contain the blocks as- Input Device , Output Device,
CPU with Control unit and Arithmetic unit and Memory unit. Let us see how
computer operates a given program.
• For e.g. In a program of adding 2 nos., instructions are stored in a memory
called as program memory (PM) and data is stored in a memory called as
data memory (DM).
• After feeding set of instructions into the memory, control is used to read the
first instruction from the program memory.
• Then by control & arithmetic circuit , addition will be performed with the use
of memory unit. Finally, the result is transferred to output device.
• Microcomputer is a small size computer with microprocessor , memory, input
, output and clock while microprocessor is CPU or one of the block of it.

8
9
 Generic Microprocessor

It includes the following blocks-

1. ALU (Arithmetic Logic Unit)
2. Registers
3. Instruction Decoder
4. Timing & Control Section
5. Interrupt Control
6. Three types of Bus
10
 1. ALU (Arithmetic Logic Unit)
It is an 8-bit unit where arithmetic & logical operations are carried out. After
performing the operation , it sets the flags depending on resulting answer.
2. Registers
They are of 2 types- 8-bit & 16-bit.
1. Accumulator or Register A – 8-bit (used to store result)
GPR (General purpose registers)
2. Register B – 8-bit 3. Register C – 8-bit
4. Register D – 8-bit 5. Register E – 8-bit
6. Register H – 8-bit 7. Register L – 8-bit
8. Temporary Register – 8-bit
9. Status Register : It is a set of flip-flops called as Flags.(8-bit)
10. Instruction Register : The first byte of instruction is loaded in this register.(8-
bit) 11
11. Program Counter – 16-bit : It is used to store the address of next memory location.
It points to the memory location containing the next instruction to be executed.
12. Stack Pointer – 16-bit : It is used to store the address of a memory called stack.
3. Instruction Decoder
It takes the instruction from the Instruction register and decodes it by driving
control section.
4. Timing & Control Section
As per signal given by instruction decoder , it generates appropriate signals to
control devices in order to execute the instruction.
5. Interrupt Control
It executes certain steps when interrupt occurs.
6. Three Types of Bus
A bus is defined as a group of conducting lines.
1. Address Bus : It is 16-bit and unidirectional.
2. Data Bus : It is 8-bit but bidirectional carries binary data. 12
Block Diagram of Microcomputer

13
 Block Diagram of Microcomputer
Microcomputer mainly contains following blocks:
(1) Input device (keyboard)
(2) Microprocessor Unit (MPU) (control & Arithmetic)
(3) Program memory (ROM)
(4) Data memory (RAM)
(5) Output device (7- segment display)

14
 Architecture of Microcomputer
• As shown in fig., there are 3 types of buses, where
bus is a group of conducting lines. It has 16-bit
address bus , 8-bit data bus.
• Address bus is unidirectional from the MPU , it sends
the address of the required memory on this bus
while data bus is bi-directional from MPU data can be
transferred to & from the MPU.
• Through Control bus control signals are carried out
generated by CPU to required block.
15
1. Input Device (keyboard)
The instructions as well as data prepared for particular
program are entered through keyboard.
2. Keyboard Interface
a) When instructions & data is entered through keyboard, it is
not possible to feed the instruction directly to MPU because
MPU may be busy in performing previous instruction, so it is
stored in keyboard interface.
b) The speed of input device & MPU may not be equal.
3. Microprocessor Unit(MPU/CPU)
c) Here, data is processed & required control signals are
generated to control the system.
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d) All processing & data flow is done with the MPU chip.
 * Primary Functions of CPU of a microcomputer
1. To fetch , decode & execute program instructions in proper order.
2. Transfer data to and from memory and input/output device.
3. Respond to external interrupts.
4. Provide overall timing & control signals for the entire system.
4. ROM (Program memory)
1. It contains the fixed stored program called as monitor program.
2. It has address bus, chip select and read signal lines.
3. It allows only reading stored information.

17
5. RAM (Data memory)
1. It is used to store data, it is a temporary storage device.
2. Bidirectional data bus is required to write & read the data
into the memory.
3. It has address input lines, chip select & read/write enable
lines.
6. Output Device( 7 segment Display )
4. The output of the system is displayed through display
interface.
5. The stored data in this display interface is continuously
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 7. Address Decoder
It decodes the address and selects the proper device.
8. Clock
The whole circuitry is synchronized with the clock. The
speed of the system depends on the clock frequency.
9. Power Lines
Power supply is necessary to operate the circuit.

19
 The 8085 Microprocessor
+5V Vcc VG
A8 – A15
X1 ADDRESS
BUS
CRYSTAL̅ X2

INTEL ADDRESS DATA BUS

AD0-AD7
In
8085
Control Bus
Excluding IO/ M̅ SERIAL DATA IN/OUT

IO/ M¯
20
 Features of 8085 Microprocessor
1. It is a 8-bit microprocessor having 8-bit data bus width that
means 1-byte data can be transferred on this bus.
2. 8085 chip is available in a 40 pin plastic DIP package.
3. Address bus is 16-bit that means it can address 64KB. Address
bus is divided into 2 groups as
a) The LSBs of address are transmitted on the same 8 lines of the
data bus known as data/address bus. This method of using
common 8 lines for both data & address transmission is known
as “multiplexed bus”.
b) MSBs of address are transmitted on address bus(A8 - A15).In
8085 , to select external memory or I/O device , I/O mapped I/O
21
system is used.
Functional Pin Diagram of 8085

22
 Functions of Pins of 8085
1. AD0 – AD7 :
a) These are the address/data multiplexed bus pins.
b) They are bidirectional & serve dual purpose i.e. to send low order data as well as address.
2. A8 – A15 :
a) These are the high order address bus pins.
b) They are unidirectional & used to send address only.
3. X1 , X2 :
a) 8085 microprocessor has its own built-in oscillator circuit inside it to which externally
crystal is connected across pins X1 & X2.
b) It produces a suitable clock for the operation of µp.
4. +Vcc and Vss :
a) These are the supply connections .
b) +Vcc - +5V supply and Vss- Ground supply.
23
5. :
a) RD stands for Read. It is an active low signal.
b) A low level RD signal that the selected memory / I/O is to be read & data bus is
available for data transfer.
c) It is tristated during HOLD & HALT.
6. :
d) WR stands for Write. It is an active low signal.
e) A low level WR signal indicates that data on the data bus is to be written into
selected memory / I/O location.
f) It is tristated during HOLD & HALT.
7. :
a) When the signal on this pin goes low , the program counter is reset to 0000H.
b) The buses are tristated & MPU is held in reset condition as long as RESET is applied.
8. RESET OUT :
a) It indicates that MPU is being reset.
b) It is connected to peripherals to reset them when MPU is reset.
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9. INTERRUPT PINS :
Microprocessor 8085 has five interrupt pins through which 8085 is interrupted.
These are TRAP, RST 7.5, RST 6.5, RST 5.5 , and INTR.
1) TRAP :
a) It is a nonmaskable interrupt. It is unaffected by any interrupt .
b) It has highest priority among all the interrupts.
c) When this interrupt is executed , then the next instruction is executed from a fixed
memory location i.e. 0024H.
2) RST 7.5 :
a) This signal is used to interrupt the microprocessor.
b) When an interrupt is recognized the next instruction is executed from a fixed location
in the memory i.e. 7.5×8 = 003CH.
c) It is maskable interrupt.
3) RST 6.5 :
a) This signal is used to interrupt the microprocessor.
b) When an interrupt is recognized the next instruction is executed from a fixed location
in the memory i.e. 6.5×8 = 0034H.
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c) It is maskable interrupt.
4) RST 5.5 :
a) This signal is used to interrupt the microprocessor.
b) When an interrupt is recognized the next instruction is executed from a fixed location
in the memory i.e. 5.5×8 = 002CH.
c) It is maskable interrupt.
5) INTR :
a) It is maskable interrupt.
b) It is having lowest priority.
c) When this interrupt is given , microprocessor executes interrupt acknowledge cycle.
d) It is enabled or disabled by software.
10. SID:
e) It stands for serial input data. It is a data line for serial input.
b) For serial data transmission SID pin is used. For this type of transmission RIM and SIM
instructions are used.
11. SOD:
f) It stands for serial output data. It is a data line for serial output.
b) For serial data transmission SOD pin is used.
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c) The SOD line eliminates the need for an output port.
 12. READY :

(a) It is a input signal used by the microprocessor to sense whether a peripheral is

ready to transfer data or not.
(b) This signal is used to delay the microprocessor until a slow responding
peripheral is ready to send or accept data.
(c) If READY is high, the peripheral is ready. If it is low, the microprocessor waits for
an integral number of clock cycles until it goes high.
(d) It is used to synchronize slower peripheral to faster microprocessor.
13. HOLD :
(a) It indicates that a a peripheral like DMA controller is requesting the
use of address & data buses.
(b) Having received a HOLD request the µp releases the use of the buses as soon
as the current machine cycle is completed.
(c) The processor regains the bus after removal of HOLD signal. 27
 14. HLDA :
(a) It is a signal for HOLD ACKNOWLEDGEMENT.
(b) A HLDA output indicates to a peripheral that a HOLD request has been received and that
the microprocessor will relinquish control of buses in the next clock cycle.
(c) After the removal of HOLD request, HLDA goes low.
15. ALE :
(a) It stands for Address Latch Enable, one special output signal generated by µp to indicate
beginning of the operation.
(b) It is positive going pulse generated during first clock cycle of machine state and it indicates
that the bits on AD0-AD7 are address bits.
(c) It is never tristated.
16 . :
(c) It is an abbrevation of interrupt acknowledgement.
(d) A low INTA signal indicates that the processor has acknowledged an INTR interrupt.
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 17. IO/
(a) It is a status signal indicates whether the address bus is for I/O
device or for memory.
(b) When it goes high, the address on the address bus refers I/O
device and when it goes low, the address on the address bus
refers memory.
(c) It is tristated during HOLD and HALT.
18. CLK (OUT):
(a) The whole circuitry is synchronized with clock.
(b) The speed of the system depends on the clock frequency.
29
19. S0 , S1 :
(a)These are the status signals sent by µp to distinguish the various
operations or type of machine cycle in progress.
(b)Status code for Intel 8085 is
S1 S0 Operations
0 0 HALT
0 1 WRITE
1 0 READ
1 1 FETCH
30
 Addressing I/O Devices
There are 2 types of addressing:
1. Memory mapped I/O system 2. I/O mapped I/O system
1. Memory mapped I/O system
When the same addresses are used to select I/O devices then they are
not used for any memory location. This type of I/O addressing is known
as “Memory mapped I/O system”.
2. I/O mapped I/O system
When the same addresses are used to select I/O devices as well as
memory location , then this type of I/O addressing is known as “I/O
mapped I/O system”.
In 8085, I/O mapped I/O system is used. It uses IO/ signal.
When IO/ = 1, then this address is for I/O device & when IO/ = 0, then
it is for memory. 31
 In microprocessor actually S1, S0 and IO/ , control
signals decide the type of operation.

When IO/ = 0, then memory is selected either read

or write which is decided by S0 and S1.
When IO/ = 1, then I/O device is selected to read or
write which is decided by S0 and S1.

32
IO/ S1 S0 Operations of
8085
0 0 1 Memory write
0 1 0 Memory read
1 0 1 I/O write
1 1 0 I/O read
0 1 1 Opcode Fetch
1 1 1 Interrupt
acknowledge
Floating 0 0 Halt
Floating - - Hold

Floating - - Reset

33
 Memory mapped I/O system I/O mapped I/O system
1. I/O is assigned to the separate address 1. I/O is assigned with the same
space of memory. address space of memory.

2. Separate control signal is not 2. It is required like IO/ .

required.
3. Memory space is reduced due to 3. Full memory space can be used.
insertion of I/O address.

4. It requires 16-bit address bus. 4. It uses 8-bit address bus only.

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INTERNAL BLOCK DIAGRAM /ORGANISATION/ARCHITECTURE OF 8085

35
 Internal Block diagram of 8085
• Three types of Bus
• Registers
• ALU
• Flags
• Program Counter
• Stack Pointer
• Incrementer / Decrementer
• 36
1. Three Bus Structure –
• 8085 has 8-bit bidirectional data bus.
• 16-bit unidirectional address bus ( AD0 - AD7 - address/data
multiplexed bus.
• Control bus of 3 types-
a) Interrupt Control Bus-INTR , INTA, RST 5.5 , RST 6.5 , RST 7.5 ,
TRAP (RST 4.5).
b) Serial communication Control Bus – SID and SOD.
c) Main Control Bus- All control signals which are applied
internally & externally to execute an instruction.

37
2 . Registers –

A. General Purpose Registers(8 – bit)

a) Accumulator (A) – 8-bit
b) Register-B - 8-bit c)Register-C - 8-bit
d) Register-D - 8-bit e)Register-E - 8-bit
f) Register-H - 8-bit g) Register-L - 8-bit
h) Temporary Register - 8-bit
i) Flag / Status Register - 8-bit
38
 B C

Accumulator Temp. Register D E

(8-bit) (8-bit) H L
SP

PC

INC / DCR

B. Special Registers(16 – bit) -

i. Program Counter (16 – bit)
ii. Stack Pointer (16 – bit)
iii. Incrementer / Decrementer (16 – bit)
39
 Here, registers B-C , D-E and H-L can be used as 16-bit registers in pairs.
1. Accumulator (A) –
• It is an 8-bit register used for performing arithmetical & logical operations like
addition , subtraction , AND , OR etc.
• One of the operand is stored in it.
• It can be used as both source & destination register.
• The final result of these operations is also stored in this accumulator.
• It is also used for I/O operations.
2. General Purpose Registers –
• There are six 8-bit registers in 8085 which can be used as 16-bit registers in
pairs as B-C , D-E , H-L pair.
• The higher MSB 8-bits are stored in first reg. of the pair as B , D , H and lower
LSB 8-bits are stored in other reg. of C , E , L.
• e.g. a number 1200H is to be stored in BC pair then 12 will be stored in register40
3. Temporary Register -
• It is used to store operands of arithmetic and logical operations.
• 16-bit registers like PC & SP are used for special purposes.
3. ALU(Arithmetic & logical Unit) –
DATA BUS

Flags
AAccumulator TTemp. Register

ALU

41
ALU(Arithmetic & logical Unit) –
The organization of arithmetic and logic unit is shown in figure.
1) The arithmetic and logic unit is 8-bit unit.
2) It performs arithmetic, logic and rotate operations.
3) It consists of binary adder to perform addition and
subtraction by 2’s complement method.
4) The result is stored in accumulator.
5) Accumulator, temporary register and flag register are closely
associated with A.L.U.
6) The temporary register is used to hold data during an
arithmetic/ logic operation.
7) The flags are set or reset according to the result of operations
in status register.
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4. FLAGS

43
 Flags
• These are the single bit status registers (Flip-
flops) operated by ALU.
• They are set (1)or reset(0) according to the
answer produced by ALU.
• There are 5 flags :
1. Sign flag(S)2. Zero flag(Z) 3. AuxillaryCarry
flag(AC) 4. Parity flag(P) 5. Carry
flag(CY) 44
1. Sign flag (S): After the execution of arithmetic and
logic operation, if the most significant bit (D7)of the
result is 1, then the sign flag is set to 1 otherwise 0.
This flag is used with a signed number. If MSB is 1, the
number will be negative and if it is 0, the number will
be positive.
2. Zero flag (Z): After performing an arithmetic or logic
operation, if the result is zero, then zero flag is set to
1, else it is reset. This flag is modified by the results in
the accumulator as well as in other registers. 45
3. Auxillary carry flag (AC): In an arithmetic expression, when
carry is generated from bit D3 to D4 , AC flag is set to 1
otherwise is reset to 0. This flag is used for BCD operation.

4. Parity flag (P): Parity flag is set to 1 if the result stored in

accumulator contains even parity. i.e. even number of 1’s. If
accumulator contains an odd number of 1’s, the flag is 0 i.e.
Reset.

5. Carry flag (Cy): This flag sets if carry is produced by most

significant bit during the execution of an arithmetic operation.
In subtraction, carry flag serve as borrow flag.
46
5. Program counter (PC):
(a) The program counter is 16-bit register acting as a pointer to next executable
instruction.
(b) It always contains the 16-bit address of the memory location where next
executable instruction is stored.
(c) The microprocessor uses this register to sequence the execution of
instruction.
(d) The PC is autoincremented after a particular instruction has been fetched by
the MPU.
e.g. A simple program as follows.
7000 LXI H, 1020H
7001 MOV A,M
7002 SUB B
47
6. Stack pointer (SP) :
(a) Stack pointer is a 16-bit register, which contains the address of stack top.
i.e. the memory address of last byte entered in stack.
(b) With the help of incrementer / decrementer , the stack pointer is
decremented each time data is pushed onto stack and incremented each
time data is popped off the stack.
:- PC +1 PC
Idea of Stack & SP
0032 0033
Subroutine
at 015B
Stacktop 0004 33
33
SP 0005 0000000
00
0 0088
0004 0006
0007

48
 PC Address STACK PC Address STACK
0056 0004 0057 0004
0005 SP 0005 57
0007 0006 0000
0005 0006 00
0007 80
SP 0007 80
0008 00
0008 00 0009 51
0009 51 000A 00
000A 00

Before PUSH operation After PUSH operation

SP = SP - 2

Stack and Stack Pointer

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 PC Address STACK PC Address STACK
0057 0004 0057 0004
SP 0005 57 0005
0005 0000
0007 0006
0006 00
SP 0007 80
0007 80
0008 00
0008 00 0009 51
0009 51 000A 00
000A 00

Before POP operation After POP operation

SP = SP + 2

Stack and Stack Pointer

50
7. INCREMENTER and DECREMENTER :
 These are the 16 – bit registers.
 They are used to add or subtract 1 from the contents of the PC
or SP.
8. INSTRUCTION DECODER :
 Instruction is stored in it.
 It is decoded by this circuit to initiate the timing and control
signals for the given instruction.
 The output of the decoder controls the registers , ALU and
data /address buffers.
51
 Flag register contains data 45H . Interpret its meaning.
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
0 1 0 0 0 1 0 1
1. S (Sign flag) : Here, as D7 bit is 0, Sign flag is reset, this means result is positive.
2. Z(Zero flag) : After arithmetic or logical operation , the result is equal to zero
therefore, Zero flag is set.
3. AC( Auxillary carry flag): As there is no carry from D3 to D4 bit during
arithmetic operation , Auxillary carry flag is reset.
4. P(Parity flag) : The result stored in accumulator contains even number of
1’s(even parity), so Parity flag is set.
5. CY(Carry flag) : There is a carry from most significant bit during the execution
of arithmetic expression , so Carry flag is set. 52
 INTERRUPTS
• ISR ( Interrupt Service Routine )
• Interrupt- An input signal which stops the current execution and transfers to
specific special routine known as ISR.
Main Program ISR

(2) Idea of
INTERRUPT
(1) (3)
ISR

(4)
53
RETURN
Types of Interrupts :-
1. Hardware Interrupts (5) 2. Software Interrupts (8)
1. 8085 provides 5 hardware interrupts:
(i) TRAP (ii) RST 7.5 (ii) RST 6.5 (iv) RST 5.5 (v) INTR
(1) These interrupts are vectored interrupts. It means that when these interrupts are
given , it is directed (or vectored) to transfer the control to specific memory location
given by
TRAP = 4.5× 8 = 36/16 = 0024H RST 7.5= 7.5 x 8 = 60/16 = 003C H
RST 6.5= 6.5 x 8 = 52/16 = 0034 H RST 5.5 = 5.5 x 8 = 44/16 = 002C H
(2) Among these interrupts, TRAP is non- maskable interrupt which can not be disabled.
But the other four interrupts are maskable interrupts, which can be disabled.
(3) The TRAP has highest priority and the INTR has lowest priority among the hardware
interrupts. The hardware interrupts in descending order of priority are listed below:
(i) TRAP - highest priority (ii) RST 7.5 (iii) RST 6.5 (iv) RST 5.5 (v) INTR - lowest priority.

54
2. Software Interrupts :-
• The normal operation of a microprocessor can be interrupted by
special instruction. Such an interrupt is called a Software interrupt.
• 8085 provides 8 user-defined software interrupts RST 0 to RST 7
where RST means the restart.
• These interrupts cannot be ignored or masked. They have more
priority than any hardware interrupt.
• These interrupts are vectored interrupts and when these
interrupts are called the control is transferred to the memory
location as shown below:

55
Interrupt Mnemonics Call Location
(Hex)
RST 0 0000
RST 1 0008
RST 2 0010
RST 3 0018
RST 4 0020
RST 5 0028
RST 6 0030
RST 7 0038

56
 Addressing Modes
1. Direct addressing mode:
1) In direct addressing, the address appears after opcode of the instruction in program
memory.
2) The address of the operand is specified within the instruction.
3) The instructions using direct addressing mode are three-byte instructions. Byte 1 is
opcode of the instruction, Byte 2 is lower order address and Byte 3 is high order
address.
4) For e.g. LDA 7040H
i.e. This instruction loads accumulator with the content of memory location 7040 H.

XXH 7040 10H 7040 10H

10H
ACC. Memory ACC. Memory
Before Execution After Execution 57
2. Register addressing mode:
1) In register addressing, the register name is specified within the instruction.
2) The address is not required for this type.
3) The instructions using register addressing mode are single byte instructions.
4)This is register to register or accumulator to register transfer.
5) For e.g. MOV A , B , ADD C , SUB D etc.
MOV A , B :
This instruction transfers the content of register B to accumulator without modifying
contents of B.

XXH 20H 20H 20H

ACC. Reg. B ACC. Reg. B

Before Execution After Execution 58

3. Register Indirect addressing mode:
1) In register indirect addressing, the register pair is specified.
2) The 16 bit address of memory location is required for this type.
3) The instructions using register indirect addressing mode are single byte instructions.
4)This is register to accumulator or accumulator to register transfer.
5) For e.g. MOV A , M , ADD M , SUB M etc.
MOV A , M -

XXH 1020 40H 40H 1020 40H

H 10 20 L
H 10 20 L
ACC. Memory ACC. Memory

Before Execution After Execution 59

4. Immediate addressing mode:
1) In Immediate addressing , the data appears immediately after
opcode of the instruction in program memory.
2) In these instructions, the actual data is specified within the
instruction.
3) These operations are specified with either 2 or 3 byte
instructions.
4) For e.g. MVI B , 50H , LXI H , 2000H , SUI 5FH.
i.e. This instruction moves immediate data 50 H to the contents of
register B.
60
5. Implicit / Implied addressing mode:
1) In this addressing , operand is not specified in the instruction
and it is predetermined.
2) Generally, the operand is accumulator.
3) Most of the logical group instructions are of this type.
4) These are single byte instructions.
5) For e.g. CMA , RAL , STC , etc.
i.e. This instruction compliments the contents of accumulator and
the result is stored in accumulator.

61