Serial Communication Protocols

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Introduction
• Communication protocols can be broadly classified as
Serial and parallel
Synchronous and Asynchronous
Simplex, Half duplex and full duplex

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Serial Vs parallel
• Serial Vs Parallel

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Asynchronous Vs Synchronous
• Asynchronous – no clock signal to time
the data communication
• Handshaking signals are used to indicate
start and stop
• Synchronous transmission is properly timed
Through the clock signal sent by the master

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Simplex, Half Duplex and Full Duplex
• Simplex – Transmission in one
direction only
• Half Duplex – Transmission in either
direction is possible but at different time
Slots ( single wire for Tx and Rx)
• Full Duplex – Transmission in either
Direction is possible at the same time.

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Single Ended Vs Differential

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Communication Protocols
Most of the microcontrollers support the following protocols for serial
communication

UART (Universal Asynchronous Receiver Transmitter)

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UART
• Developed by Digital Equipment Corporation (DEC)
• Transforms parallel data to serial and vice versa
• Used in conjunction with RS 232, Rs 422 or RS 485.
• The term ‘universal’ indicates that the data format and transmission
speeds are configurable
• Level shifter is used after UART to format the voltage to the required
levels
(To conform with the cable standards)

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UART interfacing

RS232/RS422

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UART data frame

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UART protocol
• Start bit – one bit normally -Logic LOW
• Data bits - with or without parity bit
• Stop bits – one or two – Logic HIGH

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Example
• Transmission of 0x32 and 0x3C at a baud rate of 9600 bits/sec

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UART – Internal circuitry

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UART Summary
No of masters – 1
No of slaves – 1
No of wires – 2
Baud rate – normally 9600 bits/sec

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Serial Peripheral Interface (SPI)
• Synchronous, serial, full duplex data transmission protocol
Speed up to 10 Megabits per second
Pin Details
MOSI (Master Output/Slave Input) – Line for the
master to send data to the slave.

MISO (Master Input/Slave Output) – Line for the

SCLK (Clock) – Line for the clock signal.

SS/CS (Slave Select/Chip Select) – Line for the

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A closer look

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SPI data transmission process
Step 1: Master sends the clock

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 SPI data transmission protocol
• Step 2 : To activate the slave, the master switches the SS/CS pin to a low
voltage state.

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Data transfer from master to slave
• Step 3: If master wants to transfer data, it is transferred through MOSI
pin.

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Data transfer from slave to master
• Step 4: If slave wants to send a response, data is transferred from slave
to master through MISO pin.

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Typical SPI configuration

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Typical SPI
• Only one master device can control multiple independent slave devices.
• However, an independent chip select signal is required for each slave
device which is provided by the master device.
• The obvious pitfall of this configuration is that the number of chip select
pins required with the master devices should be equal to the number of
slave devices we want to use.
• This is also known as an independent slave configuration.

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Daisy Chained SPI

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Daisy Chained SPI
• In this configuration, only one chip select signal from the master device
controls all slave devices and also all slave devices work on the same
clock signal.
• But only the first slave device gets data from the master device directly,
all other slave devices receive data on their input pin from the
subsequent slave device.
• In this mode, slave devices act like cooperative devices instead of
independent devices.

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Example

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I2C ( Inter Integrated Communication)
• Multiple master multiple slave communication protocol.
• Synchronous , serial, single ended bus configuration
• Developed by Philips Semiconductor Division ( currently popular as NXP
Semiconductors)
• Low speed communication protocol
• Only two wires are required
• Each slave has a unique address

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I2C ( Inter Integrated Communication)

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Start and Stop Condition
• SDA (Serial Data) line: This wire sends data to a slave device. Any data
sent from one device to another goes through the SDA wire.
• SCL (Serial Clock) line: It provides the necessary synchronization clock for
the data transfer.
• Start condition: A high to low transition of SDA.
• Stop condition: A low to high transition of SDA.

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I2C protocol

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 Message Frame

Master wants to read from or write into theAcknowledgement

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Address Frame ( 7 bit address)

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Address Frame ( 10 bit address)

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