Sequential Circuit Analysis

Synchronous vs. Asynch.

• Synchronous sequential circuit:
 Behavior: from knowledge of its signals at discrete
instants of time.
 Synchronization by a signal: clock
• Asynchronous sequential circuit:
 Behavior: dependent on the order of input signal
changes over continuous time
 Output can change at any time (clockless).

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 Clock Signal
Rising Clock Edge

Clock generator: Periodic train of clock pulses

Different duty cycles

Falling Clock Edge

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 Clock Signal
 Clock is distributed throughout the
whole design
 Each component synchronizes itself
with it.

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 Synchronous Circuits

Combinational
Logic

clk

time

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 Sequential Circuit Analysis
• Analysis:
 Obtaining a suitable description that
demonstrates the time sequence of
inputs, outputs, and states.

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 Sequential Circuits

At each clock period, the present

state of the system is stored in
storage elements (FFs)

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 Example 1
• Input: x(t)
• Output: y(t) x D Q A
• State: (A(t), B(t)) C Q A

• What is the Output D Q B

Function? CP C Q

• What is the Next y

State Function?

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 Example 1 (Cont’d)
• Boolean equations
for the functions: x
D Q A

 A(t+1) = A(t)x(t) + B(t)x(t) C Q A’

Next State

 B(t+1) = A’(t)x(t)

D Q B
 y(t) = x’(t)(B(t) + A(t))
CP C Q'

Output

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 Example 1 (Cont’d)

A(t),
B(t)
A(t+1),  A(t+1) = A(t)x(t) + B(t)x(t)
B(t+1)
A(t),
B(t)  B(t+1) = A’(t)x(t)
 y(t) = x’(t)(B(t) + A(t))

1
A(t+1) 0

B(t+1) 1
0 0
A(t)
0 1
B(t)
0
Has error?
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 State Table Characteristics
• State table
 A multiple variable table with the following four sections:
 Present State:
 the values of the state variables for each allowed state.
 Input:
 the input combinations allowed.
 Next-state:
 the value of the state at time (t+1) based on the present state and
the input.
 Output:
 the value of the output as a function of the present state and
(sometimes) the input.

A(t), A(t+1),
B(t) B(t+1)
A(t),
B(t)
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 State Table Characteristics
• From the viewpoint of a truth table:
 TT inputs:
 Input, Present State
 TT outputs:
 Output, Next State

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 State Table
• Example:
 The state table can be filled in using the next state and output
equations:
A(t+1) = A(t)x(t) + B(t)x(t)
B(t+1) =A (t)x(t)
y(t) =x (t)(B(t) + A(t))

Present State Input Next State Output

A(t) B(t) x(t) A(t+1) B(t+1) y(t)
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 0 0 1
0 1 1 1 1 0
1 0 0 0 0 1
1 0 1 1 0 0
1 1 0 0 0 1
1 1 1 1 0 0
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 State Diagram
The sequential circuit function can be
represented in graphical form as a state
diagram with the following components:
 Circles (state name inside): states
 Directed arcs: Present State Next State:
state transition
 label on each arc with the Input values which
causes the state transition, and
A label for the output:
I/O
 on each directed arc, or
S1 S2
 on each circle
I
S1/O1 S2/O2

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 Mealy vs. Moore machines
• Mealy model:
 Both outputs and next state depend both on
primary inputs AND present state.
 Next_state = f(inputs, state)
 Out = g(inputs, state)

• Moore model:
 Only next state depends directly on primary inputs
AND present state. Outputs depend only on
present state.
 Next_state = f(inputs, state)
 Out = g(state)

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 State Diagram
• Label form:
Mealy:
 On directed arc :
 inputs/outputs Mealy:
In circle: output g(state, input)
 State name I/O
S1 S2

Moore:
 On directed arc: Moore:
 Inputs
 In circle: output g(state)
 state/output I
S1/O1 S2/O2

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 Example: Mealy model (cont.)
State Diagram
0/0
1/0 I/O
00 01 S1 S2
0/1
Reads as:
0/1 When at state s1 and apply
0/1 1/0 input I, we get output O
and proceed to state s2.

10 1/0 11

1/0
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 Example: Moore model (cont.)
State Diagram
11 00
01
10 I
0/0 01 1/1 S1/O1 S2/O2

10 11 Reads as:
When at state s1 with output
00 O1 and apply input I,
00,11 we proceed to state s2 with
01,10 Output O2.
0/0 1/1
01,10
00,11
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 State Diagram
x=0/y=0 x=0/y=1
 Which type? x=1/y=0

AB
00 x=0/y=11 0

x=1/y=0
x=1/y=0
x=0/y=1

01 11
x=1/y=0

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General Sequential Circuit

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 Mealy Machine

State Register
s(t+1)
C1 next s(t)
state present z(t)
x(t)
state C2
present
inputs
clock

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 Moore Machine

State Register
s(t+1) z(t)
C1 C2
next s(t)
state present
x(t)
state
present
inputs
clock

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 Example of a M…? machine
• Obtain the logic diagram and
state table for:
DA = A  X  Y
Z=A

X
DA A
D Z
Y

clock

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 Example of a Moore Machine (cont.)
State Table
Present Inputs Next Output
State State

A(t) X Y A(t+1) Z

X
DA
A Z
Y D

clock

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 Example of a Moore Machine (cont.)
State Table Alternative State Table
Present Inputs Next Output Present Next State Output
State State State

A(t) X Y A(t+1) Z XY=00 XY=01 XY=10 XY=11

0 0 0 0 0 A(t) A(t+1) A(t+1) A(t+1) A(t+1) Z

0 0 1 1 0 0 0 1 1 0 0
0 1 0 1 0 1 1 0 0 1 1

0 1 1 0 0

1 0 0 1 1
X
DA
1 0 1 0 1 A Z
Y D

1 1 0 0 1
C
1 1 1 1 1
clock

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 Example: Mealy model
Y = (A+B).X’
State Table
A(t+1) = (A+B).X Present Input Next State Output
State
B(t+1) = A’.X
A(t) B(t) X A(t+1) B(t+1) Y

0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 0 0 1
0 1 1 1 1 0
1 0 0 0 0 1
1 0 1 1 0 0
1 1 0 0 0 1
1 1 1 1 0 0

Possible states = { 00, 01, 10, 11 }

 4 nodes in state diagram
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 Example: Mealy model (cont.)
State Diagram Present State Input Next State Output

0/0 A(t) B(t) X A(t+1) B(t+1) Y

1/0 0 0 0 0 0 0

00 01 0 0 1 0 1 0

0/1 0 1 0 0 0 1

0 1 1 1 1 0

0/1 1 0 0 0 0 1
0/1 1/0 1 0 1 1 0 0

1 1 0 0 0 1

1 1 1 1 0 0

10 1/0 11

1/0
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Example: Moore model
State Table
Present Inputs Next Output
State State
A(t) X Y A(t+1) Z
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 0
1 0 0 1 1
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Possible states = { 0, 1 }
 2 nodes in state diagram
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 Example: Moore model (cont.)
Present Inputs Next Output
State State
State Diagram A(t) X Y A(t+1) Z
0 0 0 0 0
00,11 0 0 1 1 0
01,10 0 1 0 1 0
0/0 1/1 0 1 1 0 0
01,10 1 0 0 1 1
1 0 1 0 1
00,11 1 1 0 0 1
1 1 1 1 1

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 State Tables for Other Flip-Flops
• Two step procedure:
1. Obtain binary values of each FF input
equation in terms of present state and
input variables.
2. Use corresponding FF characteristic table
to determine the next state.

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 Example
JA = B, KA = BX’ JK-FF Characteristic Table

JB = X’, KB = AX’ + A’X = A  X J K Q(t+1)

•  2 JK-FFs: 0 0 Q(t)
0 1 0
JA J 1 0 1
A
C 1 1 Q(t)’
KA K A’

JB J B
C
KB B’
K

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 Example (cont.)
Present State Input Next State FF inputs
A(t) B(t) X A(t+1) B(t+1) JA KA JB KB
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

JA = B, KA = BX’ Step 1:
JB = X’, KB = AX’ + A’X = A  X Use FF input
equations 32
 Example (cont.)
Present State Input Next State FF inputs
A(t) B(t) X A(t+1) B(t+1) JA KA JB KB
0 0 0 0 0 1 0
0 0 1 0 0 0 1
0 1 0 1 1 1 0
0 1 1 1 0 0 1
1 0 0 0 0 1 1
1 0 1 0 0 0 0
1 1 0 1 1 1 1
1 1 1 1 0 0 0

JA = B, KA = BX’ Step 1:
JB = X’, KB = AX’ + A’X = A  X Use FF input
equations 33
 Example (cont.)
Present State Input Next State FF inputs
A(t) B(t) X A(t+1) B(t+1) JA KA JB KB
0 0 0 0 1 0 0 1 0
0 0 1 0 0 0 0 0 1
0 1 0 1 1 1 1 1 0
0 1 1 1 0 1 0 0 1
1 0 0 1 1 0 0 1 1
1 0 1 1 0 0 0 0 0
1 1 0 0 0 1 1 1 1
1 1 1 1 1 1 0 0 0

Step 2:
Use FF inputs and JK characteristic
table
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 Example 2: Sequential Circuit Analysis

 Logic Diagram: D Q
A
Z

C RQ

D Q
B

C RQ

D Q
C

Clock CR Q
Reset

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 Example 2: Flip-Flop Input Equations
• Variables
Inputs: None
Outputs: Z
State Variables: A, B, C
• Initialization:
Reset to (0,0,0)
• Equations
A(t+1) = Z=
B(t+1) =
C(t+1) =
Mealy or Moore?
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 Example 2: State Table
ABC A+B+C+ Z

S+=S(t+1) 0 00
0 01
0 10
0 1 1
1 00
1 0 1
1 1 0
1 1 1

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 Example 2: State Diagram
ABC
Reset 000

111 100 001

011 010 101

• Which states are used?

• What is the function of
the circuit? 110

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 Example 3
• Mealy or Moore?

Present Present
AB X 0

X 1 Z State
Next state
X 0 X 1 Output(Z)
A B 
A B
00 10 01 0
01 00 11 1 S0 S3 S1 0
11 01 11 0 S1 S0 S2 1
10 11 01 1
S2 S1 S2 0
S3 S2 S1 1

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Example 3

Present Next state Present

State Output(Z)
X 0 X 1

S0 S3 S1 0
S1 S0 S2 1
S2 S1 S2 0
S3 S2 S1 1

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Circuit Analysis by Signal
Tracing

Waveforms
 Timing Chart
• Construction and interpretation of Timing Chart:

 A state change can only occur after the rising (or falling) edge of the
clock.
 The input will normally be stable immediately before and after the
active clock edge.
 For a Mealy circuit, the output can change when the input changes
as well as when the state changes.
 A false output may occur between the state changes and the time the
input is changed to its new value. (In other words, if the state has
changed to its next value, but the old input is still present, the output
may be temporarily incorrect.)

 False outputs are difficult to determine from the state graph, so use
signal tracing.

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 Timing Charts
 Timing chart plotting procedure for Mealy
state table :
a) For the given input value, read the present output
and plot it.
a) If the input changes many times before clock edge, plot the
effects on output.
b) After the active clock edge, change the present
state according to the next state function.
c) Any change in present state may cause change
in next state and output.
d) Repeat steps (a) and (b).

 For Mealy circuits, the best time to read the

output is just before the active edge of the
clock, because the output should always be
correct at that time.
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 State Tables

A State table with Multiple Inputs and Outputs

Present Next state Present

State Outputs

X 1 X 2 00 01 10 11 X 1 X 2 00 01 10 11

S0 S3 S 2 S1 S0 00 10 11 01
S1 S0 S1 S 2 S3 10 10 11 11
S2 S3 S0 S1 S1 00 10 11 01
S3 S 2 S 2 S1 S0 00 00 01 01

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 State Diagram
A State Diagram with Multiple Inputs and Outputs

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 Mealy Machine State Diagrams
• A CLARIFICATION:
 The state-diagram notation for
output values in Mealy machines is
a little misleading:
 You should remember that the listed
output value is produced continuously
when the machine is in the indicated
state and has the indicated input, (not
just during the transition to the next
state).

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