INTRODUCTION

A microcomputer performs a task by reading and

executing the set of instructions written in its
memory.
 This set of instructions, written in a sequence, is

called a program.
 Each instruction in the program is a command, in

binary, to the microprocessor to perform an

operation.

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 DATA TRANSFER OPERATIONS
 The data transfer instructions ‘copy’ data from a
source into a destination without modifying the
contents of the source.
 The previous contents of the destination are

replaced by the contents of the source.

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DATA TRANSFER OPERATIONS

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4
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 EXAMPLE
 Load the accumulator A with the data byte 82H (the
letter H indicates hexadecimal number), and save
the data in register B.

Instructions: MVI A, 82H,

MOV B,A

The first instruction is a 2-byte instruction that

loads the accumulator with the data byte 82H, and
the second instruction MOV B,A copies the
contents of the accumulator in register B without
changing the contents of the accumulator. 6
 ILLUSTRATIVE PROGRAM: DATA
TRANSFER
 FLOWCHART
 Generally, a flowchart is used for two purposes:
 to assist and clarify the thinking process
 and to communicate the programmer’s thoughts or logic to others.

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ILLUSTRATIVE PROGRAM: DATA
TRANSFER

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9
ILLUSTRATIVE PROGRAM: DATA
TRANSFER

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MOVE IMMEDIATE INSTRUCTIONS

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MOVE IMMEDIATE INSTRUCTIONS

The memory location, which is indirectly

addressed by the HL register pair, appears 12
as the letter M in all instructions.
 DIRECT DATA TRANSFER
INSTRUCTIONS
 Direct data transfer instructions are useful if
only one byte or word of data is transferred
to or from the memory.
 If more than one byte or word is transferred,

it is more efficient to use indirectly addressed

instruction.

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DIRECT DATA TRANSFER
INSTRUCTIONS

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DIRECT DATA TRANSFER
INSTRUCTIONS

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 Copies the contents of
location 1000H into the L stores the contents of the
register and the contents L register at memory
of location 1001 H into location I200H and the H
the H register register at location 1201H
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 INDIRECT DATA TRANSFER INSTRUCTIONS
 With register indirect addressing, a register pair
holds the address of the memory location accessed
by the instruction.
 The contents of the register pair indirectly addresses

a memory location.
 Whenever, the letter M appears instead of a register,

the HL register pair indirectly addresses a memory

location.

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INDIRECT DATA TRANSFER
INSTRUCTIONS

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INDIRECT DATA TRANSFER
INSTRUCTIONS

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REGISTER DATA TRANSFER
INSTRUCTIONS

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REGISTER DATA TRANSFER
INSTRUCTIONS

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 STACK DATA TRANSFER INSTRUCTIONS
 The Intel 8085A microprocessor has a LIFO
(last-in, first-out) stack memory.
 The stack memory stores both return

addresses from subroutines and data

temporarily.
 The microprocessor cannot locate the stack

memory when power is first applied to the

system because the number in the SP is
unknown.
 The location of the stack must be initialised

after the application of system power. 22

 STACK DATA TRANSFER INSTRUCTIONS
 The programmer decides what portion of the
read/write memory is to function as the stack, and
then loads the SP with the top location plus one byte.
 The byte location above the stack is never used, but
must be the initial value of the stack pointer.
 The SP always points to the current exit point.
 The stack is a LIFO stack.

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 STACK DATA TRANSFER INSTRUCTIONS
 Ifdata are pushed (placed) onto the stack,
they move into the memory locations
addressed by SP-1 and SP-2.
 Note that pairs of registers always move to the stack.
 A PUSH instruction stores the high-order register first (SP -
1), followed by the low-order register (SP -2).
 The SP then decrements by two so that the next push
occurs below the first.
 Notice that when the PUSH occurs, nothing is placed at the
location addressed by the stack pointer.
 This is why the SP is initialised at one byte above the top
of the stack.

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STACK DATA TRANSFER INSTRUCTIONS

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STACK DATA TRANSFER INSTRUCTIONS

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 STACK DATA TRANSFER
INSTRUCTIONS
 It
is also important to note that PUSHes and POPs
must occur in pairs:
 one PUSH, one POP,
 two PUSHes, two POPs, and so on.

Note: POP PSW will copy the data from location pointed by
SP into flag register and data from (SP+1) will copy into A. The 27

SP=SP+2.
 MISCELLANEOUS DATA TRANSFER
INSTRUQTIONS
 Exchange DE with HL (XCHG)
 The XCHG instruction exchanges the contents of the HL
register pair with the contents of the DE register pair.
 Load SP from HL (SPHL)
 Is a one-byte instruction, copies the contents of the HL
register pair into the SP.
 Exchange HL with Stack Data (XTHL)
 This instruction exchanges the contents of the HL pair with
the most recent data on the stack.
 Input/Output Data Transfer Instructions
 IN : instruction inputs data from an I/O device into the
accumulator.
 OUT : sends accumulator data out to an I/O device.
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 ARITHMETIC OPERATIONS
 Addition,
 subtraction,

 increment,

 and decrement.

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ARITHMETIC OPERATIONS

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ARITHMETIC OPERATIONS

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ARITHMETIC OPERATIONS

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ARITHMETIC OPERATIONS

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 ADDITION
 Addition
takes several forms in the 8085
microprocessor:
 8-bitbinary,
 16-bit binary,
 and two-digit binary-coded-decimal (BCD)) addition.
 Binary addition functions with either signed
or unsigned numbers;
 BCD addition uses only unsigned numbers.
 The instruction set supports additions using
register addressing, register indirect
addressing, and immediate addressing, but
not direct addressing.
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ADDITION

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ADDITION

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ADDITION

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 ADDITION WITH CARRY
 Whenever large numbers (numbers wider than 8 bits, or
multiple-byte numbers) are added, the carry must be
propagated from one 8-bit segment to the next.

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ADDITION WITH CARRY

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 EXAMPLE
 Suppose that the DE register pair contains a 16-bit number that we must add to the number in the BC register pair. To

accomplish this multiple-byte addition, add E and C together and then add D and B together with the carry. The add-with-

carry instruction uses the carry from the addition of E and C to generate the correct answer when D and B are added.

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EXAMPLE

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 SIXTEEN-BIT ADDITION
 The 8085 instruction set does contain special
instructions (DAD) that do 16-bit addition.

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 BCD ADDITION
 BCD addition is like binary addition except that the numbers range in value only from 0 through 9.
 A special instruction allows BCD addition by using the standard binary addition (ADD) instructions.
 The DAA instruction appears after a BCD addition (with a binary add instruction) to correct the BCD result.
 The DAA instruction does not convert a binary number to a BCD number.

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 EXAMPLE

 Example 5-6 illustrates the summation of the packed

BCD numbers 11 and 19.
 After this addition, the accumulator contains a 2AH,

which is not a BCD number:

 the answer should be a 30BCD
 The DAA instruction corrects the answer after the addition and
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provides a 30BCD after the DAA instruction executes.
 BCD ADDITION
 The DAA instruction changes the result through the two tests listed by adding a OOH, 06H, 60H, or 66H to the accumulator.

 If the least significant half-byte is greater than 9 or if the AC flag = 1, the DAA instruction adds a 06H to the accumulator.

 If the most significant half-byte is greater than 9 or if the C flag bit 1, the DAA instruction adds a 60H to the accumulator.

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 INCREMENT
 The last form of addition is to increment or add 1.
 The increment command is either an 8-bit (INR) increment or a 16-bit (INX)
Increment instruction.
 The INR instructions affect all the flags except carry, and the INX instructions affect
no flags.

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47
 SUBTRACTION
 The 8085 supports 8-bit binary subtraction and decrement.
 It also supports a subtraction instruction that allows a borrow to be propagated through additional
bytes of a number.
 The subtract-with-borrow instruction aids in the subtraction of multiple-byte numbers. .

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 SUBTRACTION
 The 8085 performs subtraction by using the method
of 2’s complement.
 Subtraction can be performed by using either:
 the instruction SUB to subtract contents of a source
register or
 the instruction SUI to subtract an 8-bit number from
contents of the accumulator.
 In either case, the accumulator contents are regarded as
minuend (the number from which to subtract).

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 SUBTRACTION
 Various subtraction instructions: register, register indirect, and
immediate addressing.
 Direct addressing is not allowed for a subtraction.
 Each of these instructions affects the flag bits, so they reflect various
conditions about the difference after a subtraction.

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 SUBTRACTION
 The 8085 performs the following steps internally to execute the instruction SUB (or SUI):
 Converts subtrahend (the number to be subtracted) into its 1’s complement.
 Adds 1I to 1’s complement to obtain 2’s complement of the subtrahend.
 Add 2’s complement to the minuend (the contents of the accumulator).
 Complements the Carry flag.

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 ILLUSTRATIVE PROGRAM:
SUBTRACTION OF TWO NUMBERS
 PROBLEM STATEMENT
 Write a program to do the following:
 Load the number 3011 in register B and 3911 in
register C.
 Subtract 39H from 3011.

 Display the answer at PORT I.

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 ILLUSTRATIVE PROGRAM:
SUBTRACTION OF TWO NUMBERS

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 ILLUSTRATIVE PROGRAM:
SUBTRACTION OF TWO NUMBERS
 PROGRAM DESCRIPTION
 Registers B and C are loaded with 30H and 39H,
respectively.
 The instruction MOV A,B copies 30H into the
accumulator (shown as register contents).

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SUBTRACTION

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SUBTRACT WITH BORROW

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SUBTRACT WITH BORROW

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 EXAMPLE
Suppose that the number in the DE pair must be subtracted from the BC
pair. The least significant is operated on first. Once the difference of C and
E is found, the D register is subtracted from the B register with a borrow.
The subtraction with borrow effectively propagates the borrow through the
most significant byte of the result.

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 LOGIC INSTRUCTIONS
 Four basic logic functions:
 invert, AND, OR, and exclusive-OR.
 Why does a microprocessor instruction set contain
logic instructions?
 Logicinstructions sometimes replace discrete logic
gates.
 Today, program storage costs about of a cent per byte.
 System control software usually requires bit
manipulation — a logic operation.

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 INVERSION (NOT)
 The CMA instruction (2FH in machine language),
one’s-complements or inverts the contents of the
accumulator.
 This operation, which affects none of the flag bits,

causes each bit of the accumulator to be inverted

(changed from 1 to 0 or 0 to 1).
 The CMA instruction causes the accumulator to

appear as eight inverters (or NOT).

 This means that this one-byte instruction replaces eight
discrete inverters if the speed required is not too great.
The amount of circuitry replaced by the CMA instruction is
14 of a 7404 TTL hex inverter.
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 THE AND OPERATION
 TheAND instruction, has two separate functions in
a microprocessor-based system.
 The AND instruction selectively clears bits of the
accumulator or replaces discrete AND gates.
 TheAND instruction, functions as eight
independent two-input AND gates. This instruction
replaces two 7408 quad two-input AND gates.

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THE AND OPERATION

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THE AND OPERATION

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 THE OR OPERATION
 Hastwo separate functions in a microprocessor-
based system:
 Itselectively sets bits of the accumulator or
 Replaces discrete OR gates.
 The inclusive-OR instruction functions as eight
independent two-input OR gates.
 This instruction replaces two 7432 quad two-input

OR gates.

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THE OR OPERATION

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THE OR OPERATION

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67
ROTATE INSTRUCTIONS

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BRANCH INSTRUCTIONS
 Allow computers to make decisions and
change the flow of the programme based on
the results outcome.
 Two main forms:
 JUMP instructions:
 Allow programme to jump to any memory locations.
 CALL instructions
 Allow a group of instructions (subroutine) to be reused
by the program in many different places.

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UNCONDITIONAL JUMP INSTRUCTIONS
 This is a three-byte instruction that allows the
programmer to jump over unused portions of the
memory.

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 UNCONDITIONAL JUMP INSTRUCTIONS

 The JMP instruction uses direct addressing, and the PCHL

instruction uses register indirect addressing.
 This causes the next program instruction to execute at the
address stored with the JMP instruction.
 The PCHL instruction causing the microprocessor to jump
to the memory location addressed by the HL register pair.
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UNCONDITIONAL JUMP INSTRUCTIONS

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CONDITIONAL JUMP
 Conditional JUMP instructions:
 Allow the programmer or programme to make a choice
based on conditional terms.
 A condition is tested by the microprocessor to decide
whether a jump occurs.
 The conditions tested by the conditional jumps are the
same conditions held in the flag bits.
 The terms are :
 Zero / not zero
 Carry set / cleared

 Positive / minus

 Parity odd / even

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CONDITIONAL JUMP INSTRUCTIONS

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CONDITIONAL JUMP INSTRUCTIONS

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CONDITIONAL JUMP INSTRUCTIONS

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SUBROUTINES
 A subroutine is a short sequence of instructions that
performs a single task.
 One advantage of using a subroutine is a significant
savings of memory space.
 Subroutines also simplify the task of writing a
program because subroutines only appear in a
program once, but are used often.
 CALL instruction allows the programmer to use (link
to) a subroutine.
 When the 8O85 executes a CALL instruction, two
events occur:
 The contents of the PC are pushed onto the stack, and
 The program continues at the address stored with the
CALL instruction. The CALL instruction is a combination of
the PUSH and the JMP instructions.

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SUBROUTINES

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SUBROUTINES
 The RET(return) instruction returns to the main program at
the instruction that follows the CALL.
 This can be accomplished because the address of this
instruction is stored on the stack because the CALL placed it
there as a return address.
 The RET command POPs a number from the stack and
places it into the program counter.

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SUBROUTINES

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THE RESTART INSTRUCTIONS
 These are special unconditional CALL instructions,
because they call a subroutine at a fixed location in
the memory instead of a variable location as
addressed by the CALL instruction.
 E.g. RST 2
 This instruction calls the subroutine at memory location 0010H,
i.e. RST 2  CALL 0010H
 RST N  CALL Nx8

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THE RESTART INSTRUCTIONS

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MACHINE CONTROL INSTRUCTIONS
 Program execution is stopped by the HLT (halt) instruction.
 Execution only continues after a HLT instruction by
activating reset or have an interrupt occur.
 Both the reset and the interrupt must come from the
external hardware.
 The use of this command must be reserved for special
purposes such as catastrophic system failure.

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MACHINE CONTROL INSTRUCTIONS
 An interrupt is a hardware-initiated subroutine call, that
interrupts the currently executing program.
 Whenever the hardware interrupts the microprocessor, it
calls a subroutine that services the interrupt. This special
subroutine is called an interrupt service subroutine (ISR).

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 MACHINE CONTROL INSTRUCTIONS
 The RIM and SIM instructions read or write the SID and
SOD pins.
 The TRAP input is a maskable input that cannot be
affected by the interrupt control instructions.
 The interrupt control instructions affect the remaining
four inputs (RST 7.5, RST 6.5, RST 5.5, and INTR).

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MACHINE CONTROL INSTRUCTIONS
 Whenever an ISR takes effect, all future interrupts
are disabled (except TRAP).
 This is why a special instruction (El) reenables the
interrupt inputs.
 The EI instruction enables INTR and all the interrupt
inputs that are unmasked.
 The Dl instruction disables all the interrupt inputs
except the TRAP. (Note: TRAP disables other
interrupts when accepted by the microprocessor).

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SIM INSTRUCTIONS
 The SIM instruction (set interrupt masks) enables or disables
the RST 7.5, RST 6.5, and RST 5.5 pins.
 This instruction also controls the SOD (serial output data) pin on
the 8085 and resets the edge-triggered RST 7.5 input.
 Table 6-8 lists the bits of the accumulator before a SIM and their
effect on the operation of the machine.

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SIM INSTRUCTIONS
 E.g. to set the SOD pin on the 8085, SOD bit (of the acc.)
must equal to ‘1’ and this follows the execution of the SIM
instruction.
 To change the masks for the RST pins, set the MSE bit and
then place a 0 or 1 in each mask bit. A mask of 1 turns the
corresponding interrupt input off, and a mask of 0 turns it
on.

These instructions enable the RST 6.5 pin and disable the RST 7.5 and
RST 5.5 pins.
After the mask bit enables the pin, the El instruction must be executed
to turn on the RST pin.

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 RIM INSTRUCTIONS
 The RIM instruction (read interrupt mask) reads the
SID pin (serial input data), the masks, interrupt pins,
and the interrupt enable status.
 The RIM instructions will read the information listed

in Table 6-9 into the accumulator.

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 RIM INSTRUCTIONS

 The IE bit of the accumulator shows whether El or DI

has been executed most recently.
 This bit also changes whenever an interrupt takes effect,
because interrupts always clear IE disabling future
interrupts. .

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MACHINE CONTROL OPERATIONS

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