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CS220 Lecture 14

The document provides an overview of instruction set architecture, focusing on the MIPS instruction set and its operations, including arithmetic instructions and operand handling. It explains how high-level language (HLL) programs are compiled into MIPS assembly language, detailing the mapping of variables to registers and the importance of efficient register allocation. Additionally, it discusses memory operands and data transfer instructions necessary for accessing complex data structures in memory.

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0% found this document useful (0 votes)
10 views15 pages

CS220 Lecture 14

The document provides an overview of instruction set architecture, focusing on the MIPS instruction set and its operations, including arithmetic instructions and operand handling. It explains how high-level language (HLL) programs are compiled into MIPS assembly language, detailing the mapping of variables to registers and the importance of efficient register allocation. Additionally, it discusses memory operands and data transfer instructions necessary for accessing complex data structures in memory.

Uploaded by

cvishnoi23
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Organization: Instruction Set Architecture

Debapriya Basu Roy


Department of Computer Science & Engineering
Indian Institute of Technology Kanpur
[email protected]
[email protected]
Instruction and Instruction Set
• The words of a computer’s language are called instructions, and its
vocabulary is called an instruction set

• We will focus on the MIPS instruction set, an example of the instruction sets
designed during the 1980s.

• Other Instruction Sets:


• ARMv7 is similar to MIPS.
• Intel x86,
• ARMv8:which extends the address size of the ARMv7 from 32 bits to 64
bits. This instruction set is closer to MIPS than it is to ARMv7

• The similarity of instruction sets occurs because all computers are


constructed from hardware technologies based on similar underlying
principles and because there are a few basic operations that all computers
must provide

• stored-program concept: The idea that instructions and data of many types
can be stored in memory as numbers, leading to the stored program
computer.
Operations in Computer
• Every computer must be able to do arithmetic operations:
• Add, subtract, multiply, divide
• The variables operated on and the result variables are called operands
• The operands used in an operation are called source operands or read operands
• The operands used for storing the result of an operation are called destination
operands or write operands
• a = b + c: c and b are source or read operands, a is the destination or write
operand
• MIPS Instruction to add: add a, b, c instructs a computer to add the two
variables b and c and to put their sum in a
• MIPS Instruction to add four numbers:
• add a, b, c # The sum of b and c is placed in a
• add a, a, d # The sum of b, c, and d is now in a
• add a, a, e # The sum of b, c, d, and e is now in a
• Rigid: Each MIPS arithmetic instruction performs only one operation and must
always have exactly three operands.
Compiling C code into MIPS
• Example 1:
• a = b + c; d = a – e;
• In MIPS:
• add a, b, c
• sub d, a, e
• Example 2:
• f = (g + h) – (i + j);
• In MIPS:
• add t0,g,h # temporary variable t0 contains g + h
• add t1,i,j # temporary variable t1 contains i + j
• sub f,t0,t1 # f gets t0 – t1, which is (g + h) – (i + j)
• Example 3:
• d=(b+c)-e
• In MIPS:
add d, b, c
sub d, d, e
Computer Operations
• Computer operations come in many types
• Each distinct operation has a corresponding instruction that the computer
understands
• Each operation has a few operands
• Usually three in most computers
• Two are source operands and one is destination operand
• Accordingly, each instruction has a corresponding number of operands
• In a computer, all instructions may have the same number of operands or
may have a variable number of operands
• Simple designs favor uniformity and regularity in instructions
• A compiler (e.g., gcc) generates a sequence of instructions from a HLL (e.g., C)
program
• Each instruction specifies one operation
• The program containing this sequence of MIPS instructions is called a MIPS assembly
language program
• Notice that we have implicitly assumed that the MIPS instruction operands
have the same name as the C statement variables (Not usually the case)
Operands
• Each hardware operation reads its source operands from some storage and writes
its destination operand to some storage
• This storage can be either a register from the register file inside the processor
or a memory location (DRAM)
• Recall that anything that is accessed from DRAM is also copied into SRAM
cache inside the processor replacing something if the SRAM cache is already
full
• So, at any point in time, the SRAM cache stores a subset of the DRAM contents
• The data in a memory location can be found in SRAM cache or in DRAM
(DRAM is accessed only if SRAM cache does not have the data)
• Translating an HLL program to an assembly language program involves two basic
steps
• Mapping HLL operators to computer instructions
• Mapping HLL operands (or variables) to computer instruction operands
• Requires deciding which variable is stored where and when
• Every variable gets a fixed memory location
• However, this forces every computer instruction to operate on memory
operands only and obviates the need for a register file
• But accessing a register is faster than accessing memory (faster than even
SRAM cache)
Operands
• The operands of arithmetic instructions are restricted; they must be from a limited
number of special locations built directly in hardware called registers. (for MIPS).
In x86, both register and memory operands are allowed.

• Consistent latency of these operations if registers are used

• Registers are primitives used in hardware design that are also visible to the
programmer when the computer is completed,

• The size of a register in the MIPS architecture is 32 bits; groups of 32 bits occur so
frequently that they are given the name word in the MIPS architecture.

• One major difference between the variables of a programming language and


registers is the limited number of registers, typically 32 on MIPS

• The three operands of MIPS arithmetic instructions must each be chosen from one
of the 32, 32-bit registers. (Smaller is faster).

• A very large number of registers may increase the clock cycle time and the area
overhead
Operands

• Another reason for not using more than 32 is the number of bits it would
take in the instruction format,
• The MIPS convention is to use two-character names following a dollar sign to
represent a register.,$s0, $s1, . . . for registers that correspond to variables
and $t0, $t1, . . . for temporary registers
• Example:
• f = (g + h) – (i + j);
• In MIPS:
• add $t0,$s1,$s2 # register $t0 contains g + h
• add $t1,$s3,$s4 # register $t1 contains i + j
• sub $s0,$t0,$t1 # f gets $t0 – $t1, which is (g + h)–(i + j)
Register Width
• Width of register file dictates width of datapath used in computation
• Register width is typically decided based on the primitive variable types
used in HLL programs
• Makes it easy to map variables to registers
• In C language, these are char, short, int, long long, float, double
• Notice that 64-bit registers are large enough to hold a variable of any of
these types
• Since wider register file is slower, it is important to find out how often a
64-bit operand is used
• If that is not too common, a 32-bit wide register file would suffice
• A 64-bit operand will have to be mapped on a pair of registers and
may require double the 32-bit access time
• Important design principle: make the common case fast
Register Design
• Since each variable is given a unique memory location to store its value, it
must be copied to a register if an instruction wants to use it as a register
operand
• Not all variables of a program can be allocated in registers at the same
time due to restricted number of registers
• Variables are allocated in and de-allocated from registers as the
program progresses (filled from and spilled into memory)
• Large number of registers not only increase the access time of register
operands, but also can increase the clock cycle time
• Cycle time is decided by the setup time analysis
• Register read, computation of the operation, and register write can be
split into three consecutive cycles
• The cycle time will decrease compared to the previous one, but will
remain limited by max(read latency, op latency, write latency)
Register File Design
• For instructions that have two register sources and one register destination,
the best performance is achieved if the register file has two read ports and
one write port
• If the register file had a single read port, this would have required two
sequential accesses doubling the overall time to read the source operands
• If we assume that one instruction executes at a time, the write port can share
the decoder, wordline and the bitline with one of the read ports
• Register allocation of variables is the compiler’s responsibility
• Goal is to minimize the number of fills and spills because memory access is
inefficient
• Example: assume four registers r1, r2, r3, r4
• Consider the C statements:
• a=b + c; // Allocate a, b, c to r1, r2, r3
• d=e + f; // Allocate d to r4, how to allocate e and f?
• a=a + d;
• b=a + e;
Operands
• Mapping variables to operands
Consider the C statements:
a=b + c; // Allocate a, b, c to r1, r2, r3
d=e + f; // Allocate d to r4, how to allocate e and f?
a=a + d;
b=a + e;
• Assembly language translation (not exactly MIPS)
load r2, addr_b #fill b
load r3, addr_c #fill c
add r1, r2, r3 #a = b + c
load r2, addr_e #fill e
load r3, addr_f #fill f
add r4, r2, r3 #d = e + f
add r1, r1, r4 #a= a + d
add r3, r1, r2 #b=a + e
store r1, addr_a #spill a (note changed syntax)
store r3, addr_b #spill b
store r4, addr_d #spill d
Memory Operands
• Programming have usage of complex data structures like arrays and
structures. These complex data structures can contain many more data
elements than there are registers in a computer. These are kept in the
memory

• Arithmetic operations occur only on registers in MIPS instructions; thus, MIPS


must include instructions that transfer data between memory and registers.
Such instructions are called data transfer instructions.

• To access a word in memory, the instruction must supply the memory


address. Memory is just a large, single-dimensional array, with the address
acting as the index to that array, starting at 0

• The data transfer instruction that copies data from memory to a register is
traditionally called load.
Memory Operands
• The format of the load instruction is the name of the operation followed by the
register to be loaded, then a constant and register used to access memory. The
sum of the constant portion of the instruction and the contents of the second
register forms the memory address. The actual MIPS name for this instruction is
lw, standing for load word.

• Let’s assume that A is an array of 100 words and that the compiler has
associated the variables g and h with the registers $s1 and $s2 as before. Let’s
also assume that the starting address, or base address, of the array is in $s3
• g = h + A[8];
• In MIPS:
• lw $t0,8($s3) # Temporary reg $t0 gets A[8]
• add $s1,$s2,$t0 # g = h + A[8]
• The constant in a data transfer instruction (8) is called the off set, and the register
added to form the address ($s3) is called the base register.
Acknowledgement

• Dr. Mainak Chauduri


• Dr. Urbi Chatterjee

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