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Chapter 1

Chapter 1 covers the fundamentals of computer architecture and organization, distinguishing between the design blueprint (architecture) and the implementation (organization) of computer systems. It discusses key components such as the CPU, memory, and I/O, as well as performance metrics like Amdahl's Law and Little's Law. The chapter also addresses the role of interrupts and interconnection structures in enhancing processing efficiency.

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10 views51 pages

Chapter 1

Chapter 1 covers the fundamentals of computer architecture and organization, distinguishing between the design blueprint (architecture) and the implementation (organization) of computer systems. It discusses key components such as the CPU, memory, and I/O, as well as performance metrics like Amdahl's Law and Little's Law. The chapter also addresses the role of interrupts and interconnection structures in enhancing processing efficiency.

Uploaded by

fredrick.juston
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Chapter 1: Computer Fundamentals

Basic Concepts & Computer


Evolution
Computer Architecture
• Computer Architecture is a blueprint for
design and implementation of a computer
system.
• It provides the functional details and
behaviour of a computer system and
comes before computer organization.
• Architecture is those attributes visible to
the programmer
• Computer architecture deals with 'What to
do?'
Computer Organization
• Computer Organization is how operational
parts of a computer system are linked
together.
• It implements the provided computer
architecture.
• Organization is how features are
implemented
• Computer organization deals with 'How to
do?'
Differences
Functional Units of a computer

Arithmetic
Input and
logic
Memory

Output Control

I/O Processor
The System Bus
Memory organization
Connection of the memory to the processor

What is an accumulator?
The Accumulator (Register A) is the main MAR Memory Address Register
register concerned with arithmetic and MDR Memory Data Register
logical operations because the result of PC Program counter
nearly all such actions is loaded into the IR Instruction Register
accumulator
Structure
• Structure is the way in which
components relate to each other
• There are four main structural
components:
—Central processing unit (CPU)
—Main memory
—I/O
—System interconnection
Structure - Top Level

Peripherals Computer

Central Main
Processing Memory
Unit

Computer
Systems
Interconnection

Input
Output
Communication
lines
Structure - The CPU

CPU

Computer Arithmetic
Registers and
I/O Login Unit
System CPU
Bus
Internal CPU
Memory Interconnection

Control
Unit
Structure - The Control Unit

Control Unit

CPU
Sequencing
ALU Logic
Control
Internal
Unit
Bus
Control Unit
Registers Registers and
Decoders

Control
Memory
Function
• Function is the operation of individual
components as part of the structure
• All computer functions are:
—Data processing
—Data storage
—Data movement
—Control
Simplified View of Major Elements of a Multicore
Computer
Performance Issues
Amdahl’s Law

f  fraction of execution time for parallelizable


code
(1-f) fraction of execution time for sequential
N Number of Processors
T Total execution time of the program using a
single processor
Amdahl’s law for multiprocessors
Little’s Law
L = λW
λaverage rate of arrival of items per unit
time
Wunits of time the items stay in the
system
Lunits in the system at any one time
• Example of Little’s Law
• John owns a small coffee shop. He wants to know the
average number of customers queuing in his coffee shop,
to decide whether he needs to add more space to
accommodate more customers. Currently, his queuing area
can accommodate no more than eight people.
• John measured that, on average, 40 customers arrive at his
coffee shop every hour. He also determined that, on
average, a customer spends around 6 minutes in his store
(or 0.1 hours). Given these inputs, John can find the
average number of customers queuing in his coffee shop
by applying Little’s Law:
• L = 40 x 0.1 = 4 customers
• Little’s Law shows that, on average, there are only four
customers queuing in John’s coffee shop. Therefore, he
does not need to create more space in the store to
accommodate more queuing customers.
Basic Measures of Computer Performance
• Clock Speed
• Instruction execution Rate

p is the number of processor cycles needed to decode and execute the instruction
m number of memory references
k the ratio between memory cycle time and processor cycle time
Performance Factors and System Attributes
Example 1

Consider the execution of a program that results in the execution of 2 million


instructions on a 400-MHz processor. The program consists of four major types of
instructions. The instruction mix and the CPI for each instruction type are given
below, based on the result of a program trace experiment:

Calculate the average CPI and the corresponding MIPS rate when the
above program is executed on a uniprocessor with the above trace
results.
Example 2
Example 3
Example 4
Example 5

Four benchmark programs are executed on three computers with the following results:
The table shows the execution time in seconds, with 100,000,000 instructions executed
in each of the four programs. Calculate the MIPS values for each computer for each
program. Then calculate the arithmetic and harmonic means assuming equal weights
for the four programs, and rank the computers based on arithmetic mean and harmonic
mean.
Calculating the Means
Top Level View of
Computer Function and
Interconnection
Computer Components
Computer Function:
Instruction Fetch and Execute
Basic Instruction Cycle
Characteristics of a Hypothetical Machine
Characteristics of a Hypothetical Machine
Instruction Cycle State Diagram
Interrupts
Functions of Interrupts
• An interrupt allows some module (I/O, memory) to stop the
normal processing of the processor
• Interrupts are a way to improve processing efficiency
• Interrupts are also used to stop a process when some type
of error has occurred
Classes of Interrupts
Transfer of Control via Interrupts
Instruction Cycle with Interrupts
Multiple Interrupts
Priority Interrupts

Device Priority Arrival of


interrupt
time ‘t’
Printer 2 (low) 10
Disk 4 20
Communications 5 (High) 15
Line
Instruction Cycle State Diagram, with
Interrupts
Interconnection
structure
Interconnection Structures
The interconnection structure must support
the following types of transfers:
Bus Interconnection
Types of Buses
• Data Bus
• Address Bus
• Control Bus
Bus Interconnection Scheme
Point-to-Point Interconnect

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