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L4 8086 Segmentation

The document discusses the Intel 8086 microprocessor's memory segmentation, which helps prevent overwriting of instructions by logically partitioning memory into segments for code and data. It explains the generation of physical memory addresses using segment registers and offsets, and highlights the advantages of segmentation in enabling multitasking by allowing multiple programs to coexist in memory without conflict. Additionally, it cautions about the limitations of segment sizes and addressing modes to avoid accessing invalid memory locations.

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0% found this document useful (0 votes)
23 views22 pages

L4 8086 Segmentation

The document discusses the Intel 8086 microprocessor's memory segmentation, which helps prevent overwriting of instructions by logically partitioning memory into segments for code and data. It explains the generation of physical memory addresses using segment registers and offsets, and highlights the advantages of segmentation in enabling multitasking by allowing multiple programs to coexist in memory without conflict. Additionally, it cautions about the limitations of segment sizes and addressing modes to avoid accessing invalid memory locations.

Uploaded by

adityagupta.ahd
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Intel 8086

Microprocessor
Memory
Segmentation
Background

o Most of the present-day computers use von-Neuman architecture


o This means code and data share the same physical memory
o Hence there is a real danger of a program over writing the
instructions and corrupting itself

Memory Address(0x) Instruction


1000 MOV AX,15H
1003 ADD AX,BX
1005 MOV [1000],AX ;Coding
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mistake. wanted to store data in 2000H but accidently wrote 1000H
Background

o Overwriting an instruction results is unpredicted system behavior


and could be disastrous
o One way to avoid it is to use Harvard architecture where physically
separate memory chips are used to store program and data
o One idea is to logically partition a physical memory instead of
having physically multiple memory chips
o That is what we do in memory segmentation

3
Memory Segmentation

o Consider memory with 20-bit address bus

10000H
10001H
. 64K Memory region to store code (instructions)
.
1FFFFH
20000H
20001H
. 64K Memory region to store data (Eg: variables)
.
2FFFFH

4
How to Segment?

o The idea is not to directly use the addresses specified in the


program
o Instead use those addresses as an offset from a base address
o For example, in the previous memory partitioning, we observe most
significant nibble for code partition is always 0x1 and for the data
partition is always 0x2
o So instead telling the programmer that the actual address but is 20-
bits we tell him it is only 16 bits
o The upper 4-bits are added separately depending on which partition
needs to be accessed
5
8086 Programming Model Cont..

Contains the upper 16-bits of


the starting address of a
Instruction Pointer (IP) (16) memory segment (partition)

Code Segment (CS) (16) In 8086 the size of a segment


is 64KB
Stack Segment (SS) (16)
Total addressable memory is
Data Segment(DS) (16) 1MB

Extra Segment (ES) (16) At any given point in time,


there will be a maximum of 4
active segments present in the
memory

Segments may overlap


6
Generation of Physical Memory Address

o Segment registers contain the upper 16-bits of memory address


o This is called segment base address
o Segment base address is left shifted by 4 positions and added
with an offset to get final memory address called physical
address
o For example, to fetch an instruction, 8086 uses instruction pointer
(IP)
o Instruction pointer by default uses CS register to get its segment
base address
o Physical address of instruction is obtained by left shifting CS by 4
bits and adding IP
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Generation of Physical Memory Address

Eg:
0x1000 0x1FF0
CS IP

Physical address of instruction


Step 1: Left shift CS by 4 positions. 0x1000 << 4 = 0x10000
Step 2: Add IP to it 0x10000 + 0x1FF0 = 0x11FF0
o 0x11FF0 is the final 20-bit address going to the memory
o It is called the physical address since physically that is the address
seen by the memory
8
Generation of Physical Memory Address

8086 BIU has a dedicated


adder to find the physical
address. Using ALU for this
Purpose would have had
significant effect on performance

9
Example Segmented Memory
Address
20000H 2000
DS
Data segment

2FFFFH 348A
348A0H
CS
Code segment

4489FH
50000H
5000
SS Stack Segment
5FFFFH
70000H
7000 Extra segment
ES
7FFFFH 10
Bottom of data segment
Memory
Generation of Physical Memory Address

o 20-bit physical address can be also represented in segment:offset


format
o Thus, address of an instruction can be represented as CS:IP
o For the previous example, physical address of instruction is 11FF0
or 1000:1FF0
o There is no memory access without a segment register
involved!!
Access Type Default Segment Access Type Default Segment
Direct DS DI DS
IP CS BX DS
SP SS BP SS
SI DS Immediate DS 11
Quick review of addressing modes

Immediate addressing:
MOV BYTE PTR [2000],35
o Default segment register is data segment (DS)
o 35H is copied to (DS<<4)+2000H
o This instruction can be written with explicit segment register also
MOV BYTE PTR DS:[2000],35
o The default segment can be overridden by explicitly specifying it
MOV BYTE PTR ES:[2000],35
o 35H is copied to (ES<<4)+2000H

12
Quick review of addressing modes

Direct/Displacement addressing:
MOV CX,[23FE]
o Default segment register is data segment (DS)
o Data is copied from (DS<<4)+23FEH to CX
o Default segment can be over-ridden
MOV CX,SS:[23FE]
Register Indirect addressing:
o BX, DI and SI use DS as the default segment register
o BP uses stack segment
MOV AX,[BX]; physical address is (DS<<4)+BX
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MOV AX,[BP]; physical address is (SS<<4)+BP
Quick review of addressing modes

Base+Index/Register Relative/Base relative+Index:


o BX, DI and SI use DS as the default segment register
o BP uses stack segment
MOV DX,[BP+SI]; Physical address = (SS<<4)+BP+SI
MOV AX,[BX+100]; Physical address = (DS<<4)+BP+100
MOV AX,[BP+SI+100]; Physical address =
(SS<<4)+BP+SI+100
o Again, default segments can be overridden

14
Caution!!

o Size of an 8086-memory segment is always 64KB


o You should be careful when you use addressing modes such as
base+index, register relative etc. to access data within the segment
o Eg: DS = 2000  Segment starting address 20000, segment ending
address 2FFFF, BX = E200
MOV AX,[BX+1F2E]
o If you blindly calculate physical address
Physical Address = DS<<4+BX+1F2E = 3012E
o But this address is not in this segment

15
Caution!!

o What processor does is; it will only take 16-bits of offset for adding
with segment register
o If offset contains more than 16-bits, it will drop the MS bits (upper
bits)
o For previous example, total offset
BX+1F2E = E200+1F2E = 1012E
o Since 1012E contains 17 bits, MS bit is dropped and offset is taken
as 012E
o Thus, physical address is
DS<<4+012E = 2012E, which is with in the segment
o Similar approach is taken if the final physical address calculated has16

more than 20-bits


Other Advantages of Segmentation: Multi-
tasking

o Earlier computers were not capable to multi-tasking and were used


for executing a single program for a single user
o When multi-tasking was introduced, it was necessary to keep more
than one program concurrently in the main memory
o It is very much possible that these multiple programs were written
assuming they will be stored in the main memory starting at the
same address (Eg: Address 0x0)
o If segmentation were not there, multi-tasking is not possible here
since both cannot concurrently occupy same address
o But with the help of segmentation, multi-tasking is possible
17
Other Advantages of Segmentation: Multi-
tasking

o Idea is to use different code/data segments for the two programs

mov ax,bx mov ax,cx


add ax,cx sub ax,cx
mov [bx],ax mov [bp],ax
………. ……….
……… ………
……… ………

pgm1.asm pgm2.asm
o Store both programs at address 10000H and 20000H and store
1000H in CS while executing program1 and 2000H in CS while
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executing program2
Other Advantages of Segmentation: Multi-
tasking

10000H
pgrm1

CS 20000H

pgrm2
IP
8086

RAM 19
Other Advantages of Segmentation: Multi-
tasking

10000H
pgrm1

1000
CS 20000H

0000 pgrm2
IP
8086

Now 8086 is executing pgrm1 RAM 20


Other Advantages of Segmentation: Multi-
tasking

10000H
pgrm1

2000
CS 20000H

0000 pgrm2
IP
8086

Now 8086 is executing pgrm2 RAM 21


Thank you
any questions

22

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