Scribd
Upload
13 views7 pages

Direct Memory Access: Submitted By, Anugraha S Raj

Direct Memory Access (DMA) allows hardware subsystems to access main memory independently of the CPU, enabling efficient data transfer. DMA operates in two modes: Burst Transfer, where data is transferred in a continuous block, and Cycle Stealing, where data is transferred one word at a time while temporarily suspending CPU operations. The DMA controller manages the transfer process, utilizing registers for address, word count, and control to facilitate communication between the CPU and I/O devices.

Uploaded by

anugrahaksd
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
13 views7 pages

Direct Memory Access: Submitted By, Anugraha S Raj

Direct Memory Access (DMA) allows hardware subsystems to access main memory independently of the CPU, enabling efficient data transfer. DMA operates in two modes: Burst Transfer, where data is transferred in a continuous block, and Cycle Stealing, where data is transferred one word at a time while temporarily suspending CPU operations. The DMA controller manages the transfer process, utilizing registers for address, word count, and control to facilitate communication between the CPU and I/O devices.

Uploaded by

anugrahaksd
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 7

DIRECT MEMORY

ACCESS

Submitted by,
ANUGRAHA S RAJ
Direct Memory
Access

What is DMA?
-DMA is a feature of computerized system that allows the
certain hardware subsystems to access main memory
independently of CPU.
In DMA,the CPU is idle and the peripheral device manage the
memory buses directly.
DMA
Transfer
modes

DMA Transfer is done by 2 ways,

 Burst Transfer: By Burst transfer a block of words is transferred in a


continuous burst. This mode is needed for fast devices where data cannot be
stopped until the entire block is transferred. Then the controller
informs the CPU by sending an interrupt signal.

 Cycle Stealing: The controller transfers one word at a time & return the bus
control to the CPU. The CPU then temporarily suspends its operation for one
memory cycle to allow the DMA transfer to steal its memory cycle
Working
of DMA

The DMA requests the CPU to release the


buses using the BR input. When BR is active,
the CPU stops executing and releases the
address, data, read, and write lines.

The CPU signals this to the DMA using BG. The


DMA then controls the buses to transfer data
without the CPU's help.

When the DMA finishes, it releases BR, and


the CPU releases BG, takes back control of the
buses, and resumes its normal work.
DMA
Transfer

• The I/O device requests a DMA transfer.


• The DMA controller activates the bus request line.
• The CPU acknowledges the request.
• The DMA sends the memory address and initiates a read or write operation.
• The I/O device transfers data to or from memory.
• The DMA updates its address and word count.
• If the word count is not zero, the DMA checks for another request.
• If no request, the DMA releases the bus.
• When the CPU needs another transfer, the DMA requests the bus again.
• If the word count reaches zero, the DMA stops and informs the CPU.
DMA
Controlle
r

• The CPU controls the DMA registers using the address bus, DS, and RS inputs.
• When BG is 0, the CPU can access the DMA registers.
• When BG is 1, the DMA can directly access memory.

 The DMA has three registers: Address, Word Count, and Control.

• The Address register stores the memory location.


• The Word Count register stores the number of words to be transferred.
• The Control register sets the transfer mode.
• The DMA communicates with external devices using request and acknowledge lines.
THANK YOU

You might also like