Unit 2 Electronics
Unit 2 Electronics
npn transistor
• 2 n- and 1 p-type layers of material
pnp transistor
• 2 p- and 1 n-type layers of material
Application of BJT
Area of collector region is larger then emitter region. Base region is much smaller
then both emitter and collector region.
Position of the terminals and symbol
Symbol
pnp
npn
Transistor currents
-The arrow is always drawn
on the emitter
A very small number of carriers (+) will recombine through n-type material
to the base terminal. Resulting IB is typically in order of microamperes.
The large number of majority carriers will diffuse across the reverse-biased
junction into the p-type material connected to the collector terminal.
• Majority carriers can cross the reverse-biased
junction because the injected majority carriers will
appear as minority carriers in the n-type material.
• Applying KCL to the transistor :
IE = IC + IB
• The comprises of two components – the majority
IC = ICmajority + ICOminority
This constitutes the base current, it flows due to recombination of electrons and
holes (Note that the direction of conventional current flow is same to that of the flow
of holes). The remaining large number of holes will cross the reverse-biased collector
junction to constitute the collector current. Thus by KCL
The base current is very small as compared to emitter and collector current.
Here, the majority of charge carriers are holes. The operation of a n-p-n transistor is
same as of the p-n-p, the only difference is that the majority charge carriers are
electrons instead of holes.
By design, most of the BJT collector current is due to the flow of charge carriers
(electrons or holes) injected from a heavily doped emitter into the base where they
are minority carriers that diffuse toward the collector, and so BJTs are classified
as minority-carrier devices.
Depending on the possibilities of circuit configurations transistor connections are
of three types.
Here emitter-base circuit is taken as input circuit and collector base circuit as output circuit.
Current Gain
Here the input current is emitter current IE and output current is collector current
IC. The current gain in common base configuration is given by
Here it is seen that the current gain has value not more than unity since collector
current in no way can be more than emitter current.
But as we know that the emitter current and collector current are nearly equal as base
current is very small in a bipolar junction transistor, these ratios would be very near to
unity. The value generally ranges from 0.90 to 0.99.
Characteristic of Common Base Connection
Input Characteristic
This is drawn between input current and input voltage of the transistor itself. The input
current is emitter current (IE) and the input voltage is emitter-base voltage (VEB). After
crossing emitter-base junction forward barrier potential emitter current (I E) starts
increasing rapidly with increasing emitter-base voltage (VEB).
The input resistance of the circuit is the ratio of change in emitter-base voltage (ΔV EB) to
emitter current (ΔIE) at a constant collector-base voltage (VCB = Constant).
Output Characteristic:
collector current increases with an increase of collector-base voltage. But after a certain
collector-base voltage the collector-base junction gets sufficient reverse biased and
hence the collector current becomes constant for a certain emitter current and it entirely
depends on the emitter current. At that situation, the entire emitter current except base
current contributes the collector current. As the collector current becomes almost
constant for the specified emitter current at that region of the characteristic, the increase
of collector current is very small compared to the increase of collector-base voltage.
Input characteristics
The input characteristics describe the relationship between input current or base current
(IB) and input voltage or base-emitter voltage (VBE).
First, draw a vertical line and a horizontal line. The vertical line represents y-axis and
horizontal line represents x-axis. The input current or base current (I B) is taken along y-
axis (vertical line) and the input voltage (VBE) is taken along x-axis (horizontal line).
To determine the input characteristics, the output voltage VCE is kept constant at zero
volts and the input voltage VBE is increased from zero volts to different voltage levels.
For each voltage level of input voltage (VBE), the corresponding input current (IB) is
recorded.
A curve is then drawn between input current IB and input voltage VBE at constant
output voltage VCE (0 volts).
Next, the output voltage (VCE) is increased from zero volts to certain voltage level (10
volts) and the output voltage (VCE) is kept constant at 10 volts. While increasing the
output voltage (VCE), the input voltage (VBE) is kept constant at zero volts. After we kept
the output voltage (VCE) constant at 10 volts, the input voltage VBE is increased from
zero volts to different voltage levels. For each voltage level of input voltage (V BE),
the corresponding input current (IB) is recorded.
A curve is then drawn between input current IB and input voltage VBE at constant
output voltage VCE (10 volts).
This process is repeated for higher fixed values of output voltage (V CE).
When output voltage (VCE) is at zero volts and emitter-base junction is forward biased by
input voltage (VBE), the emitter-base junction acts like a normal p-n junction diode. So
the input characteristics of the CE configuration is same as the characteristics of a
normal pn junction diode.
The cut in voltage of a silicon transistor is 0.7 volts and germanium transistor is 0.3
volts. In our case, it is a silicon transistor. So from the above graph, we can see that
after 0.7 volts, a small increase in input voltage (VBE) will rapidly increases the input
current (IB).
In common emitter (CE) configuration, the input current (IB) is very small as compared to
the input current (IE) in common base (CB) configuration. The input current in CE
configuration is measured in microamperes (μA) whereas the input current in CB
configuration is measured in milliamperes (mA).
In common emitter (CE) configuration, the input current (IB) is produced in the base
region which is lightly doped and has small width. So the base region produces only a
small input current (IB). On the other hand, in common base (CB) configuration, the input
current (IE) is produced in the emitter region which is heavily doped and has large width.
So the emitter region produces a large input current (I E). Therefore, the input current (IB)
produced in the common emitter (CE) configuration is small as compared to the common
base (CB) configuration.
Due to forward bias, the emitter-base junction acts as a forward biased diode and due to
reverse bias, the collector-base junction acts as a reverse biased diode.
Therefore, the width of the depletion region at the emitter-base junction is very small
whereas the width of the depletion region at the collector-base junction is very large.
If the output voltage VCE applied to the collector-base junction is further increased, the
depletion region width further increases. The base region is lightly doped as compared to
the collector region. So the depletion region penetrates more into the base region and
less into the collector region. As a result, the width of the base region decreases which in
turn reduces the input current (IB) produced in the base region.
From the above characteristics, we can see that for higher fixed values of output voltage
VCE, the curve shifts to the right side. This is because for higher fixed values of output
voltage, the cut in voltage is increased above 0.7 volts. Therefore, to overcome this cut in
voltage, more input voltage VBE is needed than previous case.
Output characteristics
The output characteristics describe the relationship between output current (I C) and
output voltage (VCE).
First, draw a vertical line and a horizontal line. The vertical line represents y-axis and
horizontal line represents x-axis. The output current or collector current (I C) is taken
along y-axis (vertical line) and the output voltage (VCE) is taken along x-axis (horizontal
line).
To determine the output characteristics, the input current or base current I B is kept
constant at 0 μA and the output voltage VCE is increased from zero volts to different
voltage levels. For each level of output voltage, the corresponding output current (IC) is
recorded.
A curve is then drawn between output current IC and output voltage VCE at constant
input current IB (0 μA).
When the base current or input current IB = 0 μA, the transistor operates in the cut-off
region. In this region, both junctions are reverse biased.
Next, the input current (IB) is increased from 0 μA to 20 μA by adjusting the input voltage
(VBE). The input current (IB) is kept constant at 20 μA.
While increasing the input current (IB), the output voltage (VCE) is kept constant at 0 volts.
After we kept the input current (IB) constant at 20 μA, the output voltage (VCE) is increased
from zero volts to different voltage levels. For each voltage level of output voltage (V CE),
the corresponding output current (IC) is recorded.
A curve is then drawn between output current IC and output voltage VCE at constant input
current IB (20 μA). This region is known as the active region of a transistor. In this region,
emitter-base junction is forward biased and the collector-base junction is reverse biased.
This steps are repeated for higher fixed values of input current I B (I.e. 40 μA, 60 μA,
80 μA and so on).
When output voltage VCE is reduced to a small value (0.2 V), the collector-base junction
becomes forward biased. This is because the output voltage VCE has less effect on
collector-base junction than input voltage VBE.
As we know that the emitter-base junction is already forward biased. Therefore, when
both the junctions are forward biased, the transistor operates in the saturation region. In
this region, a small increase in output voltage VCE will rapidly increases the output current
IC.
Common Collector Configuration
In this configuration, the base terminal of the transistor serves as the input, the emitter
terminal is the output and the collector terminal is common for both input and output.
Hence, it is named as common collector configuration. The input is applied between the
base and collector while the output is taken from the emitter and collector.
The input supply voltage between base and collector is denoted by V BC while the output
voltage between emitter and collector is denoted by VEC.
In this configuration, input current or base current is denoted by I B and output current or
emitter current is denoted by IE. It has and highest current gain as compared to CE and
CB configuration .
Input characteristics
The input characteristics describe the relationship between input current or base
current (IB) and input voltage or base-collector voltage (VBC).
First, draw a vertical line and a horizontal line. The vertical line represents y-axis and
horizontal line represents x-axis
The input current or base current (IB) is taken along y-axis (vertical line) and the input
voltage or base-collector voltage (VBC) is taken along x-axis (horizontal line).
To determine the input characteristics, the output voltage VEC is kept constant at 3V and
the input voltage VBC is increased from zero volts to different voltage levels. For each level
of input voltage VBC, the corresponding input current IB is noted. A curve is then drawn
between input current IB and input voltage VBC at constant output voltage VEC (3V).
Next, the output voltage VEC is increased from 3V to different voltage level, say for
example 5V and then kept constant at 5V. While increasing the output voltage V EC, the
input voltage VBC is kept constant at zero volts.
After we kept the output voltage VEC constant at 5V, the input voltage VBC is increased from
zero volts to different voltage levels. For each level of input voltage VBC, the corresponding
input current IB is noted. A curve is then drawn between input current IB and input
voltage VBC at constant output voltage VEC (5V).
This process is repeated for higher fixed values of output voltage (V EC).
Output characteristics
The output characteristics describe the relationship between output current or emitter
current (IE) and output voltage or emitter-collector voltage (VEC).
First, draw a vertical line and a horizontal line. The vertical line represents y-axis and
horizontal line represents x-axis.
The output current or emitter current (IE) is taken along y-axis (vertical line) and the
output voltage or emitter-collector voltage (VEC) is taken along x-axis (horizontal line).
To determine the output characteristics, the input current IB is kept constant at zero
micro amperes and the output voltage VEC is increased from zero volts to different
voltage levels. For each level of output voltage VEC, the corresponding output current
IE is noted. A curve is then drawn between output current I E and output voltage VEC at
constant input current IB (0 μA).
Next, the input current (IB) is increased from 0 μA to 20 μA and then kept constant at
20 μA. While increasing the input current (IB), the output voltage (VEC) is kept constant at
0 volts.
After we kept the input current (IB) constant at 20 μA, the output voltage (VEC) is
increased from zero volts to different voltage levels. For each level of output voltage
(VEC), the corresponding output current (IE) is recorded. A curve is then drawn between
output current IE and output voltage VEC at constant input current IB (20μA). This region
is known as the active region of a transistor.
This process is repeated for higher fixed values of input current I B (I.e. 40 μA, 60 μA,
80 μA and so on).
In common collector configuration, if the input current or base current is zero then the
output current or emitter current is also zero. As a result, no current flows through the
transistor only the leakage current will be there which is very small. So the transistor will
be in the cutoff region.
The functioning of Junction Field Effect Transistor depends upon the flow of majority
carriers (electrons or holes) only. Basically, JFETs consist of an N type or P type silicon bar
containing PN junctions at the sides. Following are some important points to remember
about FET −
Gate − By using diffusion or alloying technique, both sides of N type bar are heavily doped
to create PN junction. These doped regions are called gate (G).
Source − It is the entry point for majority carriers through which they enter into the
semiconductor bar.
Drain − It is the exit point for majority carriers through which they leave the semiconductor
bar.
Channel − It is the area of N type material through which majority carriers pass from the
source to drain.
There are two types of JFETs commonly used in the field semiconductor
devices: N-Channel JFET and P-Channel JFET.
In N- JFET
Reverse biasing of the gate source junction with the negative voltage produces a
depletion region along the PN junction which extends into the n-channel and thus
increases its resistance by restricting the channel width as shown in the preceding figure.
𝑽𝑮𝑺 = 𝟎, 𝑽𝑫𝑺 SOME POSITIVE VALUE
Even though the n-channel resistance is increasing, the current (I D) from source
to drain through the n-channel is increasing. This is because V DS is increasing.
IG=0 and ID=IS
The most common type of insulated gate FET which is used in many different types of
electronic circuits is called the Metal Oxide Semiconductor Field Effect
Transistor or MOSFET for short.
The IGFET or MOSFET is a voltage controlled field effect transistor that differs from a JFET
in that it has a “Metal Oxide” Gate electrode which is electrically insulated from the main
semiconductor n-channel or p-channel by a very thin layer of insulating material usually
silicon dioxide, commonly known as glass.
Symbol for Depletion type MOSFET
Like the previous JFET MOSFETs are three terminal devices with a Gate, Drain
and Source and both P-channel (PMOS) and N-channel (NMOS) MOSFETs are
available. The main difference this time is that MOSFETs are available in two basic
forms:
Depletion Type – the transistor requires the Gate-Source voltage, ( VGS ) to switch
the device “OFF”. The depletion mode MOSFET is equivalent to a “Normally Closed”
switch.
Enhancement Type – the transistor requires a Gate-Source voltage, ( VGS ) to
switch the device “ON”. The enhancement mode MOSFET is equivalent to a
“Normally Open” switch.
Depletion Type MOSFET
We have seen in the previous class, that the gate of a junction field effect transistor, JFET
must be biased in such a way as to reverse-bias the pn-junction. With a insulated gate
MOSFET device no such limitations apply so it is possible to bias the gate of a MOSFET in
either polarity, positive (+ve) or negative (-ve).
Working of Depletion type MOSFET
When Vgs=0
The Depletion-mode MOSFET, which is less common than the enhancement mode
types is normally switched “ON” (conducting) without the application of a gate bias
voltage. That is the channel conducts when VGS = 0 making it a “normally-closed”
device. The circuit symbol shown above for a depletion MOS transistor uses a solid
channel line to signify a normally closed conductive channel.
When Vgs=0 and we increase he VDS the electron will start flowing from source to
drain as shown in figure above and produces the drain current I D.
The Depletion-mode MOSFET, which is “ON” (conducting) without the application of a
gate bias voltage. That is the channel conducts when VGS = 0 making it a “normally-
closed switch” device.
Transfer characteristic
Transfer characteristic is drawn between output current and input voltage. In MOSFET
output current is drain current ID and input voltage is VGS i.e gate to source voltage
Transfer characteristic when VGS < 0 Transfer characteristic when VGS >0
Enhancement Type MOSFET
Working
When drain is applied with positive voltage with respect to source and no potential is
applied to the gate two N-regions and one P-substrate from two P-N junctions
connected back to back with a resistance of the P-substrate. So a very small drain
current that is, reverse leakage current flows. If the P-type substrate is now connected
to the source terminal, there is zero voltage across the source substrate junction, and
the–drain-substrate junction remains reverse biased.
When the gate is made positive with respect to the source and the substrate, negative
(i.e. minority) charge carriers within the substrate are attracted to the positive gate and
accumulate close to the-surface of the substrate. As the gate voltage is increased, more
and more electrons accumulate under the gate. Since these electrons can not flow
across the insulated layer of silicon dioxide to the gate, so they accumulate at the
surface of the substrate just below the gate. These accumulated minority charge
carriers N -type channel stretching from drain to source. When this occurs, a channel is
induced by forming what is termed an inversion layer (N-type).
Now a drain current start flowing. The strength of the drain current depends upon the
channel resistance which, in turn, depends upon the number of charge carriers
attracted to the positive gate. Thus drain current is controlled by the gate potential.
Since the conductivity of the channel is enhanced by the positive bias on the gate so
this device is also called the enhancement MOSFET or E- MOSFET.
The minimum value of gate-to-source voltage VGS that is required to form the inversion
layer (N-type) is termed the gate-to-source threshold voltage VGST. For VGS below VGST, the
drain current ID = 0. But for VGS exceeding VGST an N-type inversion layer connects the
source to drain and the drain current ID is large. Depending upon the device being used,
VGST may vary from less than 1 V to more than 5 V.
JFETs and DE-MOSFETs are classified as the depletion-mode devices because their
conductivity depends on the action of depletion layers. E-MOSFET is classified as an
enhancement-mode device because its conductivity depends on the action of the
inversion layer. Depletion-mode devices are normally ON when the gate-source voltage
VGS = 0, whereas the enhancement-mode devices are normally OFF when V GS = 0.
Output or Drain characteristics of an N-channel E-MOSFET are shown in figure. The lowest
curve is the VGST curve. When VGS is lesser than VGST, ID is approximately zero. When VGS is
greater than VGST, the device turns- on and the drain current ID is controlled by the gate
voltage. The characteristic curves have almost vertical and almost horizontal parts. The
almost vertical components of the curves correspond to the ohmic region, and the
horizontal components correspond to the constant current region. Thus E-MOSFET can be
operated in either of these regions i.e. it can be used as a variable-voltage resistor (WR) or
as a constant current source.
Transfer Characteristic
Figure shows a typical trans-conductance curve. The current I DSS at VGS <=0 is very small,
being of the order of a few nano-amperes. When the V GS is made positive, the drain
current ID increases slowly at first, and then much more rapidly with an increase in V GS.