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Vlsi Presentation

The document discusses various VLSI design styles, focusing on programmable and non-programmable designs. It highlights the flexibility of programmable VLSI, particularly through FPGAs, and contrasts it with gate arrays, which require a two-step manufacturing process for customization. Additionally, it compares the advantages of FPGAs and gate arrays in terms of prototyping speed, chip utilization, and design customization.

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27 views12 pages

Vlsi Presentation

The document discusses various VLSI design styles, focusing on programmable and non-programmable designs. It highlights the flexibility of programmable VLSI, particularly through FPGAs, and contrasts it with gate arrays, which require a two-step manufacturing process for customization. Additionally, it compares the advantages of FPGAs and gate arrays in terms of prototyping speed, chip utilization, and design customization.

Uploaded by

ashwin.sp.004
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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EASWARI ENGINEERING COLLEGE

(AN AUTONOMOUS INSTITUTION)

Comparison of Various
VLSI Design Styles
Subject name: VLSI
Subject code: 191ECC601T

Team Members
ASHWIN SP(21)
(4
VLSI DESIGN
VLSI design is a complex and challenging field, involving the creation of integrated circuits that contain millions or billions of
transistors. There are several different types of VLSI design, each of which offers its own set of advantages and
disadvantages.

● Programmable VLSI Design


● Non-programmable VLSI Design
PROGRAMMABLE VLSI DESIGN
Programmable VLSI design involves creating a circuit that can be easily reconfigured to perform different tasks. This is
accomplished through the use of programmable logic elements, such as FPGAs or CPLDs. These elements contain a set
of configurable digital logic gates that can be programmed to perform a wide range of functions. Programmable VLSI
designs are typically created using a combination of custom digital logic circuits and programmable logic elements, allowing
for a high degree of flexibility and adaptability.

Programmable Logic Devices

Programmable Logic Device (PLD)

Field Programmable Gate Array (FPGA)

Gate Array
Field Programmable Gate Array

ARCHITECTURE:
FPGA ROUTING
WORK FLOW
Design Entry – In schematic, VHDL, or Verilog.

• Implementation – Placement & Routing – Bitstream generation – Analyze timing,


view layout, simulation, etc.

• Download – Directly to Xilinx hardware devices with unlimited reconfigurations


USES OF FPGA
● Video and imaging processing.
● Military applications.
● Software-defined radio.
● Medical imaging.
● Wired and wireless communications.
● Integration of multiple simple programmable logic devices.
● Voice recognition.
● Cryptography.
● Digital signal processing.
● ASIC prototyping
● Device controllers
GATE ARRAY
A gate-array (MPGAs) consists of transistors prefabricated on a wafer in the form
of a regular 2-D array.

• Initially the transistors in an array are not connected to one another. In order to
realize a circuit on a gate-array, metal connections must be placed using the usual
process of masking (personalizing).
WORK FLOW
Gate array implementation requires a two-step manufacturing process:
● The first phase, which is based on generic (standard) masks, results in an
array of uncommitted transistors on each GA chip.
● These uncommitted chips can be customized later, which is completed by
defining the metal interconnects between the transistors of the array
TWO-STEP MANUFACTURE
COMPARISON BETWEEN FPGA AND GATE ARRAY

In view of the fast prototyping capability, the gate array (GA) comes after the
FPGA. – Design implementation of

• FPGA chip is done with user programming,

• Gate array is done with metal mask design and processing.

The GA chip utilization factor is higher than that of FPGA. – The used chip area
divided by the total chip area. • Chip speed is also higher. – More customized
design can be achieved with metal mask designs. • Current gate array chips can
implement as many as hundreds of thousands of logic gates

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