Material Science in Electrical Engineering

Problem 6

20 Jan 2023

MSc Electronics - Engineering 1

Problem 6
Problem
statement

Final exam 2/
Material Science
ENERGY BAND DIAGRAMS

a. When the bias voltage is zero, the band diagram is under a

thermal equilibrium condition. The Fermi levels for both
materials are equal.
b. If we apply a positive voltage to the metal with respect to
the n-type semiconductor, . When a forward bias s applied,
electrons can move easily from the semiconductor into the
metal because the barrier has been reduced by a voltage
VF.
c. For reverse bias (i.e., a negative voltage is applied to the
metal), the barrier has been increased by a voltage VR. It is
more difficult for electrons to flow from the semiconductor
into the metal. We have similar results for p-type
semiconductor, however, the polarities must be reversed.
Interface states
• Irregularities of the crystal
structure at surface
• Are occupied by electrons below
• alignment achieved by these
trapped electrons
• shifts down relative to at interface
[1]

02/01/2025 4
 Schottky - vs. PN - Junction
• of a Schottky- 100…1000 times
higher than PN-junction
• Strong conduction:
• Schottky: 0.2 – 0.3 V
• PN: 0.7 V

Current voltage characteristics of a Schottky

and a PN junction diode

02/01/2025 5
Application of Schottky diodes

• Schottky diodes are used as rectifiers in switched-mode power supplies. The low forward voltage and fast recovery
time leads to increased efficiency.
• Schottky diodes can be used in diode-bridge based sample and hold circuits. When compared to regular p–n
junction based diode bridges, Schottky diodes can offer advantages.

23-02-2023 6
•
JFET
The Current conduction is controlled by means of an electric field between the gate and the conducting
channel of the device .
• Vds Is biased so that drain current flows from source to drain. The width and resistance of the channel is
controlled by changing vgs, As Vgs increases, depletion layer increases and the channel narrows therefore
drain current ID decreases.
• when the drain voltage is increased to the "saturation drain voltage“ The two depletion regions will touch one
another near the drain. This phenomenon is known as the channel "pinch-off“
• The current does not increase when the drain voltage is increased above VDs at but rather remains constant
(IDsat)Drain Saturation Current

7
 MESFET

• N and p types
Modes:
• In depletion mode MESFETs- by making the gate more negative the depletion channel
is enlarged, because negative electrons are repelled by the negative gate voltage, in P-
channel devices making the gate voltage more positive achieves this.
• In enhancement mode devices- the depletion zone normally covers the whole channel
at Vg=Vs and no drain current flows, only when a positive (for N-channel types) is
applied the depletion channel reduces, allowing for current flow.
 Problem 6

A MOSFET is a field-effect transistor (FET with an insulated gate) where the

voltage determines the conductivity of the device. This ability to change
conductivity with the amount of applied voltage makes it very useful for
amplifying or switching electronic signals.

The main advantage is that it requires almost no input current to control the load
current due to its high input resistance of the oxide layer, when compared with
bipolar transistors

Final exam 20 Jan 2023 2/

Material Science
Problem 1

MOSFET ACCUMULATION

In accumulation mode, a negative voltage is applied

to the
gate. This pushes electrons to gather on the surface
of the
metal. An equal but opposite quantity of charges
(holes )
will gather on the other end of the oxide. As this
negative
voltage increases, more positive charges accumulate
on the
semiconductor part of oxide. Hence the term
accumulation

Final exam 4/8

Material Science
Problem 1

MOSFET DEPLETION

In Depletion mode, a positive voltage is applied to the gate

with respect to the bulk. This positive voltage accumulates
positive charges on the surface of the metal. This in turn
repels all the holes in the substrate leaving behind just the
acceptor ions. It is the lack of majority charge carriers
towards the surface of the oxide in the substrate side that
makes it to be called the depletion region. This region has
been depleted of its majority charge carriers

The reduced amount of holes towards the surface makes

the oxide makes the bands to bend downward since fermi
level has to be farther from valence band in the scenario

Final exam 20 Jan 2023 4/8

Material Science
 Problem 1

MOSFET INVERSION

In the inversion mode, a voltage that is greater than the threshold voltage is applied on the
gate of the MOSFET. At this voltage, minority charge carriers within the substrate begin the
accumulate on the surface of the oxide making it look more like an n-type substrate. This
inversion layer connect the drain to the source for conduction

Final exam 20 Jan 2023 4/8

Material Science
 Problem 1
MOSFET STRONG
INVERSION

In the strong inversion mode, the bulk potential is two times the surface potential as seen
on the figure above.

Final exam 20 Jan 2022 4/8

Material Science
Problem 1

C-V Characteristics

Final exam 20 Jan 2022 4/8

Material Science
Problem 1
Accumulation at low
frequency
When the gate voltage is negative an accumulation layer is present.
As the gate voltage varies a corresponding variation of the accumulation
charge occurs, and the capacitance of the structure is equal to

Here,

Final exam 20 Jan 2022 4/8

Material Science
Problem 1

Depletion at low frequency

When the gate voltage is increased the silicon surface becomes depleted,
and the variations of gate voltage induce variations of the depletion charge.
The value of the capacitance is then given by the series combination of the
gate and depletion region capacitances.

Here,

Final exam 20 Jan 2022 4/8

Material Science
Problem 1

Inversion at low frequency

As the gate voltage is further increased an inversion layer is formed and

variations of gate voltage give rise to variations of inversion charge and thus
the measure capacitance is again equal to

Final exam 20 Jan 2022 4/8

Material Science
Problem 1

A higher frequency for small ac Signal

(1MHz)
Thermal generation cannot create minority carriers fast enough to support a
variation of charge in the inversion layer.

The variation of charge due to the variation of the gate voltage is no longer
supported by the inversion charge, but by a variation of the depletion charge.

The depth of the depletion region is equal to where is a small modulation of

the depletion depth due to the application of the small ac gate bias.

the series association of the gate capacitance, and the depletion

capacitance,

Final exam 20 Jan 2022 4/8

Material Science
Problem 1

Frequency Higher than 1MHz

• If a fast gate voltage ramp is used there is no time for generation of

minority carriers (electrons).

• Majority carriers are readily available to form an accumulation layer, so

that the accumulation part of the curve remains unchanged.

Final exam 20 Jan 2022 4/8

Material Science
Problem 1

Deep Depletion Regime

When the gate voltage is ramped up, a depletion layer is formed, but no
inversion layer can be formed.

Therefore, only a depletion charge can respond to the gate voltage variation.

• The depletion depth can be larger than .

• The value of the capacitance is

• The surface potential is not clamped at

Final exam 20 Jan 2022 4/8

Material Science
Problem 1

Very High Frequency AC Signal 1GHz or

Higher
• If a very high-frequency ac signal is used, even majority carriers may not
have time to react to the gate voltage variation.
• Frequencies of 1 GHz or higher must be used for this effect to appear. The
higher the doping concentration, the higher the frequency.
• In this case the whole semiconductor sample behaves as a dielectric
(dielectric mode of operation).
• Capacitance of the structure is given by the series association of and where
is the thickness of the silicon wafer

Final exam 20 Jan 2022 4/8

Material Science
Problem 6

Thank you

Final exam 13 Jan 2022 9

Material Science