Chapter 7 discusses target code generation as the final phase of the compiler model, converting intermediate representations into machine-readable code. It emphasizes the importance of efficient register allocation and provides examples of generating code from three-address statements. The chapter concludes with a summary of the full compilation process, from lexical analysis to code generation.
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Chapter 7
Chapter 7 discusses target code generation as the final phase of the compiler model, converting intermediate representations into machine-readable code. It emphasizes the importance of efficient register allocation and provides examples of generating code from three-address statements. The chapter concludes with a summary of the full compilation process, from lexical analysis to code generation.
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Chapter 7
Target Code Generation
Code Generator • There are 2 main code generator: • 1] Intermediate Code Generator ( see chapter 5) • 2] Target Code Generator Target Code generation • is the final phase in compiler model. It takes as input an intermediate representation of the source program and produces as output an equivalent target program. • The code generation techniques can be used whether or not an optimizing phase occurs before code generation. Target Code generation • The main purpose of the Target Code Generator is to write a code that the machine can understand and also register allocation, instruction selection, etc. The output is dependent on the type of assembler. • This is the final stage of compilation. The optimized code is converted into relocatable machine code which then forms the input to the linker and loader. Target Code generation • The code generated by the compiler is an object code of some lower- level programming language, for example, assembly language.
• The source code written in a higher-level language is transformed into
a lower-level language that results in a lower-level object code, which should have the following minimum properties: • It should carry the exact meaning of the source code. • It should be efficient in terms of CPU usage and memory management. Register Allocations in Code Generation
• Computations are generally assumed to be performed on high-speed
memory locations, known as registers. • Performing various operations on registers is efficient as registers are faster than cache memory. • This feature is effectively used by compilers. However, registers are not available in large amount and they are costly. Therefore, we should try to use minimum number of registers to incur overall low cost. Register Allocations in Code Generation • Register allocation is an important method in the final phase of the compiler. It maps an unlimited namespace onto that register set of the target machine. Generating Code for Statement Example 1:- Consider the three-address statement x = 5 + 3 * 2
Three-Address Code (TAC)
t1 = 3 * 2 MOV R1, #3 ; Load 3 into R1
MOV R2, #2 ; Load 2 into R2 t2 = 5 + t1 MUL R3, R1, R2 ; Multiply R1 and R2, store result in R3 x = t2 MOV R4, #5 ; Load 5 into R4 Optimized TAC ADD R5, R4, R3 ; Add R4 and R3, store result in R5 MOV x, R5 ; Assign R5 to x t1 = 3 * 2 x = 5 + t1 Generating Code for Statement Example 2:- Consider the three-address statement x:= y + z. It can have the following sequence of codes:
MOV y,R0 /* load y into register R0 */
ADD z,R0 /* add z to R0 */ MOV R0,x /* store R0 into x */ Generating Code for Statement Example 3:- The statement d:= (a-b) + (a-c) + (a-c) The statement d:= (a-b) + (a-c) + (a-c) CONCLUSION • In computing, code generation is part of the process chain of a compiler and converts intermediate representation of source code into a form (e.g., machine code) that can be readily executed by the target system. • The code generator within a compiler is responsible for converting intermediate code to target code. • Code generation can be considered as the final phase of compilation. • The code generated by the compiler is an object code of some lower- level programming language, for example, assembly language. Full Flow Summary 1.Lexical Analysis: Convert source code to tokens. 2.Syntax Analysis: Generate a parse tree. 3.Semantic Analysis: Ensure semantic correctness. 4.Intermediate Code Generation: Convert to TAC or IR. 5.Optimization: Simplify or optimize TAC. 6.Code Generation: Emit machine/assembly code. Additional examples • The provided assignment statement w:=(x−y)+(x−z)+(x−z) can be represented as a sequence of three-address codes in a queue: • The corresponding code sequence for the given problem is expressed as: TAC: a := x - y b := x - z c := a + b w := b + c Additional examples w:=(x−y)+(x−z)+(x−z) Additional examples w:=(x−y)+(x−z)+(x−z) • Code Generation: • For a := x - y, it generates the assembly-like code MOV x, R0 (moves the value of x to register R0) and SUB y, R0 (subtracts the value of y from the content of R0). • For b := x - z, it generates MOV x, R1 and SUB z, R1. • For c := a + b, it generates ADD R1, R0 (adds the content of R1 to the content of R0). • For w := b + c, it generates ADD R1, R0 and MOV R0, w. • Register Descriptor: • After a := x - y, R0 contains the value of a. • After b := x - z, R1 contains the value of b. • After c := a + b, R0 contains the value of c. • After w := b + c, R0 contains the value of w. • Address Descriptor: • For each assignment, it indicates that the values are directly stored in registers