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Chapter 4

Chapter Four discusses data movement and arithmetic instructions in assembly language, detailing how data is copied between registers and memory locations. It explains various instructions like MOV, XCHG, ADD, and logical operations such as AND, OR, NOT, and XOR, including their effects on condition code flags. The chapter emphasizes the limitations of certain operations, such as memory-to-memory moves and the handling of segment registers.

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0% found this document useful (0 votes)
17 views18 pages

Chapter 4

Chapter Four discusses data movement and arithmetic instructions in assembly language, detailing how data is copied between registers and memory locations. It explains various instructions like MOV, XCHG, ADD, and logical operations such as AND, OR, NOT, and XOR, including their effects on condition code flags. The chapter emphasizes the limitations of certain operations, such as memory-to-memory moves and the handling of segment registers.

Uploaded by

Rabuma Geleta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Chapter Four:

INSTRUCTIONS

Data movement & ALU


Data Movement Instruction.
Data movement instructions must somehow
indicate the amount of data to be moved
When we say that the contents of memory
location 2000 have been moved to some register,
we always mean that an identical copy has been
created there and that the original is still
undisturbed in location 2000.
Data movement instructions would better be
called ‘‘data duplication’’ instructions, but the
term ‘‘data movement’’ is already established.
The data movement instructions copy values from
one location to another. These instructions
include mov, xchg, lds, lea, les, lfs, lgs, lss, push,
pusha, pushad, pushf, pushfd, pop, popa, popad,
MOV instruction
copies the second operand (source) to the first
operand(destination)
 the source operand can be an immediate value, general-purpose register
or memory location.
 the destination register can be a general-purpose register, or memory
location.
both operands must be the same size, which can be a byte or
a word
The following types of operands are supported:
MOV REG, memory
MOV memory, REG
MOV REG, REG
MOV memory, immediate
MOV REG, immediate
Where;
REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI,
SI, BP, SP.

for segment registers only these types of MOV are
supported:
MOV SREG, memory
MOV memory, SREG
MOV REG, SREG
MOV SREG, REG
Where;
SREG: DS, ES, SS, and only as second operand: CS.
REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI,
SI, BP, SP.
memory: [BX], [BX+SI+7], variable, etc...
NOTE
The MOV instruction cannot be used to set the value of
the CS and IP registers.
There is no memory to memory move operation.
you cannot move immediate data into a segment register.
(should copy to general register first )

Example: Load DS with 5000H.
MOV DS, 5000H; Not permitted (invalid)
Thus to transfer an immediate data into the segment register,
the correct procedure is given below.
MOV AX, 5000H
MOV DS, AX
It may be noted, here, that both the source and destination
operands cannot be memory locations (Except for string
instructions).
Other MOV instruction examples are given below with the
corresponding addressing modes.
MOV AX, 5000H; Immediate
MOV AX, BX; Register
MOV AX, [SI]; Indirect
MOV AX, [200 OH]; Direct
MOV AX, 50H [BX]; Based relative, 50H Displacement
XCHG: Exchange
This instruction exchanges the contents of the
specified source and destination operands, which
may be registers or one of them may be a memory
location.
However, exchange of data contents of two
memory locations is not permitted.
Algorithm: operand1 < - > operand2

Example
XCHG [5000H], AX ; This instruction exchanges data
between AX and a ; memory location [5000H] in the data
segment.

XCHG BX ; This instruction exchanges data between AX


and BX
Arithmetic and Logic
Instructions
These instructions usually perform the arithmetic operations,
like addition, subtraction, multiplication and division
instructions.
 The increment and decrement operations also belong to this type of
instructions.
The operands are either the registers or memory locations or
immediate data depending upon the addressing mode.
Most Arithmetic and Logic Instructions affect the processor
status register (or Flags). 16 bits in this register, each bit
a flag can take a value of 1 or 0.
 Carry Flag (CF) - this flag is set to 1 when there is an unsigned overflow.
 Zero Flag (ZF) - set to 1 when result is zero. For none zero result this flag is set to 0.
 Sign Flag (SF) - set to 1 when result is negative. When result is positive it is set to 0.
Actually this flag take the value of the most significant bit.
 Overflow Flag (OF) - set to 1 when there is a signed overflow. For example, when
you add bytes 100 + 50 (result is not in range -128...127).
 Parity Flag (PF) - this flag is set to 1 when there is even number of one bits in result,
and to 0 when there is odd number of one bits. Even if result is a word only 8 low
bits are analyzed!
 Auxiliary Flag (AF) - set to 1 when there is an unsigned overflow for low nibble (4
bits).
ADD:
This instruction adds an immediate data or contents of a
memory location specified in the instruction or a register
( source ) to the contents of another register (destination) or
memory location. The result is in the destination operand.
However, both the source and destination operands cannot be
memory operands. Also the contents of the segment registers
cannot be added using this instruction.
The examples of this instruction are given along with the
corresponding modes.
 ADD AX, 0100H Immediate
 ADD AX, BX Register
 ADD AX, [SI] Register indirect
Example
 ADD AL,BL AL = AL + BL
 ADD CX,DI CX = CX + D
 ADD CL,44H CL = CL + 44H
 ADD CL,[BP] The byte contents of the stack segment memory location
addressed by BP add to CL with the sum stored in CL
 ADD BX,[SI+2] The word contents of the data segment memory location
ADC: Add with Carry
This instruction performs the same operation as
ADD instruction, but adds the carry flag bit (which
may be set as a result of the previous calculations)
to the result.
Example
ADC AL,AH AL = AL + AH + carry
ADC CX,BX CX = CX + BX + carry

Example: Program
STC ; set CF = 1
MOV AL, 5 ; AL = 5
ADC AL, 1 ; AL = 7
RET
INC and DEC
INC: Increment
 This instruction increments the contents of the specified register or
memory location by 1.
 All the condition code flags are affected except the carry flag CF.
 This instruction adds 1 to the contents of the operand.
Program
 The examples of this instruction are as follows: Example:
 INC AX Register  MOV AL, 4
 INC [BX] Register indirect  INC AL ; AL = 5
 INC [5000H] Direct
 RET
 Example:

DEC: Decrement
 The decrement instruction subtracts 1 from the contents of the specified
register or memory location.
 All the condition code flags except carry flag are affected depending upon
the result.
 The examples of this instruction are as follows: Program Example:
 DEC  MOV AL, 255 ; AL = 0FFh (255 or -
AX Register
 DEC [500OH]
1)
Direct
 DEC AL ; AL = 0FEh (254 or -2)
 RET
SUB: Subtract
The subtract instruction subtracts the source
operand from the destination operand and the
result is left in the destination operand.
Source operand may be a register, memory location
or immediate
data and the destination operand may be a register
or a memory location, but source and destination
operands both must not be memory operands.
All the condition code flags are affected by this
instruction.
examples
SUB AX, BX Register
SUB AX, [5000H] Direct
SUB [5000H], 0100 Immediate
SUB CL,BL CL = CL – BL
SBB: Subtract with Borrow
The subtract with borrow instruction subtracts the
source operand and the borrow flag (CF) which
may reflect the result of the previous calculations,
from the destination operand.
Subtraction with borrow, here means subtracting 1
from the subtraction obtained by SUB, if carry
(borrow) flag is set.
The result is stored in the destination operand. All
the flags are affected (Condition code) by this
instruction.
Example
SBB O100H Immediate [destination AX]
SBB AX.BX Register
SBB AX, [5000H] Direct
Example Program:
MUL , IMUL, DIV and IDIV
These types of operands are supported:
REG
Memory
 REG:AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP.
 memory: [BX], [BX+SI+7], variable, etc...

MUL and IMUL instructions affect these flags only


CF, OF
When result is over operand size these flags are set to 1, when
result fits in operand size these flags are set to 0.
For DIV and IDIV flags are undefined.
MUL - Unsigned multiply:
when operand is a byte: AX = AL * operand.
when operand is a word: (DX AX) = AX * operand.

IMUL - Signed multiply:


when operand is a byte: AX = AL * operand.
when operand is a word: (DX AX) = AX * operand.

DIV - Unsigned divide:
when operand is a byte:
AL = AX / operand
AH = remainder (modulus). .
when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus). .

IDIV - Signed divide:


when operand is a byte:
AL = AX / operand
AH = remainder (modulus).
.when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus). .
Logical Instructions
These type of instructions are used for carrying
out the bit by bit shift, rotate, or basic logical
operations.
All the condition code flags are affected
depending upon the result.
Basic logical operations available with 8086
instruction set are AND, OR, NOT, and XOR
AND
Logical AND between all bits of two operands.
Result is stored in operand1.
These rules apply:
1 AND 1 = 1
1 AND 0 = 0
0 AND 1 = 0
0 AND 0 = 0
Example:
MOV AL, 'a' ;
AL = 01100001b AND AL, 11011111b ;
AL = 01000001b ('A')
RET
OR
Logical OR between all bits of two operands.
Result is stored in first operand.
These rules apply:
1 OR 1 = 1
1 OR 0 = 1
0 OR 1 = 1
0 OR 0 = 0
Example:
MOV AL, 'A' ; AL = 01000001b
OR AL, 00100000b ; AL = 01100001b ('a')
RET

NOT
 invert each bit of the operand.
 Algorithm:
 if bit is 1 turn it to 0.
 if bit is 0 turn it to
 Example:
MOV AL, 00011011b
NOT AL ; AL = 11100100b
RET
Logical XOR (Exclusive OR) between all bits of two
operands.
 Result is stored in first operand.
 These rules apply:
1 XOR 1 = 0
1 XOR 0 = 1
0 XOR 1 = 1
0 XOR 0 = 0
Example:
MOV AL, 00000111b
XOR AL, 00000010b ; AL = 00000101b

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