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Lecture Slides 07 074-Caches-Org

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21 views13 pages

Lecture Slides 07 074-Caches-Org

Uploaded by

yihuangece
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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University of Washington

Section 7: Memory and Caches


 Cache basics
 Principle of locality
 Memory hierarchies
 Cache organization
 Program optimizations that consider caches

Cache Organization
University of Washington

Where should we put data in the cache?


Memory Cache
0000
0001
0010
0011
0100
0101 Index Data
0110 00
0111 01
1000 10
1001 11
1010
1011
1100
1101
1110
1111
 How can we compute this mapping?
Cache Organization
University of Washington

Where should we put data in the


cache?
Memory Cache
0000
0001
0010
0011
0100
0101 Index Data
0110 00
0111 01
1000 10
1001 11
1010
1011
1100
1101
1110 Hmm.. The cache might get confused later!
1111
Why? And how do we solve that?
Cache Organization
University of Washington

Use tags!
Memory Cache
0000
0001
0010
0011
0100
0101 Index Tag Data
0110 00 00
0111 01 ??
1000 10 01
1001 11 01
1010
1011
1100
1101
1110
1111

Cache Organization
University of Washington

What’s a cache block? (or cache line)


Byte Block (line)
Address number
0 0
1
2 1
3
4 2 Index
5
6 0
3
7 1
8 2
4
9 3
10 5
11
12 6
13
14 7
15

Cache Organization
University of Washington

A puzzle.
 What can you infer from this:

 Cache starts empty


 Access (addr, hit/miss) stream
 (10, miss), (11, hit), (12, miss)

Cache Organization
University of Washington

Problems with direct mapped


caches?
 What happens if a Memory
program uses addresses
Address

2, 6, 2, 6, 2, …? 0000
0001
0010
0011
0100 Index
0101
0110 00
0111 01
1000 10
1001 11
1010
1011
1100
1101
1110
1111

Cache Organization
University of Washington

Associativity
 What if we could store data in any place in the cache?
 But that might slow down caches… so we do something in
between.
1-way 2-way 4-way 8-way
8 sets, 4 sets, 2 sets, 1 set,
1 block each 2 blocks each 4 blocks each 8 blocks

Set Set Set Set


0
1 0
2 0
3 1
0
4 2
5 1
6 3
7

direct mapped fully associative

Cache Organization
University of Washington

But now how do I know where data goes?

(m-k-n) bits k bits


n-bit Block
m-bit Address Tag Index Offset

Our example used a 22-block cache with 21 bytes


per block. Where would 13 (1101) be stored?

? bits ? bits
?-bits Block
4-bit Address Offset

Cache Organization
University of Washington

Example placement in set-associative


caches
 Where would data from address 0x1833 be placed?
 Block size is 16 bytes.
 0x1833in binary is 00...0110000 011 0011.

(m-k-n) bits k bits


n-bit Block
m-bit Address Tag Index Offset

k=? k=? k=?

1-way associativity 2-way associativity 4-way associativity


8 sets, 1 block each 4 sets, 2 blocks each 2 sets, 4 blocks each

Set Set Set


0
1 0
2 0
3 1
4 2
5 1
6 3
7
Cache Organization
University of Washington

Example placement in set-associative caches

 Where would data from address 0x1833 be placed?


 Block size is 16 bytes.
 0x1833in binary is 00...0110000 011 0011.

(m-k-4) bits k bits


4-bit Block
m-bit Address Tag Index Offset

k=3 k=2 k=1


1-way associativity 2-way associativity 4-way associativity
8 sets, 1 block each 4 sets, 2 blocks each 2 sets, 4 blocks each

Set Set Set


0
1 0
2 0
3 1
4 2
5 1
6 3
7

Cache Organization
University of Washington

Block replacement
 Any empty block in the correct set may be used for storing
data.
 If there are no empty blocks, which one should we replace?
 Replace something, of course, but what?
 Caches typically use something close to least-recently-used

1-way associativity 2-way associativity 4-way associativity


8 sets, 1 block each 4 sets, 2 blocks each 2 sets, 4 blocks each

Set Set Set


0
1 0
2 0
3 1
4 2
5 1
6 3
7

Cache Organization
University of Washington

Another puzzle.
 What can you infer from this:

 Cache starts empty


 Access (addr, hit/miss) stream
 (10, miss); (12, miss); (10, miss)

Cache Organization

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