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ACA Syllabus

The document outlines a course on Advanced Computer Architectures, covering fundamental concepts, pipelining, instruction-level parallelism, multiprocessors, memory hierarchy, and hardware/software for VLIW and EPIC. It includes a detailed breakdown of units with specific topics and hours allocated for each. Textbooks and reference materials are also provided for further study.
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0% found this document useful (0 votes)
22 views10 pages

ACA Syllabus

The document outlines a course on Advanced Computer Architectures, covering fundamental concepts, pipelining, instruction-level parallelism, multiprocessors, memory hierarchy, and hardware/software for VLIW and EPIC. It includes a detailed breakdown of units with specific topics and hours allocated for each. Textbooks and reference materials are also provided for further study.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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ADVANCED

COMPUTER
ARCHITECTURES

Subject Code: 10CS74

Dinesh Prasanna
Associate Professor, Dept. of CSE
UNIT – 1

• Fundamentals Of Computer Design:


Introduction; Classes of computers;
Defining computer architecture; Trends in
Technology, power in Integrated Circuits and
cost; Dependability; Measuring, reporting and
summarizing Performance; Quantitative
Principles of computer design. 6 hrs
UNIT – 2

Pipelining: Introduction; Pipeline hazards;


Implementation of pipeline; What makes
pipelining hard to implement?
6 Hours
UNIT – 3
Instruction –Level Parallelism – 1:
• ILP: Concepts and challenges; Basic Compiler
Techniques for exposing ILP; Reducing Branch
costs with prediction; Overcoming Data
hazards with Dynamic scheduling;
Hardwarebased speculation.

7 Hours
UNIT – 4
• Instruction –Level Parallelism – 2:
Exploiting ILP using multiple issue and static
scheduling; Exploiting ILP using dynamic
scheduling, multiple issue and speculation;
Advanced Techniques for instruction delivery
and Speculation;
The Intel Pentium 4 as example.
Part B
UNIT – 5

• Multiprocessors and Thread –Level Parallelism:


Introduction; Symmetric shared- memory
architectures; Performance of symmetric shared–
memory multiprocessors; Distributed shared
memory and directory-based coherence;
Basics of synchronization; Models of Memory
Consistency
7 Hours
UNIT – 6
Review of Memory Hierarchy:
Introduction; Cache performance; Cache
Optimizations, Virtual memory

6 Hours
UNIT – 7
• Memory Hierarchy design:
Introduction; Advanced optimizations of Cache
performance; Memory technology and
optimizations; Protection: Virtual memory
and virtual machines.

6 Hours
UNIT – 8
• Hardware and Software for VLIW and EPIC:
Introduction: Exploiting Instruction-Level Parallelism
Statically; Detecting and Enhancing Loop-Level
Parallelism; Scheduling and Structuring Code for
Parallelism;
• Hardware Support for Exposing Parallelism:
Predicated Instructions; Hardware Support for
Compiler Speculation;
The Intel IA-64 Architecture and Itanium Processor;
Conclusions.
Text Books:
• 1. John L. Hennessey and David A. Patterson:
Computer Architecture, A Quantitative Approach,
4th Edition, Elsevier, 2007.
(Chapter. 1.1 to 1.9, 2.1 to 2.10, 4.1to 4.6, 5.1 to 5.4,
Appendix A, Appendix C, Appendix G)

Reference Books:
• 1. Kai Hwang: Advanced Computer Architecture
Parallelism, Scalability, Programability, 2nd Edition,
Tata Mc Graw Hill, 2010.

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