ACA Syllabus
ACA Syllabus
COMPUTER
ARCHITECTURES
Dinesh Prasanna
Associate Professor, Dept. of CSE
UNIT – 1
7 Hours
UNIT – 4
• Instruction –Level Parallelism – 2:
Exploiting ILP using multiple issue and static
scheduling; Exploiting ILP using dynamic
scheduling, multiple issue and speculation;
Advanced Techniques for instruction delivery
and Speculation;
The Intel Pentium 4 as example.
Part B
UNIT – 5
6 Hours
UNIT – 7
• Memory Hierarchy design:
Introduction; Advanced optimizations of Cache
performance; Memory technology and
optimizations; Protection: Virtual memory
and virtual machines.
6 Hours
UNIT – 8
• Hardware and Software for VLIW and EPIC:
Introduction: Exploiting Instruction-Level Parallelism
Statically; Detecting and Enhancing Loop-Level
Parallelism; Scheduling and Structuring Code for
Parallelism;
• Hardware Support for Exposing Parallelism:
Predicated Instructions; Hardware Support for
Compiler Speculation;
The Intel IA-64 Architecture and Itanium Processor;
Conclusions.
Text Books:
• 1. John L. Hennessey and David A. Patterson:
Computer Architecture, A Quantitative Approach,
4th Edition, Elsevier, 2007.
(Chapter. 1.1 to 1.9, 2.1 to 2.10, 4.1to 4.6, 5.1 to 5.4,
Appendix A, Appendix C, Appendix G)
Reference Books:
• 1. Kai Hwang: Advanced Computer Architecture
Parallelism, Scalability, Programability, 2nd Edition,
Tata Mc Graw Hill, 2010.