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Lecture 23

The document discusses the performance of a program over seven years, highlighting a 40% annual improvement in CPU time while I/O time remains constant. It also covers the advantages and disadvantages of memory-mapped I/O, various types of errors, and the architecture of I/O buses in modern computers. Additionally, it presents a problem statement regarding bandwidth limitations when connecting multiple components to an I/O bus.

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3 views

Lecture 23

The document discusses the performance of a program over seven years, highlighting a 40% annual improvement in CPU time while I/O time remains constant. It also covers the advantages and disadvantages of memory-mapped I/O, various types of errors, and the architecture of I/O buses in modern computers. Additionally, it presents a problem statement regarding bandwidth limitations when connecting multiple components to an I/O bus.

Uploaded by

imaan maqsood
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Suppose that a certain program

takes 200 seconds of elapsed time


to execute. Out of these 200
seconds, 180 seconds is the CPU
time and the rest is I/O time. If the
CPU performance improves by 40%
every year for the next seven years
because of developments in
technology, but the I/O
performance stays the same then
1
Review

2
CS501
Advanced Computer
Architecture

Lecture23

Dr.Noor Muhammad Sheikh


3
Elapsed time = CPU time + I/O time

the I/O time = 200 – 180 = 20 sec

• which is 10 % of the elapsed time.

4
Year CPU I/O Elapse ...I/O Time..
# Tim Tim d Elapsed
e e Time Time
0 180 20 200 10 %
1 129 20 149 13.42 %
2 92 20 112 17.85 %
3 66 20 86 23.25 %
4 47 20 67 29.85 %
5 34 20 54 37.03 %
6 24 20 44 45.45 %
7 17 20 37 54.05 % 5
6
7
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• For Pentium processor, the I/O
devices are mapped on the I/O
space.

• For SRC, there is no separate I/O


space.

• Some address space out of the


memory address space is used to
map I/O devices in SRC.
9
Advantages of Memory
Mapped I/O
• All the instructions which access
memory can be used for I/O
devices.

• No need for including separate


I/O instructions in the ISA of the
processor. 10
Disadvantages of Memory
Mapped I/O

• The I/O interface will become


complex.

• If partial decoding is used to


reduce the complexity of the I/O
interface, then a lot of memory
addresses will be consumed. 11
PENTIUM ADDRESS SPACE
PENTIUM I/O MAP(64K)
0007h 0006h 0005h 0004h 0003h 0002h 0001h 0000h

FFFFh FFFEh FFFDh FFFCh FFFFh FFFFh FFF9h FFF8h

PENTIUM MEMORY MAP


00000007h 00000000h

000FFFFFh 000FFFF8h

FFFFFFFFh FFFFFFF8h
12
BANK7 BANK6 BANK5 BANK4 BANK3 BANK2 BANK1 BANK0
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• The waveforms correspond to a “read”
operation.

• A similar explanation is applied to a


“write” operation.

• The latching of the incoming data can


be done by the master either by using
the rising edge of the Enable signal or
by using its falling-edge.
17
• Framing Error

• Parity Error

• Overrun Error

• Underrun Error
18
Framing Error

A 0 is received instead of a stop


bit (which is always a 1).

19
Parity Error

The parity of the received data


is not the same as it should
be.

20
Overrun Error

The prior character that was


received, was not still read by the
CPU and is over written by a new
received character.

21
Underrun Error

No character is available at the


beginning of an interval.

22
Block diagram of a modern
general purpose digital computer

Computer bus
or
system bus

The bus interface


unit is usually
between the CPU
and the system.

23
I/O Sub System
CPU

HARD DISK
PROCESSOR

EXTERNAL BUS

BUS

INTERFACE
CD-ROM
UNIT

MEMORY BUS

VIDEO CARD
MONITOR
MEMORY

SYSTEM
I/O BUS 24
Examples of I/O buses :

• The PCI bus

• The ISA bus

25
• I/O buses provide an “abstract
interface”.

• By standardizing the I/O buses, as


done by several agencies, the third
party manufacturers can build add-on
sub systems for existing architectures.

• The location of these I/O buses may be


different in different computers.
26
• Earlier generation computers used a
single bus to communicate with the
memory as well as the I/O devices.

• This causes the bandwidth of the bus


to shared between the memory and
I/O devices.

27
• Now-a-days ,the computers have
separate memory and I/O buses.

• This situation gives more flexibility to


users wanting to upgrade their
existing systems.

28
Disadvantages of I/O Buses

• Every bus has a fixed bandwidth.

• Electrical constraints further


reduce the bandwidth .

29
Problem Statement:

Consider an I/O bus that can transfer 4


bytes of data in one bus cycle. Suppose
that a designer is considering to attach the
following two components to this bus:
• Hard drive, with a transfer rate of
40MBytes/sec.
• Video card, with a transfer rate of 128MBytes/sec.

What will be the implications? 30


The maximum frequency of the bus is 30
MHz.

The maximum bandwidth = 30 x 4


of this bus
= 120Mbytes/sec.

The demand for


bandwidth of these = 128 + 40
two components
= 168Mbytes/sec

31
Conclusion:

• 168MBytes is more than the 120


Mbytes/sec that the bus can provide.

• One or both of these components will


operate at reduced bandwidth.

32
Bus Arbitration

33

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