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Lecture 25

The document outlines the design of a 16-bit parallel input port for the FALCON-A CPU, specifically mapped to address 7Eh in the I/O space. It details the use of tri-state buffers for data isolation, the control signals involved, and the assembly language program for monitoring input and controlling LEDs based on switch settings. Additionally, it discusses the advantages and disadvantages of memory-mapped I/O and data bus multiplexing in interfacing with peripherals.

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6 views38 pages

Lecture 25

The document outlines the design of a 16-bit parallel input port for the FALCON-A CPU, specifically mapped to address 7Eh in the I/O space. It details the use of tri-state buffers for data isolation, the control signals involved, and the assembly language program for monitoring input and controlling LEDs based on switch settings. Additionally, it discusses the advantages and disadvantages of memory-mapped I/O and data bus multiplexing in interfacing with peripherals.

Uploaded by

imaan maqsood
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 38

Problem Statement:

Design a 16-bit parallel input port


mapped on address 7Eh of the I/O
space of the FALCON-A CPU.

1
CS501
Advanced Computer
Architecture

Lecture25

Dr.Noor Muhammad Sheikh


2
Differences

• The address in this case is 7Eh.


• The address decoder has the
inputs A7 and A0 inverted.
• Control bus signal IOR# is used
instead of the signal IOW#.

3
• A set of sixteen tri-state buffers is used
for the data isolation.

• The switches S15...S0 are used to


simulate the input data.

4
A 16-bit Parallel Input Port for
the FALCON-A at Address 7Eh
and 7Fh
Design#1

5
6
A 16-bit Parallel Input Port for
the FALCON-A at Address
7Eh and 7Fh
Design#2

7
8
Given a FALCON-A processor with a 16-
bit parallel input port at address 7Eh and a
16-bit parallel output port at address DEh.
Sixteen LED branches are used to display
the data at the output port and sixteen
switches are used to send data through
the input port. Write an assembly
language program to continuously monitor
the input port and blink the LED or LED(s)
corresponding to the switch(es) set to
logic 1.
9
• Send the bit pattern to the output
port at the address DEh.

• This will cause the LEDs to turn


on.

• The program waits, then turns all


the LEDs off and waits again.
10
• After the second wait, the
program reads the input port
again.

• The LEDs that will be turned on


according to the new switch
settings at the input port.

• The process repeats indefinitely. 11


• It is also possible to use a
single address for both the
input and the output port.

• This can be done with the help


of a decoder.

12
Start

Read switch settings from 7Eh

Send bit patterns of switches


to turn LEDs on

wait

Turn all LEDs off

wait

13
Example
FALCON-A’s Address
Decoder for an I/O Port at
Address 2Ch

14
15
• Replace the IOW# signal
with the MEMW# signal.

• Use the entire CPU


address bus at the input of
the address decoder.
16
17
• The address decoder uses the
addresses 00DEh and 00DFh of the
FALCON-A’s memory space.

• Use the store instruction instead of


the out instruction for sending the
data to the output port.
18
Advantage of the Memory
Mapped Output Port

• More than 256 ports are available


for use.

19
Disadvantage

• The address decoder will become


more complex, resulting in
increased hardware costs.

20
21
Data bus multiplexing refers to
the situation :

• when one part of the data bus is


connected to the peripheral’s data bus
at one time, and

• the second part of the data bus is


connected to the peripheral’s data bus
at a different time.
22
23
Explanation

• An 8-bit peripheral is to be interfaced


with a CPU.

• The CPU has a 16-bit (or larger) data


bus, but a byte-wide address space.

24
• Each byte transferred over the data
bus has a separate address.

• Data bus multiplexing is used to attach


8-bit peripheral with the CPU.

• Tri-state buffers can be used for this


purpose.

25
If the CPU allows the use of a part of
its data bus during a transfer then:

• each 16-bit general purpose register


can be used as two separate 8-bit
registers.

• e.g., r1 can be split as r1L and r1H


such that

r1L<7..0> := r1<7..0>
r1H<7..0> := r1<15..8> 26
The advantage of data bus
multiplexing:

All addresses are utilized and


none of them is wasted.

27
Disadvantages

• The complexity of the interface is


increased

• The cost of the interface is also


increased.
28
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Signal Directio Function Pin# Pin#
Name n Summary (25-DB) (36-DB)
w.r.t. CPU Printer
Printer side side
D<7..0> Input 8-bit data bus 9,8,…,2 9,8,…,2
1-bit control signal
STROBE# Input High: default value. 1 1
Low: read-in of data is performed.
1-bit status signal
ACKNLG# Output Low: data has been received and the printer is ready to accept new 10 10
data.
High: default value.
1-bit status signal
BUSY Output Low: default value 11 11
High: see note#1
1-bit status signal
PE# Output High: the printer is out of paper. 12 12
Low: default value.
1-bit control signal
INIT# Input Low: the printer controller is reset to its initial state and the print 16 31
buffer is cleared.
High: default value.

SLCT Output 1-bit status signal 13 13


High: the printer is in selected state.

AUTO Input 1-bit control signal


FEED XT# Low: paper is automatically fed after one line. 14 14
1-bit control signal
Low: data entry to the printer
is possible.
SLCT IN# Input High: data entry to printer is not
17 36
possible.

1-bit status signal 15 32


Low: see note#2. 30
ERROR# Output
High: default value.
31
Centronics Bit Assignment
for the I/O Ports

Logical Description 7 6 5 4 3 2 1 0
Address

0 8-bit output port for D<7> D<6> D<5> D<4> D<3> D<2> D<1> D<0>
DATA

1 8-bit input port for BUSY ACKNLG# PE# SLCT ERROR# Unused Unused Unused
STATUS

2 8-bit output port for Unused Unused DIR IRQEN SLCT IN# INIT# Auto Feed STROBE#
CONTROL XT#

32
Summary

33
Review

34
Problem Statement:

Design a Centronics parallel printer


interface for the FALCON-A CPU. Map
this interface starting at address 38h (56
decimal) of the FALCON-A’s I/O
address space.

35
• The Centronics interface requires at
least three I/O addresses.

• Use three contiguous even addresses,


i.e., 38h, 3Ah and 3Ch for the address
decoder design.

• Connect data bus lines D7...D0 of the


FALCON-A to the 8-bit data bus of the
printer .

• Leave the lines D15...D8 unconnected. 36


37
Address Decoder for a
memory mapped 16-bit
parallel output port for the
FALCON-A at address DODEH
and OODEFH

38

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