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Lec 25-28 Encoders, Mux Demux

The document provides an overview of encoders, multiplexers (MUX), and demultiplexers (DEMUX), explaining their functions and applications in digital circuits. It details how encoders convert decimal inputs to coded outputs like BCD, while multiplexers route data from multiple sources to a single output line. Additionally, it describes demultiplexers as devices that reverse the multiplexing function, distributing data from one input line to several output lines.

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Daniya Abbasi
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15 views19 pages

Lec 25-28 Encoders, Mux Demux

The document provides an overview of encoders, multiplexers (MUX), and demultiplexers (DEMUX), explaining their functions and applications in digital circuits. It details how encoders convert decimal inputs to coded outputs like BCD, while multiplexers route data from multiple sources to a single output line. Additionally, it describes demultiplexers as devices that reverse the multiplexing function, distributing data from one input line to several output lines.

Uploaded by

Daniya Abbasi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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ENCODERS, MUX &

DEMUX
What is Encoder
• Its a combinational logic circuit that performs a “reverse” decoder
function.
• accepts an active level on one of its inputs representing a digit, such
as a decimal, and converts it to a coded output, such as BCD or binary,
using a certain logic.
• The process of converting from familiar symbols or numbers to a
coded format is called encoding.
• Encoding techniques are widely used to translate human language
characters to the codes that machines understand.
Encoder
.

Decimal to Binary Encoder


Decimal to BCD Encoder.
• 10-to-4-line Encoder/ Dec-to-Binary
Encoder is set of combinational logics
that convert Decimal codes to BCD
codes.
• That is used in calculators, keyboards,
Numb-pad locks etc.
• has ten decimal input four outputs
corresponding to the BCD code
• In order to analyze the logic, relationship between
each BCD bit and the decimal digits is determined.
• example, BCD code for A3, is always a 1 for
decimal digit 8 or 9.
An OR expression for bit A3 in terms of the decimal
digits can therefore be written as
A3 = 8 + 9
• Bit A2 is always a 1 for decimal digit 4, 5, 6 or 7
and can be expressed as an OR function as
follows: A2 = 4 + 5 + 6 + 7
• Bit A1 is always a 1 for decimal digit 2, 3, 6, or 7
and can be expressed as A1 = 2 + 3 + 6 + 7
• Finally, A0 is always a 1 for decimal digit 1, 3, 5, 7,
or 9.
• The expression for A0 is A0 = 1 + 3 + 5 + 7 + 9
• logic circuitry required for encoding each decimal digit
to a BCD code by using the logic expressions is shown.
• It is simply a matter of ORing the appropriate decimal
digit input lines to form each BCD output.

BCD output
Decimal input
00
1101
0
7
Decimal
5 to
BCD
3 Encoder
0
Logical circuit of Decimal to Binary Encoder

When a HIGH appears on one of the decimal digit input


lines, the appropriate levels occur on the four BCD
output lines.
Multiplexers (Data Selectors)
• A multiplexer (MUX) is a device that allows digital information from
several sources to be routed onto a single line for transmission over
that line to a common destination.
• The basic multiplexer has several data-input lines and a single output
line.
• It also has data-select inputs, which permit digital data on any one of
the inputs to be switched to the output line.
• Multiplexers are also known as data selectors.
• A logic symbol for a 4-input multiplexer (MUX) is shown.
• Notice that there are two data-select lines because with two select
bits, any one of the four data-input lines can be selected.
• a 2-bit code on the data-select (S) inputs will
allow the data on the selected data input to
pass through to the data output.
• If a binary 0 (S1 = 0 and S0 = 0) is applied to
the data-select lines, the data on input D0
appear on the data-output line.
• If a binary 1 (S1 = 0 and S0 = 1) is applied to
the data-select lines, the data on input D1
appear on the data output.
• If a binary 2 (S1 = 1 and S0 = 0) is applied, the
data on D2 appear on the output.
• If a binary 3 (S1 = 1 and S0 = 1) is applied, the
data on D3 are switched to the output line.
• logic circuitry required to perform this multiplexing operation is
shown below. The data output is equal to the state of the selected
data input. You can therefore, derive a logic expression for the output
in terms of the data input and the select inputs.
The implementation of this
equation requires four 3-input
AND gates, a 4-input OR gate,
and two inverters to generate
the complements of S1 and S0,
Because data can be selected
from any one of the input lines,
this circuit is also referred to as
a data selector
Logic diagram for a 4-input multiplexer. Open file F06-44 to verify operation.
• .
Solution
The binary state of the data-
select inputs during each
interval determines which
data input is selected.
Notice that the data-select
inputs go through a
repetitive binary sequence
00, 01, 10, 11, 00, 01, 10, 11,
and so on.
Hw problem
• Construct a timing diagram showing all inputs and the output if the S0
and S1 waveforms from the previous problem are interchanged.
Implementation: Data
Selector/Multiplexer
• Fixed-Function Device The 74HC153
is a dual four-input data
selector/multiplexer.
• The inputs to one of the multiplexers
are 1I0 through 1I3 and the inputs to
the second multiplexer are 2I0
through 2I3.
• The data select inputs are S0 and S1
and the active-low, enable inputs are
1E and 2E.
• Each of the multiplexers has an
active-low enable input.
The 74HC153 dual four-input data selector/multiplexer.
Demultiplexer
• A demultiplexer (DEMUX) basically reverses the multiplexing function.
• It takes digital information from one line and distributes it to a given
number of output lines.
• For this reason, the demultiplexer is also known as a data distributor.
• decoders can also be used as demultiplexers.
• 1-line-to-4-line demultiplexer (DEMUX) circuit is shown below.
• The data-input line goes to all of the AND gates.
• The two data-select lines enable only one gate at a time, and the data
appearing on the data-input line will pass through the selected gate
to the associated data-output line.

A 1-line-to-4-line demultiplexer.
1 to 4 line DEMUX
Hw problem
• Develop the timing diagram for the demultiplexer if the S0 and s1
waveforms are both inverted.
4-Line-to-16-Line Decoder as a
Demultiplexer

The 74HC154 1-of-16 decoder.

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