8086 Microprocessor
8086 Microprocessor
Microprocessor
Md. Nazmul Abdal
Lecturer, Department of CSE
University of Liberal Arts
Bangladesh (ULAB)
8086 Configuration
• The 8086 is designed by
Intel between early 1976
and June 8, 1978, when it
was released.
• 16-bit microprocessor
• HMOS technology
• 40 pin
• 16-bit data bus
• 20-bit address bus, 220 bit
address.
• 220 = 1 megabyte (MB)
memory
ARCHITECTURE OF 8086
Memory
EU
Why two
sections?
Because data transfer rates are usually slower compared to execution rate.
Pipelining instructions will avoid processor being idle.
What is pipelining?
The greater performance of the CPU is achieved by instruction pipelining.
EU(EXECUTION UNIT)
◦The BIU handles transfer of data and addresses between the processor and
memory I/O devices.
◦The EU receives opcode of an instrument from the queue, decodes it and then
executes it.
◦While EU is decoding an instruction or executing an instruction, the BIU
fetches instruction codes from the memory and stores them in the
queue.
◦The BIU and EU units operate asynchronously to give the 8086 an overlapping
PIPELINING IN
8086
8086 Microprocessor Architecture
BUS Interface
Unit
• As the EU has no
connection with the
system buses, this
job is done by BIU.
• It is responsible for
transmitting data,
addresses and
control signal on
BUS Interface
Unit
• Registers: BIU has 4
segment registers, CS,
DS, SS, ES. These all 4
segment registers holds
the addresses of
instructions and data in
memory.
• These values are used
by the processor to
access memory
locations.
• It also contains 1
pointer register IP.
• IP contains the address
of the next instruction
to executed by the EU.
BUS Interface
Unit
BUS Interface
UnitQueue: BIU also contain
Instruction
an instruction queue.
• BIU gets up to 6 bytes of the
next instruction and stores
them in the instruction
queue and this process is
called instruction prefetch.
• This is a process to speed
up the processor.
• Also when the EU needs to
be connected with memory
or peripherals, BIU suspends
instruction prefetch and
performs the needed
operations.
BUS Interface
Unit
BUS Interface
Unit
Ans:
• If 2 byte is empty then refill the queue. Because 2-byte = 16-bit and
8086 is 16-bit processor
• So, architect of processor builds a queue inside the processor, which
permitted you to store in advance, specific instruction that would be
executed in the future.
• Whole concept is called pipelining.
BUS Interface
Unit
Major tasks of Bus interface unit:
• If the data is in 30024H, then for a 16-bit data, 8086 can bring
it for operation using one access (30024H and 30025H
together).