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8086 Control Flow Instruction

8086 Control flow instruction

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0% found this document useful (0 votes)
29 views34 pages

8086 Control Flow Instruction

8086 Control flow instruction

Uploaded by

amanuel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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TRANSFER-OF-CONTROL INSTRUCTIONS

Note: The following rules apply to the discussions presented in


this section.
 The terms above and below are used when referring to the
magnitude of unsigned numbers.
 For example, the number 00000111 (7) is above the number
00000010 (2), whereas the number 00000100(4) is below
the number 00001110 (14).
 The terms greater and less are used to refer to the
relationship of two signed numbers.
 Greater means more positive. The number 00000111 (+7)
is greater than the number 11111110 (-2), whereas the
number 11111100 (-4) is less than the number 11110100 (-
6).
 In the case of Conditional jump instructions, the
destination address must be in the range of –128 bytes to
+127 bytes from the address of the next instruction
 These instructions do not affect any flags.
JMP (UNCONDITIONAL JUMP TO SPECIFIED DESTINATION)

 This instruction will fetch the next instruction from


the location specified in the instruction rather than
from the next location after the JMP instruction.
 If the destination is in the same code segment as the
JMP
instruction, then only the instruction pointer will be
changed to get the destination location.
 This is referred to as a near jump.
 If the destination for the jump instruction is in a
segment with a name different from that of the segment
containing the JMP instruction, then both the
instruction pointer and the code segment register
content will be changed to get the destination location.
 This referred to as a far jump.
 The JMP instruction does not affect any flag.
JMP CONTINUE
 This instruction fetches the next instruction from address at label
CONTINUE.
 If the label is in the same segment, an offset coded as part of the
instruction will be added to the instruction pointer to produce the
new fetch address.
 If the label is another segment, then IP and CS will be replaced with
value coded in part of the instruction.
 This type of jump is referred to as direct because the displacement of
the
destination or the destination itself is specified directly in the
instruction.
JMP BX
 This instruction replaces the content of IP with the content of BX. BX
must first be loaded with the offset of the destination instruction in CS.
 This is a near jump.
 It is also referred to as an indirect jump because the new value of IP
comes from a register rather than from the instruction itself, as in a
direct jump.
JMP WORD PTR [BX]

This instruction replaces IP with word from a memory location pointed to by


BX in DX.
This is an indirect near jump.

JMP DWORD PTR [SI]

This instruction replaces IP with word pointed to by SI in DS. It replaces CS


with a word pointed by SI + 2 in DS.
This is an indirect far jump.
JA / JNBE (JUMP IF ABOVE / JUMP IF NOT BELOW OR EQUAL)

 If, after a compare or some other instructions which affect flags,


the zero flag and the carry flag both are 0, this instruction will
cause execution to jump to a label given in the instruction.
 If CF and ZF are not both 0, the instruction will have no effect
on program execution.
JAE / JNB / JNC (JUMP IF ABOVE OR EQUAL / JUMP IF NOT BELOW /
JUMP IF NO CARRY)
 If, after a compare or some other instructions which affect flags, the
carry flag is 0, this instruction will cause execution to jump to a label
given in the instruction.
 If CF is 1, the instruction will have no effect on program execution.

JB / JC / JNAE (JUMP IF BELOW / JUMP IF CARRY / JUMP IF


NOT ABOVE OR EQUAL)
 If, after a compare or some other instructions which affect flags, the
carry flag is a 1, this instruction will cause execution to jump to a
label given in the instruction.

 If CF is 0, the instruction will have no effect on program execution.


JBE / JNA (JUMP IF BELOW OR EQUAL / JUMP IF NOT ABOVE)
 If, after a compare or some other instructions which affect flags,
either the zero flag or the carry flag is 1,this instruction will cause
execution to jump to a label given in the instruction.
 If CF and ZF are both 0, the instruction will have no effect on
program execution.

JG / JNLE (JUMP IF GREATER / JUMP IF NOT LESS THAN OR


EQUAL)
 This instruction is usually used after a Compare instruction.
 The instruction will cause a jump to the label given in the
instruction,
 if the zero flag is 0 and the carry flag is the same as the overflow
flag.
JGE / JNL (JUMP IF GREATER THAN OR EQUAL / JUMP IF NOT
LESS THAN)
 This instruction is usually used after a Compare instruction.
 The instruction will cause a jump to the label given in the
instruction,
 if the sign flag is equal to the overflow flag.

JL / JNGE (JUMP IF LESS THAN / JUMP IF NOT GREATER


THAN OR EQUAL)
 This instruction is usually used after a Compare instruction.

 The instruction will cause a jump to the label given in the


instruction
 if the sign flag is not equal to the overflow flag.
JLE / JNG (JUMP IF LESS THAN OR EQUAL / JUMP IF NOT
GREATER)

 This instruction is usually used after a Compare instruction.


The instruction will cause a jump to the label given in the
instruction
 if the zero flag is set, or if the sign flag not equal to the
overflow flag.

JE / JZ (JUMP IF EQUAL / JUMP IF ZERO)

 This instruction is usually used after a Compare instruction.


 If the zero flag is set, then this instruction will cause a jump to
the label given in the instruction.
JNE / JNZ (JUMP NOT EQUAL / JUMP IF NOT ZERO)

 This instruction is usually used after a Compare instruction.


 If the zero flag is 0, then this instruction will cause a jump to
the label given in the instruction.

JS (JUMP IF SIGNED / JUMP IF NEGATIVE)


 This instruction will cause a jump to the specified destination
address if the sign flag is set.
 Since a 1 in the sign flag indicates a negative signed
number, you can think of this instruction as saying “jump if
negative”.
JNS (JUMP IF NOT SIGNED / JUMP IF POSITIVE)

This instruction will cause a jump to the specified destination


address if the sign flag is 0.
Since a 0 in the sign flag indicate a positive signed number, you can
think to this instruction as saying “jump if positive”.

JP / JPE (JUMP IF PARITY / JUMP IF PARITY EVEN)


 If the number of 1’s left in the lower 8 bits of a data word after an
instruction which affects the parity flag is even, then the parity
flag will be set.

 If the parity flag is set, the JP / JPE instruction will cause a jump to
the specified destination address.
JNP / JPO (JUMP IF NO PARITY / JUMP IF PARITY ODD)
 If the number of 1’s left in the lower 8 bits of a data word after an
instruction which affects the parity flag is odd, then the parity flag is 0.

 The JNP / JPO instruction will cause a jump to the specified destination
address, if the parity flag is 0.

JO (JUMP IF OVERFLOW)

 The overflow flag will be set if the magnitude of the result


produced by some signed arithmetic operation is too large to fit
in the destination register or memory location.

 The JO instruction will cause a jump to the destination given in


the instruction, if the overflow flag is set.
JNO (JUMP IF NO OVERFLOW)

 The overflow flag will be set if some signed arithmetic operation is


too large to fit in the destination register or memory location.
 The JNO instruction will cause a jump to the destination given in
the
instruction, if the overflow flag is not set.

JCXZ (JUMP IF THE CX REGISTER IS ZERO)

 This instruction will cause a jump to the label to a given in the


instruction, if the CX register contains all 0’s.
 The instruction does not look at the zero flag when it decides
whether to jump or not.
LOOP (JUMP TO SPECIFIED LABEL IF CX =0 AFTER
AUTO DECREMENT)

 This instruction is used to repeat a series of


instructions some number of times.
 The number of times the instruction sequence is to be
repeated is loaded into CX.
 Each time the LOOP instruction executes, CX is
automatically decremented by 1.
 If CX is not 0, execution will jump to a destination
specified by a label
in the instruction.
 If CX = 0 after the auto decrement, execution will
simply go on to the next instruction after LOOP.
 The destination address for the jump must be in
the range of –128 bytes to +127 bytes from the
address of the instruction after the LOOP instruction.
LOOPE / LOOPZ (LOOP WHILE CX = 0 AND ZF = 1)
 This instruction is used to repeat a group of
instructions some number of times, or until the
zero flag becomes 0.
 The number of times the instruction sequence is to be
repeated is loaded into CX.
 Each time the LOOP instruction executes, CX is
automatically decremented by 1.
 If CX = 0 and ZF = 1, execution will jump to a
destination specified by a label in the instruction.
 In other words, the two ways to exit the loop are CX =
0 or ZF =0.

 The destination address for the jump must be in the


range of –128 bytes to +127 bytes from the address
of the instruction after the LOOPE / LOOPZ instruction.
 This instruction does not affect any flag
LOOPNE / LOOPNZ (LOOP WHILE CX =0 AND ZF =
0)
 This instruction is used to repeat a group of
instructions some number of times, or until the zero
flag becomes a 1.
 The number of times the instruction sequence is to be
repeated is loaded into the count register CX.
 Each time the LOOPNE / LOOPNZ instruction executes,
CX is automatically decremented by 1.
 If CX = 0 and ZF = 0, execution will jump to a
destination specified by a label in the instruction.
 If CX = 0, after the auto decrement or if ZF = 1,
execution simply go on the next instruction after
LOOPNE / LOOPNZ. In other words, the two ways to
exit the loop are CX = 0 or ZF = 1.
 The destination address for the jump must be in the
range of –128 bytes to +127 bytes from the address of
.model small .model small
.model small
.stack 100h .stack 100h
.stack 100h
.code .code
.code
Main proc Main proc
Main proc
mov al,8 mov al,7
mov al,7
mov dl,7 mov dl,8
mov dl,8
cmp dl,al cmp dl,al
cmp dl,al
Ja l1 JAE l1
JB l1
add dl,al add dl,al
add dl,al
mov ah,2 mov ah,2
mov ah,2
int 21h int 21h
int 21h
l1: l1:
l1:
add dl,al add dl,al
add dl,al
add dl,48 add dl,48
add dl,48
mov ah,2 mov ah,2
mov ah,2
int 21h int 21h
int 21h
Mov AH , 4ch Mov AH , 4ch
Mov AH , 4ch
Int 21h Int 21h
Int 21h
Main endp Main endp
Main endp
End Main End Main
End Main
REPEAT Instruction
REP / REPE / REPZ / REPNE / REPNZ (PREFIX)
(REPEAT STRING INSTRUCTION UNTIL SPECIFIED CONDITIONS EXIST)

 REP is a prefix, which is written before one of the


string instructions. It will cause the CX register to be
decremented and the string instruction to be repeated
until CX = 0.

 The instruction REP MOVSB, for example, will continue


to copy string bytes until the number of bytes loaded
into CX has been copied.

 REPE and REPZ are two mnemonics for the same


prefix.


 They are often used with the Compare String instruction
or with the Scan String instruction.
 They will cause the string instruction to be repeated as
long as the compared bytes or words are equal (ZF = 1)
and CX is not yet counted down to zero.
 In other words, there are two conditions that will stop
the repetition: CX = 0 or string bytes or words not
equal.
REPE CMPSB ;Compare string bytes until end of string
or
until string bytes not equal.
 REPNE and REPNZ are also two mnemonics for the
same prefix. They stand for repeat if not equal and
repeat if not zero, respectively.
 They are often used with the Compare String
instruction or with the Scan String instruction.
 They will cause the string instruction to be repeated as
.
MISCELLANEOUS INSTRUCTIONS
HLT (HALT PROCESSING)

 The HLT instruction causes the 8086 to stop fetching


and executing instructions. The 8086 will enter a halt
state.
 The different ways to get the processor out of the halt
state are with an interrupt signal on the INTR pin, an
interrupt signal on the NMI pin, or a reset signal on the
RESET input.
NOP (PERFORM NO OPERATION)
This instruction simply uses up three clock cycles and
increments the instruction pointer to point to the next
instruction.

 The NOP instruction can be used to increase the delay


of a delay loop.
ESC (ESCAPE)
 This instruction is used to pass instructions to a
coprocessor, such as the 8087 Math coprocessor,
which shares the address and data bus with 8086.

 Instructions for the coprocessor are represented by a


6-bit code embedded in the ESC instruction.

 As the 8086 fetches instruction bytes, the coprocessor


also fetches these
bytes from the data bus and puts them in its queue.
However, the coprocessor treats all the normal 8086
instructions as NOPs.

 When 8086 fetches an ESC instruction, the


coprocessor decodes the instruction and carries out
the action specified by the 6-bit code specified in the
INT – INT TYPE
The term type in the instruction format refers to a
number between 0 and 255, which identify the interrupt.
When an 8086 executes an INT instruction, it will
1. Decrement the stack pointer by 2 and push the flags
on to the stack.
2. Decrement the stack pointer by 2 and push the
content of CS onto the stack.
3. Decrement the stack pointer by 2 and push the offset
of the next instruction after the INT number instruction
on the stack.
4. Get a new value for IP from an absolute memory
address of 4 times the type specified in the instruction.
For an INT 8 instruction, for example, the new IP will be
read from address 00020H.
5. Get a new for value for CS from an absolute memory
address of 4 times the type specified in the instruction
INT 35 New IP from 0008CH, new CS from 0008Eh
INT 3 This is a special form, which has the single-byte
code of CCH;
Many systems use this as a break point instruction (Get
new IP from 0000CH new CS from 0000EH)
INTO (INTERRUPT ON OVERFLOW)
 If the overflow flag (OF) is set, this instruction
causes the 8086 to do an indirect far call to a
procedure you write to handle the overflow
condition. Before doing the call, the 8086 will:-
1. Decrement the stack pointer by 2 and push
the flags on to the stack.
2. Decrement the stack pointer by 2 and push
CS on to the stack.
3. Decrement the stack pointer by 2 and push
the offset of the next instruction after INTO
IRET (INTERRUPT RETURN)
 When the 8086 responds to an interrupt signal
or to an interrupt instruction, it pushes the
flags, the current value of CS, and the current
value of IP onto the stack.
 It then loads CS and IP with the starting address
of the procedure, which you write for the
response to that interrupt.
 The IRET instruction is used at the end of the
interrupt service procedure to return execution
to the interrupted program.
 To do this return, the 8086 copies the saved
value of IP from the stack to IP, the stored value
of CS from the stack to CS, and the stored value
of the flags back to the flag register.
LOCK – ASSERT BUS LOCK SIGNAL
 Many microcomputer systems contain several
microprocessors. Each microprocessor has its
own local buses and memory.
 The individual microprocessors are connected
together by a system bus so that each can
access system resources such as disk drive or
memory.
 Each microprocessor takes control of the
system bus only when it needs to access some
system resources.
 The LOCK prefix allows a microprocessor to
make sure that another processor does not take
control of the system bus while it is in
the middle of a critical instruction, which uses
 The LOCK prefix is put in front of the critical
instruction.
 When an instruction with a LOCK prefix
executes, the 8086 will assert its external bus
controller device, which then prevents any
other processor from taking over the system
bus.
 LOCK instruction does not affect any flag.
 LOCK XCHG SAMAPHORE, AL
The XCHG instruction requires two bus
accesses.
 The LOCK prefix prevents another processor
from taking control of the system bus between
the two accesses.
WAIT – WAIT FOR SIGNAL OR INTERRUPT SIGNAL
 When this instruction is executed, the 8086
enters an idle condition in which it is doing no
processing.
 The 8086 will stay in this idle state until the
8086 test input pin is made low or until an
interrupt signal is received on the INTR or the
NMI interrupt input pins.
 If a valid interrupt occurs while the 8086 is in
this idle state, the 8086 will return to the idle
state after the interrupt service procedure
executes.
 It returns to the idle state because the address
of the WAIT instruction is the address pushed
on the stack when the 8086 responds to the
XLAT / XLATB – TRANSLATE A BYTE IN AL
 The XLATB instruction is used to translate a
byte from one code (8 bits or less) to another
code (8 bits or less).
 The instruction replaces a byte in AL register
with a byte pointed to by BX in a lookup table in
the memory.
 Before the XLATB instruction can be executed,
the lookup table containing the values for a new
code must be put in memory, and the offset of
the starting address of the lookup table must be
loaded in BX.
 The code byte to be translated is put in AL. The
XLATB instruction adds the byte in AL to the
offset of the start of the table in BX.
XLAT / XLATB – TRANSLATE A BYTE IN AL

 The XLATB instruction is used to translate a


byte from one code (8 bits or less) to another
code (8 bits or less).

 8086 routine to convert ASCII code byte to


EBCDIC equivalent: ASCII code byte is in AL at
the start, EBCDIC code in AL after conversion.

 MOV BX, OFFSET EBCDIC Point BX to the


start of EBCDIC table in DS XLATB Replace ASCII
in AL with EBCDIC from table.
FLAG MANIPULATION INSTRUCTIONS
STC (SET CARRY FLAG)
This instruction sets the carry flag to 1. It does
not affect any other flag.
CLC (CLEAR CARRY FLAG)
This instruction resets the carry flag to 0. It does
not affect any other flag.
CMC (COMPLEMENT CARRY FLAG)
This instruction complements the carry flag. It
does not affect any other flag.
STD (SET DIRECTION FLAG)
This instruction sets the direction flag to 1. It does
not affect any other flag.
CLD (CLEAR DIRECTION FLAG)
This instruction resets the direction flag to 0. It
does not affect any other flag.
 STI (SET INTERRUPT FLAG)
Setting the interrupt flag to a 1 enables the
INTR interrupt input of the 8086.
 The instruction will not take affect until the next
instruction after STI.
 When the INTR input is enabled, an interrupt
signal on this input will then cause the 8086 to
interrupt program execution, push the return
address and flags on the stack, and execute an
interrupt service procedure.
 An IRET instruction at the end of the interrupt
service procedure will restore the return
address and flags that were pushed onto the
stack and return execution to the interrupted
program.
CLI (CLEAR INTERRUPT FLAG)
 This instruction resets the interrupt flag to 0.
 If the interrupt flag is reset, the 8086 will not
respond to an
interrupt signal on its INTR input.
 The CLI instructions, however, has no effect on
the non-maskable interrupt input, NMI.
 It does not affect any other flag.
LAHF (COPY LOW BYTE OF FLAG REGISTER TO AH REGISTER)
 The LAHF instruction copies the low-byte of the
8086 flag register to AH register.
 It can then be pushed onto the stack along
with AL by a PUSH AX instruction.
 LAHF does not affect any flag.
SAHF (COPY AH REGISTER TO LOW BYTE OF FLAG REGISTER)
 The SAHF instruction replaces the low-byte of
the 8086 flag register with a byte from the AH
register.
 SAHF changes the flags in lower byte of the flag
register.

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