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Lecture 07 - FET DC Biasing

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0% found this document useful (0 votes)
14 views

Lecture 07 - FET DC Biasing

Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 42

DC Biasing of a FET

Nimsiri Abhayasinghe
JFET Biasing
JFET Fixed Bias

VGG + IGRG + VGS = 0


Since IG = 0
VGS = - VGG

RG is present to limit current


in case VGG is connected
Since GS is with wrong polarity
reverse biased, IG This would forward bias the
= 0 and VRG = 0 gate-source junction causing
high currents, which would
destroy the transistor

3
DC Analysis for JFET Fixed Bias Network

2
 VGS 
ID = IDSS  1 - 
 VP 

VGS = - VGG

4
JFET Fixed Bias Plotting Shockley’s Equation

5
JFET Fixed Bias Graphical Solution

2
 VGS 
ID = IDSS  1 - 
 VP 
Since VGS = - VGG
2
 VGG 
ID = IDSS  1 - 
 V P 

6
JFET Fixed Bias Example

7
Graphical Solution for JFET Fixed Bias

2
 VGS 
ID = IDSS  1 - 
 VP 
2
 VGG 
ID = IDSS  1 - 
 VP 

8
JFET Self Bias Configuration

9
JFET Self Bias DC Equivalent Circuit

IG = 0

VRG = 0

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Transconductance Curve

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JFET Self Bias Load Line

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JFET Self Bias Example

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JFET Self Bias Transconductance Curve

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Graphical Solution of JFET Self Bias

15
JFET Self Bias Effect on Variation of RS

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Exercise

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JFET Voltage Divider Bias

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JFET Voltage Divider Bias DC Analysis

Input Output
 R2  -VG + VGS + IDRS = 0 VDS = VDD - ID (RD + RS)
VG = VDD  
 R1 + R2  VGS = VG - IDRS 19
JFET Voltage Divider Bias Load Line

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The Effect of RS on Q-point

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JFET Voltage Divider Bias Example

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JFET Voltage Divider Bias Q-point

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Exercise

24
MOSFET Biasing
D-MOSFET Self Bias

26
Determining the Q-point for D-MOSFET Self Bias

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N Channel D-MOSFET Voltage Divider Bias

28
Q Point of D-MOSFET Voltage Divider Bias

29
Effect on Change in Q Point with Variation of RS

With an N Channel
D-MOSFET,
VGS may be positive

30
D-MOSFET Fixed Bias

31
E-MOSFET Feedback Bias

32
DC Equivalent for the E-MOSFET Feedback Bias

IG = 0

VGS = VDS
33
Transfer Curve for the E-MOSFET Feedback Bias

34
Determining the Q-point for E-MOSFET Feedback Bias

35
Q-point for the E-MOSFET Fixed Bias

36
EMOS Feedback Bias Example

VGSTH = 4V
VGSon = 7.5V
IDon = 5mA
VDD = 22V

IDon
k=
(VGSon - VGSTH)2
ID = k(VGS - VGSTH)2
37
EMOS Feedback Bias Example – Graphical Solution

38
Voltage Divider Bias for an N Channel E-MOSFET

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Q-point for E-MOSFET Voltage Divider Bias

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Voltage Divider Bias for an N Channel E-MOSFET

41
DC Bias Circuit Design – JFET, D-
MOSFET

• Target

42

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