DIGITAL CIRCUIT DESIGN

18B11EC215
Lecture 32
Introduction to State Machines

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 Outline
 Introduction to FSM
 Finite State Machine
 Types of FSMs
 State Diagram
 State Table
 State Reduction
 State Assignment
 Transition and Output Table
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 References
 Introduction[1-3]
 State machine is an important area of digital system design.

 The main advantages of state machine design approach :

1)Many electronics systems require the type of sequential operation
exhibited by state machines.

2)It allows minimal design time.

3)It is a well developed method that can model commonly occurring

situations in real time.

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 Finite State Machine[2]
 A FSM is an abstract model describing the synchronous sequential
machine.

 The behavior of a FSM is described as a sequence of events that

occur at discrete instants designated as t =1,2,3..etc.

 In synchronous or clocked sequential circuits, clocked flip-flops

are used as memory elements ,which change their individual states
in synchronism with the periodic clock signal .

 The change in states of flip-flops and change in state of the entire

circuit occurs at the transition of the clock signal.
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 Finite State Machine[2]

Sequential circuits are also called finite state machines(FSMs).

This name is due to the fact that the functional behavior of these
circuits can be represented using finite number of states.

In this type of system, memory capability of system is a foremost

requirement.

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 Types of FSMs
FSMs are generally of two types:
1.MEALY Machine: MEALY circuits are named after G. H,
Mealy, one of the leading scientists in designing digital systems.
The basic property of Mealy circuits is that the output is a
function of the present input conditions and the present state (PS)
of the circuit.

2.MOORE Machine: MOORE circuits are named after E. F.

Moore, another leading scientist in designing digital systems. The
basic property of Moore circuits is that the output is strictly a
function of the present state (PS) of the circuit.

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 Block Diagram of Mealy
Machine

Inputs Next Excitation State

Output
State Memory
Current Logic Outputs
Logic (F/F)
State

CLOCK
 In case of a Mealy model, the next state is a function of the present/current
state and the present inputs.

 Its output is also a function of the present/current state and the present
inputs.

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 Block Diagram of Moore
Machine [1]
Inputs Next Excitation State
Output
State Memory
Current Logic Outputs
Logic (F/F)
State

CLOCK

In case of a Moore model, the next state is a function of the present/current
state and the present inputs.

Its output is a function of the present state and are independent of the inputs.

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Comparison between
Moore and Mealy
Mealy Machine Machine
Moore Machine
Output depends on present input Output depends only on the
and present state of the circuit. present state of the circuit.
Require more number of states
Require less number of states.
than Mealy machine.
Asynchronous output generation,
Both output and state change
though the state change is
synchronous to the clock edge.
synchronous to the clock.
Faster, the output is generated on The output is generally produced
the same clock cycle. in the next clock cycle.
Glitches can be generated as
Safer to use, because they change
output change depends on input
states on the clock edge.
transition.
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 State Diagram[2]
 The state diagram or state graph is a pictorial representation of
the relationships between the present state, the input, the next
state, and the output of the sequential circuit.

 Basically, the state diagram is a pictorial representation of the

behavior of a sequential circuit.

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 The figure on next slide shows the state diagram of a Mealy
Circuit.
 The state is represented by a circle also called the node or
vertex and the transition between states is indicated by
directed lines connecting the circles.
 A directed line connecting a circle with itself indicates that the
next state is same as the present state.
 The binary number inside each circle identifies the state
represented by the circle.
 The directed lines are labelled with two binary numbers
separated by a symbol /.
 The input value that causes state transition is labelled first and
the output value that occurs when this input is applied during
the present state is labelled after the symbol /. 11
State Diagram using
Mealy Machine[2]

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 In the case of a Moore circuit , the directed lines are labelled
with only one binary number representing the input that causes
the state transition.
 The output is indicated within the circle below the present
state, because the output depends only on the present state and
not on the input.
 The figure on next slide shows the state diagram of a Moore
Circuit.

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State Diagram using
Moore Machine[2]

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 State Table[2]
 Even though the behavior of a sequential circuit can be
conveniently described using a state diagram, for its
implementation the information contained in the state diagram
is to be translated into a state table.
 The state table is a tabular representation of the state diagram.
 In the next slide, state table(b) is shown for the corresponding
state diagram(a).
 The present state designates the state of the flip-flops before
the application of the clock pulse.
 The next state is the state of the flip-flops after the application
of the clock pulse and the output section gives the value of
output variables during the present state.
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State Table and State
Diagram of Mealy
Circuit[2]

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 State Table and State
Diagram
 Both the state diagram and the state table contain the same
information and the choice between the two representations is
a matter of convenience.

 Both of them have the advantage of being precise,

unambiguous, and thus, are more suitable for describing the
operation of a sequential machine.

 The succession of states through which a sequential machine

passes and the output sequence which it produces in response
to a known input sequence , are specified by the state diagram
or the state table and initial state.

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State Table and State
Diagram of Moore
Circuit[2]

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 State Table and State
Diagram
 In the previous slide, the state diagram and the state table of a
Moore circuit is shown.

 The state of a memory element is specified by the value of its

output, which may assume either a 0 or a 1.

 The present state of the sequential machine indicates the

present outputs of the memory elements used in the machine.

 The next state of the machine indicates the next outputs of the
flip-flops that will be obtained when the present inputs are
applied to the machine in the present state.
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 State Reduction[2]
 The state reduction technique avoids the introduction of
redundant states.

 The reduction in redundant states reduces the number of flip-

flops and logic gates, thus reducing the overall cost of the
circuit.

 Two states are said to be equivalent if every possible set of

inputs generate exactly the same output and the same next
state.

 When two states are equivalent, one of them can be removed

without altering the input-output relationship.
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 State Reduction
Example[2]
Let’s illustrate the reduction technique with an example.
Consider the sequential circuit whose state diagram is shown as :

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 As evident from the state diagram, the states are represented
by letter symbols instead of their binary values because in
state reduction technique, the binary designation of states is
not important, but the input-output sequence is important.

State Reduction can be done in two steps:

 STEP 1: Determine the state table for the given state diagram.

 STEP 2: Find Equivalent States

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 STEP 1 : State Table

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 As we know, in equivalent states, every possible set of inputs
generate exactly the same output and the same next state.
 From the state table, we have observed that there are two
input combinations i.e. X=0 and X=1.
 From the table, we can observe that states a and c are
equivalent, as both go to states b and d and have outputs 0 and
1 for X=0 and X=1 respectively.
 Also, states b and e are equivalent as both go to states e and f
and have outputs 0 and 1 for X=0 and X=1 respectively.
 State c can be removed as replaced by a. Similarly, state e can
be removed and replaced by b.
 Final reduced state table and state diagram(only four states) is
shown in the next slide 24
Reduced State Table and
State Diagram [2]

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 State Assignment[2]
 The process of assigning binary values to the states of the sequential
machine is known as state assignment.
 The binary values are to be assigned to the states in such a way that
it is possible to implement flip-flop input functions using minimum
logic gates.
 The output values of the physical devices are referred to as state
variables.
Rules for state assignment:
 Rule 1: States having the same NEXT STATE for a given input
condition should have assignments which can be grouped into
logically adjacent cells in a K-map.
 Rule 2: States that are the next states of a single state should have
assignments which can be grouped into logically adjacent cells in a
K-map.
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 Transition and Output

Table[2]
The transition and output table can be obtained from the state
table by modifying the entries of the state table to correspond to
the states of the machine in accordance with the selected state
assignment.
 In this table, the next state and output entries are separated into
two sections.
 The entries of the next state part of this table defines the
necessary state transitions of the machine and thus, specify the
next values of the outputs of the flip-flops used.
 The next part of the state table is called the transition table.
 The output part of the table indicates the output of the sequential
machine for various input combinations applied to the machine,
which is in the present state.
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 Example[2]
Obtain a reduced state table and reduced state diagram for the
sequential machine whose state diagram is :

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 From the state diagram , state table can be formed, which is as
shown below:

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 It can be observed from the state table that states c and d are
equivalent.
 So, state d can be removed and d is replaced by c at other
places also.
 Reduced state table and state diagram are shown in the next
slide.

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Reduced State Table and
State Diagram[2]

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 References
[1] R. P. Jain, “Modern Digital Electronics,” 4th Edition, Tata
McGraw-Hill Education, 2009.

[2] A. Anand Kumar, “Fundamentals of Digital Circuits”, PHI,

Fourth Edition,2016.

[3] C.H. Roth and L. K. John, “Principles of Digital Systems

Design using VHDL”, Cengage Learning,1998.

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