ECE 463/563

Microprocessor Architecture
Basic Cache Operation (Examples)

Prof. Eric Rotenberg

ECE 463/563, Microprocessor Architecture,

1
Prof. Rotenberg
 Cache Parameters
• SIZE = total amount of data storage, in bytes
• BLOCKSIZE = total number of bytes in a single block
• ASSOC = associativity, i.e., # of blocks in a set

ECE 463/563, Microprocessor Architecture, 2

Prof. Rotenberg
 Cache Parameters (cont.)
• Equation for # of blocks in the cache:
𝑆𝐼𝑍𝐸
¿ 𝑏𝑙𝑜𝑐𝑘𝑠=
𝐵𝐿𝑂𝐶𝐾𝑆𝐼𝑍𝐸

• Equation for # of sets in the cache:

¿ 𝑏𝑙𝑜𝑐𝑘𝑠 𝑆𝐼𝑍𝐸
¿ 𝑠𝑒𝑡𝑠= =
𝐴𝑆𝑆𝑂𝐶 𝐴𝑆𝑆𝑂𝐶 ∙ 𝐵𝐿𝑂𝐶𝐾𝑆𝐼𝑍𝐸

ECE 463/563, Microprocessor Architecture, 3

Prof. Rotenberg
 Address Fields
31 0
block
tag index offset

Used to lookup a Once block is found,

Tag field is compared offset selects a
“set”, which
to the tag(s) of the indexed particular byte or word
contains one or
cache block(s). of data in the block.
more memory
If there is a match, memory
blocks. (The
block is there (hit).
number of blocks
If there isn’t a match, memory
in a set is the
block is not there (miss).
“associativity”.)

ECE 463/563, Microprocessor Architecture, 4

Prof. Rotenberg
 Address Fields (cont.)
• Widths of address fields (# bits)
# index bits = log2(# sets)
# block offset bits = log2(block size)
# tag bits = 32 - # index bits - # block offset bits
assuming 32-bit addresses
31 0
block
tag index offset

ECE 463/563, Microprocessor Architecture, 5

Prof. Rotenberg
31 Address (from processor) 0
block
tag index offset

V TAG DATA

== byte or word select

requested data (byte or word)6

ECE 463/563, Microprocessor Architecture,
hit = (valid & match)
miss = !hit = (!valid | !match)
(to processor)
Prof. Rotenberg
 Example
• Example: Processor accesses a 256 Byte
direct-mapped cache, which has block size
of 32 Bytes, with following sequence of
addresses. Show contents of cache after
each access, count # of hits, count # of
replacements.

ECE 463/563, Microprocessor Architecture, 7

Prof. Rotenberg
 Example address sequence
address (hex) tag (hex) index || block offset
(binary) index comment
(decimal)
0xFF0040E0
0xBEEF005C
0xFF0040E2
0xFF0040E8
0x00101078
0x002183E0
0x00101064
0x0012255C
0x00122544

ECE 463/563, Microprocessor Architecture, 8

Prof. Rotenberg
 Example address sequence
address (hex) tag (hex) index || block offset
(binary) index comment
(decimal)
FF0040E0
BEEF005C
For the quizzes and exams, the auto-grader has key requirements!
FF0040E2 1. VERY IMPORTANT: "tag" must be specified in hexadecimal
format. Do NOT include leading zeroes. Do NOT use '0x' notation
FF0040E8 before hex numbers.
2. VERY IMPORTANT: "index || block offset" must be specified in
101078 binary format, i.e., a string of 0s and 1s. It must include ALL bits of
the index and block offset (including leading 0 bits, if applicable).
2183E0 And, NO spaces among the string of bits.
101064 3. VERY IMPORTANT: The auto-grader accepts "index" in either
decimal or hexadecimal format. Do NOT include leading zeroes.
12255C Do NOT use '0x' notation before hex numbers.

122544

ECE 463/563, Microprocessor Architecture, 9

Prof. Rotenberg
 Example (cont.)
𝑆𝐼𝑍𝐸 256
¿ 𝑠𝑒𝑡𝑠= = =8
𝐴𝑆𝑆𝑂𝐶 ∙ 𝐵𝐿𝑂𝐶𝐾𝑆𝐼𝑍𝐸 1∙ 32

# index bits = log2(# sets) = log2(8) = 3

# block offset bits = log2(block size) = log2(32 bytes) = 5
# tag bits = total # address bits - # index bits - # block offset bits =
32 bits – 3 bits – 5 bits = 24

Top 6 nibbles (24 bits) of address form the tag and lower 2
nibbles (8 bits) of address form the index and block offset fields
ECE 463/563, Microprocessor Architecture, 10
Prof. Rotenberg
address (hex) tag (hex) index || block offset
(binary) index comment
(decimal)
FF0040E0 FF0040 11100000 7 Miss
BEEF005C BEEF00 01011100 2 Miss
FF0040E2 FF0040 11100010 7 Hit
FF0040E8 FF0040 11101000 7 Hit
101078 1010 01111000 3 Miss
2183E0 2183 11100000 7 Miss/Repl
101064 1010 01100100 3 Hit
12255C 1225 01011100 2 Miss/Repl
122544 1225 01000100 2 Hit

ECE 463/563, Microprocessor Architecture, 11

Prof. Rotenberg
 31 8 7 5 4 0
tag index block
FF0040 7 offset
3

V TAG DATA
0 0
1 0
2 0
3 0
4 0
5 0
24 6 0
7 0
1 FF0040

Match?
Valid? ECE 463/563, Microprocessor Architecture, Get block from
12
Prof. Rotenberg
memory (slow)
 31 8 7 5 4 0
tag index block
BEEF00 2 offset
3

V TAG DATA
0 0
1 0
2 0
1 BEEF00
3 0
4 0
5 0 Get block from
24 6 0 memory (slow)
7 1 FF0040

Match?
Valid? ECE 463/563, Microprocessor Architecture, 13
Prof. Rotenberg
 31 8 7 5 4 0
tag index block
FF0040 7 offset
3

V TAG DATA
0 0
1 0
2 1 BEEF00
3 0
4 0
5 0
24 6 0
7 1 FF0040

Match?
Valid? ECE 463/563, Microprocessor Architecture, 14
Prof. Rotenberg
 31 8 7 5 4 0
tag index block
FF0040 7 offset
3

V TAG DATA
0 0
1 0
2 1 BEEF00
3 0
4 0
5 0
24 6 0
7 1 FF0040

Match?
Valid? ECE 463/563, Microprocessor Architecture, 15
Prof. Rotenberg
 31 8 7 5 4 0
tag index block
1010 3 offset
3

V TAG DATA
0 0
1 0
2 1 BEEF00
3 0
1 1010
4 0
5 0
24 6 0 Get block from
7 1 FF0040 memory (slow)

Match?
Valid? ECE 463/563, Microprocessor Architecture, 16
Prof. Rotenberg
 31 8 7 5 4 0
tag index block
2183 7 offset
3

V TAG DATA
0 0
1 0
2 1 BEEF00
3 1 1010
4 0
5 0
24 6 0
7 1 2183
FF0040

Match?
Get block from
Valid? ECE 463/563, Microprocessor Architecture, 17
Prof. Rotenberg memory (slow)
 31 8 7 5 4 0
tag index block
1010 3 offset
3

V TAG DATA
0 0
1 0
2 1 BEEF00
3 1 1010
4 0
5 0
24 6 0
7 1 2183

Match?
Valid? ECE 463/563, Microprocessor Architecture, 18
Prof. Rotenberg
 31 8 7 5 4 0
tag index block
1225 2 offset
3

V TAG DATA
0 0
1 0
1 1225
2 BEEF00
3 1 1010
4 0
Get block from
5 0
24 memory (slow)
6 0
7 1 2183

Match?
Valid? ECE 463/563, Microprocessor Architecture, 19
Prof. Rotenberg
 31 8 7 5 4 0
tag index block
1225 2 offset
3

V TAG DATA
0 0
1 0
2 1 1225
3 1 1010
4 0
5 0
24 6 0
7 1 2183

Match?
Valid? ECE 463/563, Microprocessor Architecture, 20
Prof. Rotenberg
 Revised Example
• Example: Processor accesses a 256 byte 2-way
set-associative cache, which has block size of 32
bytes, with following sequence of addresses.
Show contents of cache after each access,
count # of hits, count # of replacements.

ECE 463/563, Microprocessor Architecture, 21

Prof. Rotenberg
31 Address (from processor) 0
block
tag index offset

V TAG V TAG DATA DATA

(32 bytes) (32 bytes)

== == select a block

select certain bytes

ECE 463/563, Microprocessor Architecture, 22
Prof. Rotenberg
hit
 Example (cont.)
𝑆𝐼𝑍𝐸 256
¿ 𝑠𝑒𝑡𝑠= = =4
𝐴𝑆𝑆𝑂𝐶 ∙ 𝐵𝐿𝑂𝐶𝐾𝑆𝐼𝑍𝐸 2∙ 32

# index bits = log2(# sets) = log2(4) = 2

# block offset bits = log2(block size) = log2(32 bytes) = 5
# tag bits = total # address bits - # index bits - # block offset bits =
32 bits – 2 bits – 5 bits = 25

ECE 463/563, Microprocessor Architecture, 23

Prof. Rotenberg
 Example of splitting address
into fields
0xFF0040E0

Hex: F F 0 0 4 0 E 0
Binary: 1111 1111 0000 0000 0100 0000 1110 0000
Hex Tag:1 F E 0 0 8 1
tag index block
offset

ECE 463/563, Microprocessor Architecture, 24

Prof. Rotenberg
address (hex) tag (hex) index || block offset
(binary) index comment
(decimal)
FF0040E0 1FE0081 1100000 3 Miss
BEEF005C 17DDE00 1011100 2 Miss
101078 2020 1111000 3 Miss
FF0040E2 1FE0081 1100010 3 Hit
101078 2020 1111000 3 Hit
2183E0 4307 1100000 3 Miss/Repl
101064 2020 1100100 3 Hit

ECE 463/563, Microprocessor Architecture, 25

Prof. Rotenberg
 31 7 6 5 4 0
tag index block
1FE0081 3 offset
2

V TAG V TAG
0 0 0
1 0 0
2 0 0
25 3 1 1FE0081
0 0 DATA
not shown
Match? Match? for convenience
Valid? Valid?

ECE 463/563, Microprocessor Architecture, 26

Prof. Rotenberg
 31 7 6 5 4 0
tag index block
17DDE00 2 offset
2

V TAG V TAG
0 0 0
1 0 0
2 1 17DDE00
0 0
25 3 1 1FE0081 0 DATA
not shown
Match? Match? for convenience
Valid? Valid?

ECE 463/563, Microprocessor Architecture, 27

Prof. Rotenberg
 31 7 6 5 4 0
tag index block
2020 3 offset
2

V TAG V TAG
0 0 0
1 0 0
2 1 17DDE00 0
25 3 1 1FE0081 1 2020
0 DATA
not shown
Match? Match? for convenience
Valid? Valid?

ECE 463/563, Microprocessor Architecture, 28

Prof. Rotenberg
 31 7 6 5 4 0
tag index block
1FE0081 3 offset
2

V TAG V TAG
0 0 0
1 0 0
2 1 17DDE00 0
25 3 1 1FE0081 1 2020 DATA
not shown
Match? Match? for convenience
Valid? Valid?

ECE 463/563, Microprocessor Architecture, 29

Prof. Rotenberg
 31 7 6 5 4 0
tag index block
2020 3 offset
2

V TAG V TAG
0 0 0
1 0 0
2 1 17DDE00 0
25 3 1 1FE0081 1 2020 DATA
not shown
Match? Match? for convenience
Valid? Valid?

ECE 463/563, Microprocessor Architecture, 30

Prof. Rotenberg
 31 7 6 5 4 0
tag index block
4307 3 offset
2

V TAG V TAG
0 0 0
1 0 0
2 1 17DDE00 0
4307 DATA
25 3 1 1FE0081 1 2020
not shown
Match? Match? for convenience
Valid? Valid?

ECE 463/563, Microprocessor Architecture, 31

Prof. Rotenberg
 31 7 6 5 4 0
tag index block
2020 3 offset
2

V TAG V TAG
0 0 0
1 0 0
2 1 17DDE00 0
25 3 1 4307 1 2020 DATA
not shown
Match? Match? for convenience
Valid? Valid?

ECE 463/563, Microprocessor Architecture, 32

Prof. Rotenberg
 Showing Cache Contents on Quizzes/Exams
1. Notice that the table(s) only have enough rows for
displaying those sets that are ever used by the
address trace. Therefore, at each row, you must
indicate the set #, i.e., the index into the cache.
2. VERY IMPORTANT: The auto-grader requires that you
enter sets in the table in ascending order (from
lowest to highest set #).
3. VERY IMPORTANT: The auto-grader accepts the set #
(cache index) in either decimal or hexadecimal
format. Do NOT include leading zeroes. Do NOT use
'0x' notation before hex numbers.
4. VERY IMPORTANT: If a given cache is set-associative,
then, when transferring your solution from paper to
the table, blocks within a set must be listed from MRU LRU
most-recently-used to least-recently-used. The auto-
grader requires this.
5. VERY IMPORTANT: Tags must be specified in
hexadecimal format. Do NOT include leading zeroes.
Do NOT use '0x' notation before hex numbers.
6. VERY IMPORTANT: The auto-grader requires that you
enter a tag for each block, even for blocks that are
invalid. Enter - (a single hyphen) for the tag of an
invalid block. MRU

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Prof. Rotenberg
Showing decoded address traces
on quizzes/exams

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Prof. Rotenberg