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Lecture # 03-09

micro processor
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0% found this document useful (0 votes)
38 views46 pages

Lecture # 03-09

micro processor
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Lecture – 03

Microprocessor and Interfacing


21 Computer System Engineering – Fifth Semester

By: Engr. Athar Ali, Lecturer, CSE-MUET


1
PIN DIAGRAM , AND DESCRIPTION
OF
MICROPROCESSOR 8085
Microprocessor 8085
• The 8085 was first introduced in March1976 is an
8-bit microprocessor with 16-bit address width
capable of addressing 64kB of memory.
• It has 40 pins.
• Formed with 6500 transistors.
• Requires a +5 volt power supply.
• operates with a 3 MHz frequency.
3
Microprocessor 8085 (Cont’d)
The pins can be grouped into 6 categories:
1. Address bus
2. Data bus
3. Control & Status bus
4. Power supply & frequency
5. Externally initiated & acknowledgement signals
6. Serial I/O ports
4
1. Address bus
(16)

2. Data bus (8)


.
3. Control &
Status bus
(6)
4. Power
Supply &
Frequency
Signals (5)

5. Externally
initiated
control
signals (11)

6. Serial
input/outp
ut Ports 5

(2)
ADDRESS BUS (16)
◾ Address bus occupied 16 bits wide , therefore 8085 can access 2 raise to the
power 16 locations(65,536) with numbers, from 0 to 65,535.
◾ These range from 0000 to FFFF and is referred as 64kB of memory space.
◾ The 8 signal lines, A8–A15, are unidirectional and used for the most
significant bits, called the high- order address of a16-bit address.
◾ The 8 signal lines AD0–AD7 are used for a dual purpose : as a lower-
order address lines and also as a data bus.

6
ADDRESS BUS (16)
◾ When the 8085 wants to access a peripheral or a memory location ,it places the 16-bit
address on the address bus and then sends the appropriate control signals.
◾ •The low-order bidirectional address lines (AD0–AD7) are multiplexed with data
bus.

W H AT IS M U LTI P L E X I N G ?

Multiplexing is a method by which multiple analog or digital signals are


combined into one signal over a shared medium.The aim is to share
an expensive resource.
8
ADDRESS BUS (16)

W hy A D R ESS BU S IS M U LT IPLEXED W I T H DATA BU S ?

◾ This is done to reduce the size of microprocessor. Because we do not require

address and data bus at the same time, we can have a common bus for address and
data.

◾ To select a memory location, we need address first, when the location is selected after

that we have to transfer the data with that selected location.

◾ •During the first clock cycle they bring memory address of the low order memory 8

or I/O address.They then become the data bus during the second and third clock
DATA BUS (8)

◾ The signal lines AD0–AD7 are bidirectional : they serve a dual


purpose
◾ They are used as the low-order address bus as well as the data
bus .This is known as multiplexing the bus.
◾ The data bus is 8 bits wide ,and used for transferring the data or
program instruction.
◾ The data flows both ways between the microprocessor &
memory or I/O. 1
1
ALE
PIN 30 (OUTPUT)

◾ It is used to Demultiplex
Address and Data Bus.
◾ It indicates whether bus
functions as address bus or
data bus.
◾ If ALE = 1 then
◾ Bus functions as address bus.
◾ If ALE = 0 then 10

◾ Bus functions as data bus.


1. Address bus
(16)

2. Data bus (8)


.
3. Control &
Status bus
(6)
4. Power
Supply &
Frequency
Signals (5)

5. Externally
initiated
control
signals (11)

6. Serial
input/outp
ut Ports 5

(2)
CONTROL & STATUS BUS (6 PINS) :

◾ This group is Responsible for overall control & synchronization of the


system.
◾ Signals which are associated with timing and control unit.
◾ This group of signals includes:
◾ 1). Two Control Signal (RD/WR)
◾ 2).Two Status Signal (IO/M , S1 and S0)
◾ 3).One Special Signal(ALE)
1
1
RD
PIN 31 (OUTPUT)

◾ RD stands for Read.

◾ It is an active low signal.

◾ It is a control signal used for Read operation


either from memory or from Input device.
◾ A low signal indicates that data on the data bus
must be READ either from selected memory
location or from input device.
1
1
WR
PIN 31 (OUTPUT)

◾ W R stands for Write.

◾ It is also active low signal.

◾ It is a control signal used for Write


operation either into memory or into output
device.
◾ A low signal indicates that data on the data bus
must be written into selected memory location
or into output device. 1
1
S0 A N D S1
PIN 29 (OUTPUT) A N D PIN 33
(OUTPUT)

◾ S0 and S1 are called Status Pins.


◾ They tell the current operation which is in
progress in 8085.

S0 S1 Operation
0 0 Halt
0 1 Write
1 0 Read
1 1 Opcode Fetch
1
6
IO/M
PIN 34 (OUTPUT)

◾ This pin tells whether I/O or memory


operation is being performed.
◾ If IO/M = 1 then
◾ I/O operation is being performed.

◾ If IO/M = 0 then
◾ Memory operation is being performed.

1
1
IO/M
PIN 34 (OUTPUT)

◾ The operation being performed is indicated by S0 and S1.

◾ If S0 = 0 and S1 = 1 then
◾ It indicates WRITE operation.

◾ If IO/M = 0 then
◾ It indicates Memory operation.

◾ Combining these two we get Memory Write Operation. 17


POWER SUPPLY & FREQUENCY SIGNALS (5)

18
X1
& X2
PIN 1 AND PIN 2 (INPUT)

They are connected with crystal oscillator.


These are also called Crystal Input Pins.

8085 can generate clock signals internally.

To generate clock signals internally, 8085 requires


external inputs from X 1 and X 2.

19
CLK O U T
PIN 37 (OUTPUT)

This signal can be used as the system clock for other devices.

Sometimes it is necessary to generating clock outputs from


microprocessors so that they can be used for other peripherals
or other digital IC’s .

This is provided by CLK pin.

Its frequency is always same as the frequency at which the


microprocessor operates .

2
2
VSS A N D VC C
PIN 20 (INPUT) A N D PIN 40
(INPUT)

+5V power supply is connected to VC C .

Ground signal is connected to VSS.

21
EXTERNALLY INITIATED CONTROL SIGNALS
(11)

22
RESET IN A N D RESET O U T
PIN 36 (INPUT) A N D PIN 3 (OUTPUT)

RESET IN:
◦ It is used to reset the
microprocessor.
◦ It is active low signal.
◦ When the signal on this pin is low for at
least 3 clocking cycles, it forces the
microprocessor to reset itself.
2
5
RESET IN A N D RESET O U T
PIN 36 (INPUT) A N D PIN 3 (OUTPUT)

Resetting the microprocessor means:

◦ Clearing the PC and IR.


◦ Disabling all interrupts (except TRAP).
◦ Disabling the SOD pin.

2
6
RESET IN A N D RESET O U T
PIN 36 (INPUT) A N D PIN 3 (OUTPUT)

RESET OUT:
◦ It is used to reset the peripheral devices
and other ICs on the circuit.
◦ It is an output signal.
◦ It is an active high signal.
◦ The output remains high as long as
RESET out is kept high.
2
7
READY
PIN 35 (INPUT)

This pin is used to synchronize (Time Matching)


slower peripheral devices with fast
microprocessor.

A low value causes the microprocessor to enter


into wait state.
Tw Tw

The microprocessor remains in wait state until the input at


this pin goes high.
2
8
INTERRUPT PINS

An interrupt is considered to be an emergency signal that is to


be serviced first.

The Microprocessor responds to it as soon as possible.

27
What Happen When Interrupt Arrives..

When the interrupt signal arrives:


 The processor will break its routine
 Go to a different routine (interrupt service routine)
 Complete the interrupt service routine(ISR)
 Go back to the “regular” routine

28
Maskable interrupts

Maskable interrupts are those interrupts which can be enabled


or disabled.

Enabling and Disabling is done by software instructions .


 EI (Enable Interrupt)
 DI (Disable Interrupt)

29
Maskable interrupts

List of Maskable Interrupts:


• RST 7.5

• RST 6.5

• RST 5.5

• INTR

30
Non-maskable interrupts

◾ The interrupts which are always in enabled mode are called non-
maskable interrupts.

◾ These interrupts C A N N E VER BE D I S A BLE D by


any software instruction.

◾ TRAP is a non-maskable interrupt.


31
Priority based interrupts

Priority of interrupts:
Interrupt Priority

TRAP 1

RST 7.5 2

RST 6.5 3

RST 5.5 4

INTR 5

32
TRAP
pin 6 (input)

It is an non-maskable interrupt.
It has the highest priority.
It cannot be disabled.
TRAP is usually used for power failure
and emergency shutoff.

33
RST 7.5
PIN 7 (INPUT)

It is a maskable interrupt.
It has the second highest priority.
It can be Enabled or Disabled by
Software Instructions (EI and DI).

3
6
RST 6.5
PIN 8 (INPUT)

It is a maskable interrupt.
It has the third highest priority.
RST 6.5 can be enabled by EI
instruction.
It can be disabled by DI
instruction.

35
RST 5.5
PIN 9 (INPUT)

It is a maskable interrupt.
It has the fourth highest priority.
It is also level triggered.
The pin has to be held high for a
specific period of time.
This interrupt is very similar to RST
6.5.
36
INTR
PIN 10 (INPUT)

It is a maskable interrupt.
It has the lowest priority.

3
9

www.eazynotes.c
om
INTA
PIN 11 (OUTPUT)

It stands for interrupt acknowledge.


It is an active low signal.
Low output on this pin indicates that
microprocessor has acknowledged the
INTR request.

38
Direct memory access?

Direct memory access (DMA) is a method that allows an


input/output (I/O) device to send or receive data directly to or from
the main memory, bypassing the CPU to speed up memory
operations.

The process is managed by a chip known as a D M A


controller (DMAC).

39
Direct memory access?

AFTER H O L D A Signal C O N N E C T I O N
IS B U I LD
A0- ADDRESS CONNECTIO
A15 BUS N DMA
CONTROLLER
8085 I/O (IT IS A C H I P
M I C RO P RO C E S MEMO
DE V IC U SED T O
RY
SOR U N I T ES CONNECT
PERIPHERAL
DATA CONNECTIO D EVIC ES W I T H
D0- N M I C RO P RO C E SS
BUS
D7 OR)
HOLD HOL CONTROL CONNECTIO
A D BUS N
D M A C O N TROLLER SEN D S H O L D SIG N A L TO
M I C RO PRO C E SS O R 4
2
It Sends H O L D A Signal To Ensure That It Has Given The Hold Of Busses To
Peripheral Devices
HOLD
PIN 38 (INPUT)

H O LD pin is used to request the


microprocessor for D M A transfer.

A high signal on this pin is a request to


microprocessor to relinquish (RELEASE) the
hold on buses.

This request is sent by D M A controller.

41
HLDA
PIN 39 (OUTPUT)

HLDA stands for Hold Acknowledge.

The microprocessor uses this pin to acknowledge


the receipt of HOLD signal.
AFTER HOLDA Signal C O N N E CTION IS
ESTABLISHED.

42
HLDA
PIN 39 (OUTPUT)

The control of these buses goes to D M A Controller.

Control remains at D M A Controller until HOLD is


held high.

When HOLD goes low, HLD A also goes low and the
microprocessor takes control of the buses.

4
5

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om
SERIAL INPUT & OUTPUT PORTS (2)

44
SID AND SOD
PIN 4 (INPUT) AND PIN 5 (OUTPUT)

The 8085 has two signals to implement the serial


transmission :
• SID (Serial Input Data)
• SOD (Serial Output D ata)
In serial transmission, data bits are sent over a single line,
one
45

bit at a time, such as the transmission over telephone lines.


T H E E N D !!!

46

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