Lecture # 04 - 09
Lecture # 04 - 09
5. Externally
initiated
control
signals (11)
6. Serial
input/outp
ut Ports 5
(2)
ADDRESS BUS (16)
◾ Address bus occupied 16 bits wide , therefore 8085 can access 2 raise to the
power 16 locations(65,536) with numbers, from 0 to 65,535.
◾ These range from 0000 to FFFF and is referred as 64kB of memory space.
◾ The 8 signal lines, A8–A15, are unidirectional and used for the most
significant bits, called the high- order address of a16-bit address.
◾ The 8 signal lines AD0–AD7 are used for a dual purpose : as a lower-
order address lines and also as a data bus.
6
ADDRESS BUS (16)
◾ When the 8085 wants to access a peripheral or a memory location ,it places the 16-bit
address on the address bus and then sends the appropriate control signals.
◾ •The low-order bidirectional address lines (AD0–AD7) are multiplexed with data
bus.
W H AT IS M U LTI P L E X I N G ?
address and data bus at the same time, we can have a common bus for address and
data.
◾ To select a memory location, we need address first, when the location is selected after
◾ •During the first clock cycle they bring memory address of the low order memory 8
or I/O address.They then become the data bus during the second and third clock
DATA BUS (8)
◾ It is used to Demultiplex
Address and Data Bus.
◾ It indicates whether bus
functions as address bus or
data bus.
◾ If ALE = 1 then
◾ Bus functions as address bus.
◾ If ALE = 0 then 10
5. Externally
initiated
control
signals (11)
6. Serial
input/outp
ut Ports 5
(2)
CONTROL & STATUS BUS (6 PINS) :
S0 S1 Operation
0 0 Halt
0 1 Write
1 0 Read
1 1 Opcode Fetch
1
6
IO/M
PIN 34 (OUTPUT)
◾ If IO/M = 0 then
◾ Memory operation is being performed.
1
1
POWER SUPPLY & FREQUENCY SIGNALS (5)
17
X1
& X2
PIN 1 AND PIN 2 (INPUT)
18
CLK O U T
PIN 37 (OUTPUT)
This signal can be used as the system clock for other devices.
2
2
VSS A N D VC C
PIN 20 (INPUT) A N D PIN 40
(INPUT)
20
EXTERNALLY INITIATED CONTROL SIGNALS
(11)
21
RESET IN A N D RESET O U T
PIN 36 (INPUT) A N D PIN 3 (OUTPUT)
RESET IN:
◦ It is used to reset the microprocessor.
◦ It is active low signal.
◦ When the signal on this pin is low for at least
3 clocking cycles, it forces the microprocessor
to reset itself.
2
5
RESET IN A N D RESET O U T
PIN 36 (INPUT) A N D PIN 3 (OUTPUT)
2
6
RESET IN A N D RESET O U T
PIN 36 (INPUT) A N D PIN 3 (OUTPUT)
RESET OUT:
◦ It is used to reset the peripheral devices
and other ICs on the circuit.
◦ It is an output signal.
◦ It is an active high signal.
◦ The output remains high as long as
RESET out is kept high.
2
7
READY
PIN 35 (INPUT)
26
What Happen When Interrupt Arrives..
27
Maskable interrupts
28
Maskable interrupts
• RST 6.5
• RST 5.5
• INTR
29
Non-maskable interrupts
◾ The interrupts which are always in enabled mode are called non-
maskable interrupts.
Priority of interrupts:
Interrupt Priority
TRAP 1
RST 7.5 2
RST 6.5 3
RST 5.5 4
INTR 5
31
TRAP
pin 6 (input)
It is an non-maskable interrupt.
It has the highest priority.
It cannot be disabled.
TRAP is usually used for power failure
and emergency shutoff.
32
RST 7.5
PIN 7 (INPUT)
It is a maskable interrupt.
It has the second highest priority.
It can be Enabled or Disabled by
Software Instructions (EI and DI).
3
6
RST 6.5
PIN 8 (INPUT)
It is a maskable interrupt.
It has the third highest priority.
RST 6.5 can be enabled by EI
instruction.
It can be disabled by DI
instruction.
34
RST 5.5
PIN 9 (INPUT)
It is a maskable interrupt.
It has the fourth highest priority.
It is also level triggered.
The pin has to be held high for a
specific period of time.
This interrupt is very similar to RST
6.5.
35
INTR
PIN 10 (INPUT)
It is a maskable interrupt.
It has the lowest priority.
3
9
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INTA
PIN 11 (OUTPUT)
37
HOLD
PIN 38 (INPUT)
38
HLDA
PIN 39 (OUTPUT)
39
HLDA
PIN 39 (OUTPUT)
When HOLD goes low, HLD A also goes low and the
microprocessor takes control of the buses.
4
5
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Direct memory access?
41
Direct memory access?
AFTER H O L D A Signal C O N N E C T I O N
IS B U I LD
A0- ADDRESS CONNECTIO
A15 BUS N DMA
CONTROLLER
8085 I/O (IT IS A C H I P
M I C RO P RO C E S MEMO
DE V IC U SED T O
RY
SOR U N I T ES CONNECT
PERIPHERAL
DATA CONNECTIO D EVIC ES W I T H
D0- N M I C RO P RO C E SS
BUS
D7 OR)
HOLD HOL CONTROL CONNECTIO
A D BUS N
D M A C O N TROLLER SEN D S H O L D SIG N A L TO
M I C RO PRO C E SS O R 4
2
It Sends H O L D A Signal To Ensure That It Has Given The Hold Of Busses To
Peripheral Devices
SERIAL INPUT & OUTPUT PORTS (2)
43
SID AND SOD
PIN 4 (INPUT) AND PIN 5 (OUTPUT)
45