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Chapter 1 Digital Systems and Binary Numbers

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18 views95 pages

Chapter 1 Digital Systems and Binary Numbers

Uploaded by

urmilakhunt.csd
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Digital Logic Design I

Chapter 1
Digital Systems and Binary Numbers

Digital Logic Design Ch1-1


Digital Systems and Binary
Numbers

• Digital computers
• General purposes
• Many scientific, industrial and commercial applications
• Digital systems
• Telephone switching exchanges
• Digital camera
• Electronic calculators, PDA's
• Digital TV
• Discrete information-processing systems
• Manipulate discrete elements of information
• For example, {1, 2, 3, …} and {A, B, C, …}…

Digital Logic Design Ch1-2


Analog and Digital Signal
• Analog system
• The physical quantities or signals may vary continuously over a specified
range.—electronics pulses
• Digital system
• The physical quantities or signals can assume only discrete values.– binay
value
• Greater accuracy
• Digital system are good for computing and digital electronics.

X(t) X(t)

t t
Analog signal Digital signal Digital Logic Design Ch1-3
Block diagram of Digital Computer

Digital Logic Design Ch1-4


Binary Digital Signal
• An information variable represented by physical quantity.
• For digital systems, the variable takes on discrete values.
• Two level, or binary values are the most prevalent values.
• Binary values are represented abstractly by:
• Digits 0 and 1
• Words (symbols) False (F) and True (T) V(t)
• Words (symbols) Low (L) and High (H)
• And words On and Off
Logic 1
• Binary values are represented by values
or ranges of values of physical quantities. undefine

Logic 0
t
Binary digital signal

Digital Logic Design Ch1-5


Decimal Number System
• Base (also called radix) = 10
• 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }
• Digit Position
• Integer & fraction 2 1 0 -1 -2
• Digit Weight 5 1 2 7 4
• Weight = (Base) Position
• Magnitude 100 10 1 0.1 0.01
• Sum of “Digit x Weight”
• Formal Notation
500 10 2 0.7 0.04

2 1 0 -1 -2
d2*B + d1*B + d0*B + d-1*B + d-2*B

(512.74)10
Digital Logic Design Ch1-6
Octal Number System
• Base = 8
• 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }
• Weights
• Weight = (Base) Position 64 8 1 1/8 1/64
• Magnitude 5 1 2 7 4
• Sum of “Digit x Weight”
2 1 0 -1 -2
• Formal Notation 2 1 0 -1 -2
5 *8 + 1 *8 + 2 *8 + 7 *8 + 4 *8

=(330.9375)10

(512.74)8

Digital Logic Design Ch1-7


Binary Number System
• Base = 2
• 2 digits { 0, 1 }, called binary digits or “bits”
• Weights
• Weight = (Base)
Position 4 2 1 1/2 1/4

• Magnitude 1 0 1 0 1
• Sum of “Bit x Weight” 2 1 0 -1 -2
• Formal Notation 2 1 0 -1 -2
1 *2 + 0 *2 + 1 *2 + 0 *2 + 1 *2
• Groups of bits 4 bits = Nibble
=(5.25)10
8 bits = Byte
(101.01)2
000101= 1*24 + 0*23 + 1* 22+ 0* 21+ 1*20
43210 1011

11000101
Digital Logic Design Ch1-8
Hexadecimal Number System
• Base = 16
• 16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }
• Weights
• Weight = (Base) Position 256 16 1 1/16 1/256

• Magnitude 1 E 5 7 A
• Sum of “Digit x Weight”
2 1 0 -1 -2
• Formal Notation 2 1 0 -1 -2
1 *16 +14 *16 +5 *16 +7 *16 +10 *16

=(485.4765625)10

(1E5.7A)16

Digital Logic Design Ch1-9


The Power of 2

n 2n n 2n
0 20=1 8 28=256
1 21=2 9 29=512
2 22=4 10 210=1024 Kilo

3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega

6 26=64 30 230=1G Giga

7 27=128 40 240=1T Tera

Digital Logic Design Ch1-10


Numbers with different bases
Decimal Binary (base Octal(base 8) Hexadecimal(base
(10) 2) 16)
0 0000 0 0
1 0001 20 1 1
2 0010 21 2 2
3 0011 21 + 3 3
20
4 0100 22 4 4
5 0101 22 + 5 5
20
6 0110 22 + 6 6
21
7 0111 22 + 7 7
21+ 20
8 1000 23 10 8
9 1001 23 + 11 9
20
10 1010 23 + 12 A- 10
22
3
Digital Logic Design Ch1-11
Addition
• Decimal Addition

1 1 Carry
5 5
+ 5 5

1 1 0

Digital Logic Design Ch1-12


Binary Addition
• Column Addition

1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23

1 0 1 0 1 0 0 = 84

≥ (2)10

Digital Logic Design Ch1-13


Binary Subtraction
• Borrow a “Base” when needed

1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23

0 1 1 0 1 1 0 = 54

Digital Logic Design Ch1-14


Binary Multiplication
• Bit by bit

1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1

1 1 1 0 0 1 1 0

Digital Logic Design Ch1-15


Number Base Conversions
Evaluate
Magnitude
Octal
(Base 8)

Evaluate
Magnitude
Decimal Binary
(Base 10) (Base 2)

Hexadecimal
(Base 16)
Evaluate
Magnitude
Digital Logic Design Ch1-16
Decimal (Integer) to Binary
Conversion
• Convert Decimal to Binary use Division method.
• Divide the number by the ‘Base’ (=2)
• Take the remainder (either 0 or 1) as a coefficient
• Take the quotient and repeat the division till quotient become 0.
Example: (13)10
Quotient Remainder Coefficient
13/ 2 = 6 1 a0 = 1 LSB
6 /2= 3 0 a1 = 0
3 /2= 1 1 a2 = 1
1 /2= 0 1 a3 = 1 msb
Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2

MSB LSB
Digital Logic Design Ch1-17
Decimal (Fraction) to Binary
Conversion
• Multiply the number by the ‘Base’ (=2)
• Take the integer (either 0 or 1) as a coefficient
• Take the resultant fraction and repeat the process till the fraction
become 0.0000. 13 – integer 0.625 fraction 1.25
Example: (13.625)10
Integer Fraction Coefficient
MSB
0.625 * 2 = 1 . 25 a-1 = 1
0.25 * 2 = 0 . 5 a-2 = 0
0.5 *2= 1 . 0 a-3 = 1
LSB
Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2

MSB LSB

Digital Logic Design Ch1-18


Decimal to Octal Conversion
Example: (175)10
Quotient Remainder Coefficient
175 / 8 = 21 7 a0 = 7
21 / 8 = 2 5 a1 = 5
2 /8= 0 2 a2 = 2
Answer: (175)10 = (a2 a1 a0)8 = (257)8

Example: (0.3125)10
Integer Fraction Coefficient
0.3125 * 8 = 2 . 5 a-1 = 2
0.5 *8= 4 . 0 a-2 = 4
Answer: (175.3125)10 = (0.a-1 a-2 a-3)8 = (257.24)8

Digital Logic Design Ch1-19


Decimal to Hexadecimal Conversion
Example: (175)10
Quotient Remainder Coefficient
175 / 16 = 10 15 a0 = F
10 / 16 = 0 10 a1 = A

Answer: (175)10 = (a1 a0)16 = (AF)16

Example: (0.3125)10
Integer Fraction Coefficient
0.3125 * 16 = 5 . 0 a-1 = 5

Answer: (175.3125)10 = (0.a-1 )16 = (AF.5)16

Digital Logic Design Ch1-20


Binary to Decimal conversion
• A binary number can be converted to decimal by forming the sum
of the powers of 2 of those coefficients of given binary number.
• To convert the binary number to a decimal number, use the
multiplication method.
• In this conversion process, if a number with base n has to be
converted into a number with base 10, then each digit of the
given number is multiplied from the Most Significant Bit (MSB)
to the Least Significant Bit (LSB) with reducing the power of the
base n.

b is the digit,
q is the base value
Digital Logic Design Ch1-21
• Given binary number = (1101)2
Now, multiplying each digit from MSB to LSB with reducing the
power of the base number 2.
1 × 23 + 1 × 22 + 0 × 21 + 1 × 20
=8+4+0+1
= (13)10
• Convert binary number 11001010 into decimal number. Since
there is no binary point here and no fractional part.
= (11001010)2
= 1x27+1x26+0x25+0x24+1x23+0x22+1x21+0x20
= 128+64+0+0+8+0+2+0
= (202)10

Digital Logic Design Ch1-22


• Convert binary number 1010.1011 into decimal number. Since
there is a binary point here with fractional part. So,

(1010.1011)2
= 1x23+0x22+1x21+0x20+1x2-1+0x2-2+1x2-3+1x2-4
= 8+0+2+0+0.5+0+0.125+0.0625
= (10.6875)10

Digital Logic Design Ch1-23


Octal to Decimal conversion
• A Octal number can be converted to decimal by multiplying each
coefficient of that number with the power of 8 and adding.

Decimal number= nth bit * 8 n-1

Digital Logic Design Ch1-24


• (304)8=( )10

=3×82+0×81+4×80
=3×64+0×8+4×1
=196
(304)8=(196)10

(1534.56)8=( )10
=1×83+5×82+3×81+4×80 + 5*8-1 +6*8-2
=1×512+5×64+3×8+4×1
=860
(1534)8=(860̲)10

Digital Logic Design Ch1-25


• Convert an Octal Number (12.634)8 into Decimal?
= 1 x 81 + 2 x 80 + 6 x 8-1 + 3 x 8-2 + 4 x 8-3
= 1 x 8 + 2 x 1 + 6 x 1/8 + 3 x 1/64 + 4 x 1/512
= 8 + 2 + 6/8 + 3/64 + 1/128
= (1024+256+96+6+1)/128
= (10.8046875)10
(156.75)3---decimal

• Convert an Octal Number (456.34)8 into Decimal?


= 4 x 82 + 5 x 81 + 6 x 80 + 3 x 8-1 + 4 x 8-2
= 256 + 40 + 6 + 3/8 + 1/16
= (4096+640+96+6+1)/16
Digital Logic Design Ch1-26
22 18 42 34 62 50
23 19 43 35 63 51
24 20 44 36 64 52
25 21 45 37 65 53
26 22 46 38 66 54
27 23 47 39 67 55
30 24 50 40 70 56
31 25 51 41 71 57
32 26 52 42 72 58
33 27 53 43 73 59
34 28 54 44 74 60
35 29 55 45 75 61
36 30 56 46 76 62
37 31 57 47 77 63
40 32 60 48 100 64
41 33 61 49

Digital Logic Design Ch1-27


Hexadecimal to Decimal Conversion
• A hexadecimal number can be converted to decimal by
multiplying each coefficient of that number with the power of 16
and adding.

Decimal number= nth bit * 16 n-1

Digital Logic Design Ch1-28


• Given hexadecimal number is 7CF. A=10 B11 C12 D13 E14 F15
7 = 7,C = 12,F = 15
(7CF)16 = (7 × 162) + (12 × 161) + (15 × 160)
= (7 × 256) + (12 × 16) + (15 × 1)
= 1792 + 192 + 15
= (1999)10
• (1DA6)16
= (1 × 163) + (13 × 162) + (10 × 161) + (6 × 160)
= (1 × 4096) + (13 × 256) + (10 × 16) + (6 × 1)
= 4096 + 3328 + 160 + 6
= 7590

Digital Logic Design Ch1-29


• Convert hexadecimal number 1F.01B into decimal number.
B and F are 11 and 15 respectively. decimal number is,
• = (1F.01B)16
• = (1x161+15x160 +0x16-1+1x16-2+11x16-3)10
• = (31.0065918)10

Digital Logic Design Ch1-30


Hexad Decim 12 18 22 34 Hexad Decim
37 55
ecima al 23 35 ecimal al
13 19 38 56
l 24 36
14 20 39 57 41 65
1 1 25 37
2 2 15 21 26 38 3A 58 42 66
3 3 16 22 27 39
3B 59 43 67
28 40 44 68
4 4 17 23 3C 60
29 41
5 5 18 24 2A 42 3D 61 45 69
6 6 19 25 2B 43 46 70
3E 62
7 7 2C 44
1A 26 3F 63
8 8 2D 45
1B 27 40 64
9 9 2E 46
A 10 1C 28 2F 47
B 11 1D 29 30 48
C 12 1E 30 31 49
32 50
D 13 1F 31 33 51
E 14 20 32 34 52
F 15 21 33 35 53
10 16 36 54
11 17
Digital Logic Design Ch1-31
• Convert binary to decimal: (1101101.111)2
• Convert octal to decimal: ( 623.77)8
• Convert hex to decimal : (2AC5.D)16
• Convert following to decimal:
1) (0.342)6=(0.6203)10
2) (12121)3= (151)
3) (50)7 = (35)
4) (4310)5 =(580)
5) (198)12 =(260)

Digital Logic Design Ch1-32


Binary − Octal Conversion 8=23
Octal Binary
• Each group of 3 bits represents an octal
digit 0 000
• Integer part: start group from left to right. 1 001
• Fraction part: start group from right to left. 2 010
Assume Zeros
Example: 3 011

( 1 0 1 1 0 . 0 1 )2 4 100
5 101
6 110
( 2 6 . 2 )8 7 111

Works both ways (Binary to Octal & Octal to Binary)


Digital Logic Design Ch1-33
Octal − Binary Conversion 8=23
Octal Binary
• Each group of 3 bits represents an octal
digit. 0 000
1 001
2 010
Example: 3 011
( 2 6 . 2 )8 4 100
5 101
6 110
( 01 0 1 1 0 . 0 10 )2 7 111
Assume Zeros
Works both ways (Binary to Octal & Octal to Binary)
Digital Logic Design Ch1-34
• (1011011.111)2 = (133.7)8
• (1011011.1110)2 =(5B.E)16

(345.4)8= (011100101.100)2
(3CF.7)16= (001111001111.0111)2

(75.6)8= (111101.110)2

Digital Logic Design Ch1-35


Binary − Hexadecimal Conversion 16
= 24
Hex Binary
• Each group of 4 bits represents a 0 0000
hexadecimal digit. 1 0001
2 0010
• Integer part: start group from left to right. 3 0011
• Fraction part: start group from right to left 4 0100
5 0101
Assume Zeros 6 0110
Example:
7 0111
8 1000
( 1 0 1 1 0 . 0 1 00 )2 9 1001
A 1010
B 1011
C 1100
D 1101
(1 6 . 4 )16 E 1110
F 1111

Works both ways (Binary to Hex & Hex to Binary)


Digital Logic Design Ch1-36
Hexadecimal-Binary Conversion 16 =
24
Hex Binary
• Each group of 4 bits represents a 0 0000
hexadecimal digit. 1 0001
2 0010
• Integer part: start group from left to right. 3 0011
• Fraction part: start group from right to left 4 0100
5 0101
6 0110
Example:
7 0111
8 1000
(1 6 . 4 )16 9 1001
A 1010
B 1011
C 1100
D 1101
( 000 1 0 1 1 0 . 0 1 00)2 E 1110
Assume Zeros F 1111

Works both ways (Binary to Hex & Hex to Binary)


Digital Logic Design Ch1-37
Octal − Hexadecimal Conversion
• Convert to Binary as an intermediate step

Example:
( 2 6 . 2 )8

Assume Zeros Assume Zeros

( 0 1 0 1 1 0 . 0 1 0 )2

(1 6 . 4 )16

Works both ways (Octal to Hex & Hex to Octal)


Digital Logic Design Ch1-38
Hexadecimal-Octal Conversion
• Convert to Binary as an intermediate step

Example:
(1 6 . 4 )16

Assume Zeros Assume Zeros

( 0 1 0 1 1 0 . 0 1 0 )2

( 2 6 . 2 )8

Works both ways (Octal to Hex & Hex to Octal)


Digital Logic Design Ch1-39
• Convert binary to octal and hexadecimal.
1) 10110 2) 10110110113)110110111.01111
• Convert Octal to binary.
1) 2035 2)1762.46 10/5 2 0
Convert hexadecimal to binary. 2/5 0 2
2) F297 2) AF9.B0D 3) 8E47.AB
Convert Octal to hexadecimal.
3) 256 2) 6054.263 010101110 =0AE
Convert hexadecimal to Octal.
1) BC70.0E 2) 42FD

Digital Logic Design Ch1-40


• First 10 decimal First 10 decimal
digits in base 3. digits in base 4. Dec Base
Dec base Dec Base 4
3 4 14 32
0 00 0 0 15 33
1 01 1 1 16 100
2 02
2 2 17 101
3 10
3 3 18 102
4 11
4 10 19 103
5 12
5 11 20 110
6 20
6 12
7 21
7 13
8 22
8 20
9 100
9 21
10 101
10 22
11 102
12 110 11 23
Digital Logic Design Ch1-41
Decimal, Binary, Octal and
Hexadecimal
Decimal Binary Octal Hex
00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F

Digital Logic Design Ch1-42


1.5 Complements
• Complements are used in digital computers for simplifying the
subtraction operation and for logical manipulation.
• There are two types of complements for each base-r system: the
radix complement r’s complement and diminished radix
complement (r-1)’s complement.
• 1’s and 2’s complement in binary numbers.(to represent negative
numbers)
• 9’s and 10’s complement in decimal numbers.

The r’s complement:


N= positive number r= base n= integer part of no.of digits
rn-N for N≠ 0
0 for N=0
Digital Logic Design Ch1-43
• The 10’s complement of (52520)10
105 – 52520 = 47480 here n=5
The 10’s complement of (0.3267) 10
100-0.3267 = 0.6733 here n=0 1.0000-0.3267
The 10’s complement of (25.639) 10
102-25.639 = 74.361 here n=2

Digital Logic Design Ch1-44


• Diminished Radix Complement - (r-1)’s Complement
• Given a number N in base r having n digits, the (r–1)’s complement of N
is defined as:
(rn –r-m) – N n= no.of integer digits
m=no.of fraction digits
N=given number
9’s complement of (52520)10
105-100-52520=100000-1-52520=99999-52520 = 47479
9’s complement of (0.3267)10
100-10-4-0.3267=1-0.00001-0.3267 = 0.9999-0.3267= 0.6732
• 9’s complement of (25.639)10
102-10-3-25.639 = 100-0.001-25.639 = 99.999-25.639 = 74.360

Digital Logic Design Ch1-45


Complements
• 1’s Complement (Diminished Radix Complement) is represent
a negative numbers.
• All ‘0’s become ‘1’s
• All ‘1’s become ‘0’s

Example (10110000)2
 (01001111)2
If you add a number and its 1’s complement …

10110000
+ 01001111
11111111
Digital Logic Design Ch1-46
Complements
• 2’s Complement (Radix Complement)
• Take 1’s complement then add 1

Number:

10110000 10110000
01001111
+ 1

01010000 01010000

Digital Logic Design Ch1-47


• Find 1’s complement and 2’s complement of 10101110.
1’s complement: 01010001 + 1
2’s complement: 01010010

Find 2’s complement of binary number 10001.001.


1’s complement : 01110.110
2’s complement: 1
01110.111

Digital Logic Design Ch1-48


Sign number presentation
• 0- positive 1- negative
• Leftmost bit represents the sign and rest of the bits represent the
number.
• 9 is number its binary is 01001- unsigned or (+9) – signed
• 11001 – (25) unsigned 0r (-9)-signed
• Sign numbers can be represent in three ways:
• 1. sign magnitude represent --- it negates a no. by changing sign
• 2. 1’s complement represent---it negates a no. by complement
• 3. 2’s complement represent
• Sign magnitude used in ordinary arithmetic
• Complement used in computer arithmetic

Digital Logic Design Ch1-49


Sign number presentation
• 1’s Complementation in Signed Binary number
Representation:
• 1’s complement binary numbers are very useful in Signed
number representation.
• Positive numbers are simply represented as Binary number.
• There is nothing to do for positive binary number.
• But in case of negative binary number representation, represent
in 1’s complement.
• If the number is negative-15==1111==0000 then it is represented
using 1’s complement.
• First represent the number with positive sign and then take 1’s
complement of that number.

Digital Logic Design Ch1-50


• using 5 bits register. The representation of -5 and +5 will be as
follows:

• 00101==+5
• 11010 ==-5
• Note that drawback of this system is that 0 has two different
representation one is
• -0 ( 1 1111 in five bit register)
• +0 (0 0000 in five bit register) 00000 11111

Digital Logic Design Ch1-51


• 2’s Complementation in Signed Binary number
Representation
Positive numbers are simply represented as simple Binary
representation. But if the number is negative then it is represented
using 2’s complement. First represent the number with positive sign
and then take 2’s complement of that number.
e.g. using 5 bits registers. The representation of -5 and +5 will be as
follows:

Digital Logic Design Ch1-52


• The advantage of this system is that 0 has only one
representation for -0 and +0. Zero (0) is considered as always
positive (sign bit is 0) in 2’s complement representation.
Therefore, it is unique or unambiguous representation.

• -0: 11111+1 = 100000


• +0: 0 0000 == 11111+1 =00000 ==-0

Digital Logic Design Ch1-53


• +51 convert into 1’s and 2’s complement
51– binary --- 110011
1’s complement : 0 110011
2’s complement: 0110011 1001100 +1=1001101 -51

If number is negative, the magnitude is represented in its 2’s or 1’s


complement form and a sign bit 1 is placed in front of the MSB.
-51:-- 51 – binary --- 110011
1’s complement: 1001100
2’s complement: 1001101 (by adding 1 in 1’s complement)
Convert -45 and -73.75 in 1’s and 2’s complement form.
45: 00101101 – 11010010 +1 = 11010011
73.75: 01001001.1100 – 10110110.0011+1= 10110110.0100
Digital Logic Design Ch1-54
Sign-magnitude presentation
• For an n-bit number representation
• The most significant bit (MSB) indicates sign
• 0 -- positive 1-- negative
• The remaining n-1 bits represent magnitude.
• Example: 4-bit,8bit
• +2: 0 0000010
• -2: 1 0000010
• +5: 0 0000101
• -5:1 0000101
• +11:0 0001011
• -11: 1000 1011

Digital Logic Design Ch1-55


• Convert the following decimal numbers in 8-bit,
1) Sign magnitude form 2) 1’s complement 3) 2’s complement
a) +27 = 00011011 (-27)-> sm ==10011011
1’s== 11100100
2’s==11100101
-73.75=
b) +76 = 01001100 (-76) -> sm=11001100
1’s=10110011
2’s-10110100
c) +37=00100101 (-37)-> sm= 100100101
1’s= 111011010
2’s=111011011
Digital Logic Design Ch1-56
Complements
• Subtraction with Complements
• The subtraction of two n-digit unsigned numbers M – N in base r can be
done as follows:

Digital Logic Design Ch1-57


Complements
• Example 1.5
• Using 10's complement, subtract 72532 – 03250. M=72532-N

• Example 1.6
• Using 10's complement, subtract 03250 – 72532.

There is no end
carry.

Therefore, the answer is – (10's complement of 30718) =  69282.


Digital Logic Design Ch1-58
Complements
• Subtraction with (r-1)’s Complements
• The subtraction of two n-digit unsigned numbers M – N in base can be
done as follows:
• 1) Add the minuend M to (r-1)’s complement of subtrahend N.
• 2) if the end carry occurs , add 1 to the LSB of generated sum.
• 3) if the end carry not occurs, take the (r-1)’s complement of the
obtained sum and place a negative sign in front.

Digital Logic Design Ch1-59


• Using 9’s complement, subtract 72532 – 03250
M= 72532 100000-1-03250
9’complement of N= + 96749
1 69281
end round carry + 1
69282
9’s complement ,subtract 03250 – 72532
M= 03250
9’s complement of N= +27467
30717 ----no carry
Ans: -(9’s complement of 30717) = -(69282)

Digital Logic Design Ch1-60


Subtractions by 1’s
Complement:
• Take 1’s complement of the subtrahend
• Add with minuend
• If the result of above addition has carry bit 1, then add it to the
least significant bit (LSB) of given result
• If there is no carry bit 1, then take 1’s complement of the result
which will be negative
• Evaluate 10101(M) – 00101(N)
• 1’s complement of subtrahend 00101,it is 11010,
• then add both , 10101 + 11010 =1 01111 .
• Since, there is carry bit 1, so add this to the LSB of given result,
i.e., 01111+1=10000

Digital Logic Design Ch1-61


• Evaluate: 1110 -11110 ---00001
• take 1’s complement of subtrahend 11110, which 00001.
• Then add both of these, 1110 + 00001 =01111 .
• Since there is no carry bit 1, so take 1’s complement result, is
10000, and
this is negative number, i.e,(10000)

Digital Logic Design Ch1-62


• Subtractions by 2’s Complement
• The algorithm to subtract two binary number using 2’s
complement is explained as following below −
• Take 2’s complement of the subtrahend
• Add with minuend
• If the result of above addition has carry bit 1, then it is dropped
and this result will be positive number.
• If there is no carry bit 1, then take 2’s complement of the result
which will be negative.

Digital Logic Design Ch1-63


• Evaluate 10101 - 00101
take 2’s complement of subtrahend 00101, which will be 11011,
then add both of these.
So, 10101 + 11011 =1 10000.
Since, there is carry bit 1, so dropped this carry bit 1,
take this result will be 10000 will be positive number.

Digital Logic Design Ch1-64


• Evaluate 11001 – 11100 00011+1=00100
• take 2’s complement of subtrahend 11110, which will be 00100.
Then add both of these, So, 11001 + 00100 =11101.
• Since there is no carry bit 1,
• so take 2’s complement of above result, which will be 00011,
• and this is negative number, i.e, (00011)

Digital Logic Design Ch1-65


Complements
• Example 1.7
• Given the two binary numbers X = 1010100 and Y = 1000011, perform the
subtraction (a) X – Y ; and (b) Y  X, by using 2's complement.

There is no end carry.


Therefore, the answer is Y
– X =  (2's complement of
1101111) =  0010001.

Digital Logic Design Ch1-66


Complements
• Subtraction of unsigned numbers can also be done by means of the (r  1)'s
complement. Remember that the (r  1) 's complement is one less then the r's
complement.
• Example 1.8
• Repeat Example 1.7, but this time using 1's complement.

There is no end carry,


Therefore, the answer is Y –
X =  (1's complement of
1101110) =  0010001.
Digital Logic Design Ch1-67
1.6 Signed Binary Numbers
• To represent negative integers, we need a notation for negative
values.
• It is customary to represent the sign with a bit placed in the
leftmost position of the number since binary digits.
• The convention is to make the sign bit 0 for positive and 1 for
negative.
• Example: -(9)10 10001001== 11110110 ===

• Table 1.3 lists all possible four-bit signed binary numbers in the
three representations.
Digital Logic Design Ch1-68
Signed Binary Numbers

Digital Logic Design Ch1-69


Signed Binary Numbers
• Arithmetic addition
• The addition of two numbers in the signed-magnitude system follows the rules of
ordinary arithmetic. If the signs are the same, we add the two magnitudes and
give the sum the common sign. If the signs are different, we subtract the smaller
magnitude from the larger and give the difference the sign if the larger magnitude.
• The addition of two signed binary numbers with negative numbers represented in
signed-2's-complement form is obtained from the addition of the two numbers,
including their sign bits.
• A carry out of the sign-bit position is discarded.
• Example:

Digital Logic Design Ch1-70


Signed Binary Numbers
• Arithmetic Subtraction
• In 2’s-complement form:

1. Take the 2’s complement of the subtrahend (including the sign bit)
and add it to the minuend (including sign bit).
2. A carry out of sign-bit position is discarded.

( A)  (  B ) ( A)  (  B )
( A)  (  B ) ( A)  (  B )
• Example:

( 6)  ( 13) (11111010  11110011)


(11111010 + 00001101)
00000111 (+ 7)
Digital Logic Design Ch1-71
• Find the 10’s complement of (935)11 rn – r(-m) –(N)10
• r=11 (r-1)=10
first convert (935)11 ===(1127)10
(11)3-1-(1127)10=(203)10 ---(175)11
11’s complement =(175)11+1=(176)11
• Find the 7’s complement of (172)8 r=8 r-1=7 N=
(172)8== (122)10
(8)3-1-(122)10 = 512-1-122 =(390)10 ==(605)8
8’s complement= (605)8+1 = (606)8
• Find the 15’s complement of (F9)16 r=16 r-1=15
(F9)16==(249)10
(16)2-1-(249)10 == 256-1-249 = (6)10 = (6)16
16’s complement = (6)16+1 = (7)16
Digital Logic Design Ch1-72
• (1230)4 +(23)4 =
1 1
1230 1230
+ 23 * 23
(1313)4 31200
1101 0
102210
11
(367)8 +(715)8=
+ 715
1304)8
(296)12 + (57)12= 331)12
Digital Logic Design Ch1-73
1.7 Binary Codes
• BCD Code
• A number with k decimal digits will
require 4k bits in BCD.
• Decimal 396 is represented in BCD
with 12bits as 0011 1001 0110, with
each group of 4 bits representing one
decimal digit.
• 254 – 0010 0101 0100
• A decimal number in BCD is the
same as its equivalent binary number
only when the number is between 0
and 9.
• The binary combinations 1010
through 1111 are not used and have
no meaning in BCD.

Digital Logic Design Ch1-74


Binary Code
• Example:
• Consider decimal 185 and its corresponding value in BCD and binary:

• (176)10= (0001 0111 0110 )BCD


• 7)10= 0111 0111

• BCD addition :
• 1) sum <=9 and final carry 0: ans. Correct
• 2) sum<=9 and final carry 1: ans incorrect
• 3) sum>9 and final carry 0: ans incorrect
• If answer is incorrect then add (0110)=6 into obtained answer.

Digital Logic Design Ch1-75


Digital Logic Design Ch1-76
Binary Code
• Example:
• Consider the addition of 184 + 576 = 760 in BCD:

Digital Logic Design Ch1-77


Binary Codes
• Other Decimal Codes

Digital Logic Design Ch1-78


4 + 8=12 0+9
0100
+ 1000
1100 =12

+ 0110
0001 0010 =12

Digital Logic Design Ch1-79


• 8 4 -2 -1 == 8+4-2-1 =9 567– 0101 0110 0111
• 0- 0 0 0 0
• 1- 0111 4-2-1=1
• 2-0110 4-2=2
• 3-0101 4-1=3
• 4- 0100 4
• 5- 1011 8-2-1=5
• 6- 1010 8-2=6
• 7- 1001
• 8-1000
• 9-1111

Digital Logic Design Ch1-80


`
• The excess-3, the 2,4,2,1 and the 8,4,-2,-1 are self-
complementary codes.
• Reason: 9’s complement of the decimal number is obtained by
changing 1’s to 0’s and 0’s to 1’s.
• For example:
• (395)10 is represent in 2421 – 0011 1111 1011.
• 9’s complement is 1100 0000 0100 – (604)10
• This property is useful when arithmetic operations – substraction
10– 0001 0000
15 -0001 0101

Digital Logic Design Ch1-81


Binary Codes
• Gray Code/Reflected code Binary Gray
• The advantage of the Reflected Decim
al
code over the binary numbers is
that a number in the reflected code 0 0 0 0 0 0 0 0 0
changes by only one bit as it B1b2b3b4 G1g2g3g4
G1=b1
proceeds from one another to the
G2=b1 xor
next. b2
• Error detection. G3=b2 xor
• Representation of analog data. b3
G4=b3 xor
• Low power design. b4
1 0001 0001
2 0010 0011
3 0011 0010
4 0100 0110
1-1 and onto!! 5 0101 0111
Digital Logic Design Ch1-82
b3 B2 B1 B0
0 1 1 0
G3-0 1 0 `1

Digital Logic Design Ch1-83


Binary Codes
• Error-Detecting Code
• To detect errors in data communication.
• A parity bit is an extra bit included with a message to make the total
number of 1's either even or odd.
• Example:
• Consider the following two characters and their even and odd parity:

Digital Logic Design Ch1-84


Binary Codes
• Error-Detecting Code
• Redundancy (e.g. extra information), in the form of extra bits, can be
incorporated into binary code words to detect and correct errors.
• A simple form of redundancy is parity, an extra bit appended onto the
code word to make the number of 1’s odd or even. Parity can detect all
single-bit errors and some multiple-bit errors.
• A code word has even parity if the number of 1’s in the code word is even.
• A code word has odd parity if the number of 1’s in the code word is odd.
• Example:

Message A: 100010011 (even parity)


Message B: 10001001 0 (odd parity)

Digital Logic Design Ch1-85


1.8 Binary Storage and Registers
• Registers
• A binary cell is a device that possesses two stable states and is capable of storing
one of the two states.
• A register is a group of binary cells. A register with n cells can store any discrete
quantity of information that contains n bits.

n cells 2n possible states


• A binary cell
• Two stable state
• Store one bit of information
• Examples: flip-flop circuits, ferrite cores, capacitor
• A register
• A group of binary cells
• AX in x86 CPU
• Register Transfer
• A transfer of the information stored in one register to another.
• One of the major operations in digital system.
• An example in next slides.

Digital Logic Design Ch1-86


A Digital Computer Example

Memory

Control
CPU unit Datapath

Inputs: Keyboard, Outputs: CRT,


mouse, modem, LCD, modem,
Input/Output
microphone speakers

Digital Logic Design Ch1-87


Transfer of information

Figure 1.1 Transfer of information among register Digital Logic Design Ch1-88
Transfer of information
• The other major component
of a digital system
• Circuit elements to
manipulate individual bits of
information
• Load-store machine
LD R1;
LD R2;
ADD R3, R2, R1;
SD R3;

Figure 1.2 Example of binary information processing Digital Logic Design Ch1-89
1.9 Binary Logic
• Definition of Binary Logic
• Binary logic consists of binary variables and a set of logical operations.
• The variables are designated by letters of the alphabet, such as A, B, C, x, y, z, etc,
with each variable having two and only two distinct possible values: 1 and 0,
• Three basic logical operations: AND, OR, and NOT.

Digital Logic Design Ch1-90


Binary Logic
• Truth Tables, Boolean Expressions, and Logic Gates

AND OR NOT
x y z x y z x z
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

z=x•y=xy z=x+y z = x = x’

x x x
y z y z z
Digital Logic Design Ch1-91
Switching Circuits

AND OR

A ,B--- binary variables == 0– switch is open 1– switch is off


L– binary variable= bulb– 0- when off 1- when on
Switches in series– A.B– light on –when A and B are closed.
Switches in parallel- A+B- light on- when A or B are closed.

Digital Logic Design Ch1-92


Binary Logic

• Logic gates
• Example of binary signals

3
Logic 1
2
Un-define
1
Logic 0
0

Figure 1.3 Example of binary signals Digital Logic Design Ch1-93


Binary Logic
• Logic gates
• Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.4 Symbols for digital logic circuits

Fig. 1.5 Input-Output signals for gates Digital Logic Design Ch1-94
Binary Logic
• Logic gates
• Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.6 Gates with multiple inputs

Digital Logic Design Ch1-95

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