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08 DLD

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11 views39 pages

08 DLD

Uploaded by

happylifehome924
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Sequential Circuits

Lecture 8
Sequential Circuits

• We discussed various combinational circuits in earlier


chapters. All these circuits have a set of output(s), which
depends only on the combination of present inputs. The
following figure shows the block diagram of sequential
circuit.
block diagram
Sequential Circuits

• The combinational circuit does not use any memory.


• Hence the previous state of input does not have any effect
on the present state of the circuit.
• But sequential circuit has memory so output can vary
based on input. This type of circuits uses previous input,
output, clock and a memory element.
• Or sequential circuit is combinational circuit with memory.
• In combinational circuit the output only depend on present
input but in sequential circuit used memory to store the
previous state.
…

The output of sequential circuit depend upon present input


and present state.
Present state mean that the information stored in
sequential circuit.
The present state and present input will define output and
next state.
…

• This sequential circuit contains a set of inputs and


output(s). The output(s) of sequential circuit depends not
only on the combination of present inputs but also on the
previous output(s). Previous output is nothing but
the present state.
…

• Therefore, sequential circuits contain combinational circuits


along with memory (storage) elements. Some sequential
circuits may not contain combinational circuits, but only
memory elements.
Combinational circuits Vs Sequential
circuits
Combinational Circuits Sequential Circuits

Outputs depend only on present inputs. Outputs depend on both present inputs and
present state.

Feedback path is not present. Feedback path is present.

Memory elements are not required.


Memory elements are required.

Clock signal is not required. Clock signal is required.

Easy to design. Difficult to design.


Types of Sequential Circuits

• Following are the two types of sequential circuits −


• Asynchronous sequential circuits
• Synchronous sequential circuits
…

• Asynchronous
• sequential circuits change their states and output values whenever a
change in input values occurs.
• That means, all the outputs of asynchronous sequential circuits do not
change (affect) at the same time
• Latches

• Synchronous
• sequential circuits change their states and output values at fixed
points of time, i.e. clock signals.
• Flip-Flops
Clock Signal and Triggering

• Clock signal
• Clock signal is a periodic signal and its ON time and OFF
time need be the same. We can represent the clock signal
as a square wave, when both its ON time and OFF time
are same. This clock signal is shown in the following figure
…

• n the above figure, square wave is considered as clock


signal. This signal stays at logic High (5V) for some time
and stays at logic Low (0V) for equal amount of time. This
pattern repeats with some time period. In this case,
the time period will be equal to either twice of ON time or
twice of OFF time.
…

• We can represent the clock signal as train of pulses,


when ON time and OFF time are not same. This clock signal
is shown in the following figure.
…

• In the above figure, train of pulses is considered as clock


signal. This signal stays at logic High (5V) for some time
and stays at logic Low (0V) for some other time. This
pattern repeats with some time period. In this case,
the time period will be equal to sum of ON time and OFF
time.
…

• The reciprocal of the time period of clock signal is known as


the frequency of the clock signal. All sequential circuits
are operated with clock signal.
Types of Triggering

• Following are the two possible types of triggering that are


used in sequential circuits.
• Level triggering
• Edge triggering
Level triggering

• There are two levels, namely logic High and logic Low in
clock signal. Following are the two types of level
triggering.
• Positive level triggering
• Negative level triggering
• If the sequential circuit is operated with the clock signal
when it is in Logic High, then that type of triggering is
known as Positive level triggering. It is highlighted in
below figure.
…

• If the sequential circuit is operated with the clock signal


when it is in Logic Low, then that type of triggering is
known as Negative level triggering. It is highlighted in
the following figure.
Edge triggering

• There are two types of transitions that occur in clock signal.


That means, the clock signal transitions either from Logic
Low to Logic High or Logic High to Logic Low.
• Following are the two types of edge triggering based on
the transitions of clock signal.
• Positive edge triggering
• Negative edge triggering
Positive edge triggering

• If the sequential circuit is operated with the clock signal


that is transitioning from Logic Low to Logic High, then that
type of triggering is known as Positive edge triggering.
It is also called as rising edge triggering. It is shown in the
following figure.
Negative edge triggering

• If the sequential circuit is operated with the clock signal


that is transitioning from Logic High to Logic Low, then that
type of triggering is known as Negative edge triggering.
It is also called as falling edge triggering. It is shown in the
following figure.
Digital Circuits - Latches

• Basic one bit storage element is called Latch.


• There are two types of memory elements based on the type
of triggering that is suitable to operate it.
• Latches
• Flip-flops
Latches operate with enable signal, which is level
sensitive. Whereas, flip-flops are edge sensitive. We will
discuss about flip-flops in next chapter. Now, let us discuss
about SR Latch & D Latch one by one.
SR-Latch

• SR Latch is also called as Set Reset Latch.


• The circuit diagram of SR Latch is shown in the following
figure.
SR latch work with NOR gate OR NAND
gate
Latch Build from NOR gate
Both Set and Reset are zero
S=1 R=0 / S=0 R=1
Invalid state
SR Latch using NAND Gate
…
…
…
…
…
…
D Latch

• There is one drawback of SR Latch. That is the next state


value can’t be predicted when both the inputs S and R are
one. So, we can overcome this difficulty by D Latch. It is
also called as Data Latch. The circuit diagram of D Latch
is shown in the following figure
Block Diagram for D Latch
…

• This circuit has single input D and two outputs Q(t) & Q(t)’.
D Latch is obtained from SR Latch by placing an inverter
between S amp;& R inputs and connect D input to S. That
means we eliminated the combinations of S & R are of
same value.
Truth table

E D Q ~Q

0 0 Q ~Q

0 1 Q ~Q

1 0 0 1

1 1 1 0

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