AVR Architecture and Assembly Language Programming

Objectives
 List the registers of AVR architecture
 Examine the data memory of AVR architecture.
 Perform simple operations such as ADD, LOAD and access internal RAM memory.
 Explain the purpose of status register.
 Discuss data RAM memory space allocation.
 Code simple AVR assembly language instructions.
 Describe AVR data types and directives.
 Assemble and run AVR program using Atmel Studio.
 Describe the sequence of events that occur up-on AVR power on.
 Detail the execution of AVR Assembly language instructions.
 Examine the AVR registers and data RAM using Atmel studio Simulator.

1
 General purpose registers in AVR
 CPU use registers to store data temporarily.
 So, to program in assembly language, we must understand:
 Registers and architectures of a given CPU and the role they play in processing data.
 AVR microcontrollers have many registers for arithmetic and logical operations.
 In the CPU, registers are used to store information temporarily. That information could be a byte of data
to be processed. Or an address pointing to the data to be fetched.
 The vast majority of AVR registers are 8-bit registers.
 The range from MSB(most significant bit (D7)) to the LSB(List significant bit (D0)).
 Arranged with 8-bit data type.
 any data larger than 8-bits must be broken in to 8-bit chunks before it is processed.

2
 General purpose registers in AVR

 In AVR there are 32 general purpose registers. They are R0-R31 and are located in the
lowest location of memory address.

 These Registers in AVR are the same as accumulator in other microcontrollers.

 They can be used by all arithmetic and logic instructions.

 To understand this let as see with Some simple instructions

3
 Some simple instructions
 LDI (Load Immediate): copies 8-bit data into the general purpose registers.
LDI Rd, k ; Its equivalent in high level languages: Rd = k
Rd can be any of the GPR’s R16 to R31
K can be 8-bit number.
 To write comment in assembly language we use ;(semicolon).
 We can not load values in to registers R0-R15 using the LDI instruction.
 When programming the GPRs of the AVR microcontroller with an intermediate value the
following points should be noted.
 If we want to present a number in hex we must put dollar sign($) or 0x in front of it.
 If values from 0 to F are moved to 8-bit registers such as GPRs the rest of the bits assumed to be
all zero. E.g. LDI R16, 0x5 the result will be R16 = 0x05. or R16 = 00000101 in binary.
 Moving a value larger than 255(FF in hex in to GPRs will cause an error.) E.g. LDI R17, 0x7F2.

4
 Some simple instructions
 LDI (Load Immediate): copies 8-bit data into the general purpose registers.
LDI Rd, k ; Its equivalent in high level languages: Rd = k
Rd can be any of the GPR’s R16 to R31
K can be 8-bit number.
Example:
LDI R16,53
R16 = 53
LDI R19,132
• R19=132
LDI R23,0x27
R23 = 0x27
 We can not load values in to registers R0-R15 using the LDI instruction.

5
Some simple instructions

6
 Some simple instructions

 ADD instruction

 It has the following format

 ADD Rd, Rr , ADD Rr to Rd and store the result in Rd.

 Example:

LDI R16, 0x25

LDI R17, 0x34

ADD R16, R17

 Execute the above lines result in R16 = 0x59 (0x25 + 0x34 = 0x59)

7
 The AVR Data Registers
 In AVR microcontroller there are
two kinds of memory spaces.
Which are code memory space
and data memory space.
 Our program is stored in code
memory space. Where as data
memory space stores data.
 Data memory space composed of
three parts. These are GPRs, I/O
memory and internal data SRAM.

8
 The AVR Data Registers
 GPRs
 As we have discussed earlier GPRs uses 32 bytes of data memory space.
 They always take the address location $00-$1F in the data memory space.
 The I/O data memory
 is dedicated to specific functions such as status register, timer, serial communications, I/O port, ADC and so on.
 The function of each I/O memory is fixed by CPU designer at design time. Because it is used to control the
microcontroller or peripherals.
 I/O memory made up of 8-bit registers.
 In some microcontrollers I/O memory called special purpose registers.
 Internal SRAM
 Used for storing data and parameters by AVR programmers and C compilers. Each location is 8-bit wide.
 Generally it is called scratch pad.
 The sizes of SRAM vary from chip to chip even in the same family.

9
 Using instructions with the Data Memory
 LDS Instruction(Load Direct from Data Space)
LDS Rd, K;
K can be $0000to $FFFF address locations Rd can be any 0-31 GPR’s.
Example:
LDS R0, 0x300
LDS R1,0x302
ADD R0,R1
 The instruction tells the CPU to load(Copy) one byte from an address in data memory to
the GPRs.
 After the instruction is executed, the GPR will have the same value as the location in the
data memory.

10
 Using instructions with the Data Memory

Table: The effect of ADD R1,R0 (-assuming $300 and $302 have initially α and β respectively.

Figure: Execution of LDS R0, 0x300, and LDS R1,0x302

11
 Using instructions with the Data Memory
 STS Instruction(Store Direct to Data Space)
STS K, Rd;
K can be $0000 to $FFFF address locations and Rd can be any 0-31 GPR’s.
Example:
STS 0x230, R25;
 The instruction tells the CPU to store(Copy) the content of GPR to an address in data memory space.
 After the instruction is executed, the location in the data space will have the same value as the GPR.
 Note: We can not copy(store) an immediate value directly into the SRAM location in AVR. This must be
done via GPRs.
 Example:

12
 Using instructions with the Data Memory
 IN & OUT Instructions
IN Rd, A
load contents of an IO location to register
Rd can be 0-31 GPR’s
A can be 0-63 SFR’s or IO registers
OUT A, Rr
send contents of a register content to IO location
A can be 0-63 SFR’s or IO registers
Rr can be 0-31 GPR’s
IN vs LDS
IN is 2 bytes instruction, executes in 1 m/c cycle
IN can use IO register names instead of their addresses
IN is available in all AVR chips, LDS may or may not

13
 Using instructions with the Data Memory
 MOV instructions
 Used to copy data among the GPRs of R0=R31 with the following format.
 MOV Rd, Rr, where Rd and Rr can be any of the GPRs.
 Example: MOV R10, R20, R10 = R20
 For instance, if R20 contains 60, after execution of the above instruction both R20
and R10 will contain 60.
 Example 2: The following program adds 0x19 to the contents of location 0x220 and
stores the result in location 0x221.
LDI R20, 0x19
LDS R21, 0x220
ADD R21, R20
STS 0x221, R21

14
 Using instructions with the Data Memory
 INC instruction: It increment the content of the given register.
 INC Rd; it increment the contents of the Rd by one(0<=d<=31)
 Example:
LDS R20, 0x430
INC R20
STS 0x430, R20
 SUB Instruction
 Tells the CPU to subtract the value of Rr from Rd and put the result back into the Rd register.
 SUB Rd, Rr, Rd – Rr
 Example:
LDI R20, 0x34
LDI R21, 0x25
SUB R20, R21

15
 Using instructions with the Data Memory
 DEC Instruction
 Format: DEC Rd
 It decrement(subtract 1) from the content of Rd and puts the result back
 Example:
LDI R30, 3
DEC R30
DEC R30

16
 Using instructions with the Data Memory
 DEC Instruction
 Format: DEC Rd
 It decrement(subtract 1) from the content of Rd and puts the result back
 Example:
LDI R30, 3
DEC R30
DEC R30
 Example 2(COM instruction)
LDI R16, 0x55; R16 = 0x55
OUT PORTB, R16; copy R16 to PORT B SFR (PB = 0x55)
COM, R16; Complement R16 (R16 = 0xAA)
OUT PORTB, R16; copy R16 to Port B SFR (PB = 0xAA)

17
 AVR Status Register
 The AVR has a flag register to indicate arithmetic conditions such as the carry bit.
 The status register (flag register) in the AVR is an 8-bit register.
 In the status register the bits C, Z, N, V, S and H are called conditional flags. Meaning
that they indicate some conditions that result after an instruction is executed.
 Each of the conditional flags can be used to perform a conditional branch(jump).
 The Status register contains information about the result of the most recently executed
arithmetic instruction. This information can be used for altering program flow in order
to perform conditional operations. The Status register is updated after all the Arithmetic
Logical Unit (ALU) operations.

18
 AVR Status Register Bits
 I (bit 7): Global Interrupt Enable: If you have ever worked with interrupts in C, you
should be familiar with the Global Interrupt Enable flag. By setting this flag, interrupts
are enabled in the system. By clearing it, interrupts will not disrupt your program flow.
In C, you used special functions to set and clear the Global Interrupt Flag, sei() and cli().
In AVR Assembly, the same is accomplished with the instructions sei and cli.
sei ; enable interrupts
cli ; disable interrupts

 T Flag(bit 6) : Copy Storage: is not actually set by any arithmetic or logical operations.
Instead, it is yours to set and clear based on how you see fit, using
the set and clt instructions.
set ; set T flag
clt ; clear T flag

19
 AVR Status Register Bits
 H (bit 5): Half Carry Flag:
 is set when an overflow occurs between the lower and upper 4-bits of a register.
 ldi r16, 0x0F ; load r16 with 0x0F
 inc r16 ; increment r16 (half carry set)
 The half carry is most useful when dealing with Binary Coded Digits, where two digits are stored in the
upper and lower nibbles (4-bits) of a register.
 S (bit 4): Sign Flag, The Sign Flag is an extra bit of logic that can be used to determine if the result of a
previous operation is positive or negative. It is just the exclusive OR of the Negative and Two's
Complement Overflow flags. It will be set if one or the other is set, but not both. Consider
subtracting 10 from -120. It is obvious that the result it -130, but if we attempt this.
ldi r16,0x88 ; load r16 with 0x88 (-120)
ldi r17,0x0A ; load r17 with 0x0A (10)
sub r16,r17 ; subtract r17 from r16 (result = 0x7E = 126)
The result is not -130 since that value is too large for an 8-bit signed number. After
the sub instruction, the Negative Flag will not be set since bit 7 of the result is cleared.
However, the Sign Flag will be set, correctly indicating the result should be negative.
20
 AVR Status Register Bits
 S (bit 4): Sign Flag,
 Consider addition instead
 ldi r16,0x78 ; load r16 with 0x78 (120)
 ldi r17,0x0A ; load r17 with 0x0A (10)
 add r16,r17 ; add r17 to r16 (result = 0x82 = 130)
 Here the Negative Flag will be set even though the result is clearly positive. However,
because a two's complement overflow occurred, the Sign Flag will not be set, correctly
indicating the result is positive.
 Using the Sign flag can give you a better idea of whether a result is positive or negative.
It is very useful when creating alternate branches to handle cases like were shown
above.

21
 AVR Status Register Bits
 V(bit 3) : Overflow Flag: This flag is set whenever the result of a signed number
operation is too large, causing the high order bit to overflow into the sign bit. In general,
the carry flag used to detect errors in unsigned arithmetic operations while the overflow
flag is used to detect errors in signed arithmetic operations.
 N (bit 2): Negative Flag: binary representation of signed numbers uses D7 as the sign
bit. The negative flag reflects the result of an arithmetic operation. If the D7 bit of the
result is zero, then N = 0 and the result is positive. If the D7 bit of the result is one, then
N = 1 and the result is negative.
 Z (bit 1): Zero Flag: The zero flag reflects the result of an arithmetic or logic
operation. If the result is zero, then Z = 1. If the result is not zero, then Z = 0.
 C (bit 0): Carry Flag: this flag is set whenever there is a carry from the D7 bit. This
flag bit is affected after an 8-bit addition or subtraction.

22
 Status Register (SREG)
SREG: I T H S V N Z C
Carry
Interrupt oVerflow Zero
Temporary Negative Data Address
Sign Space
Half carry N+V
$0000
Example:Show
Example:
Example:
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in the
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instructions: Purpose
R0 0x2F

...
Registers
ALU LDI LDILDI 0x38
R1
LDI
R16, R20, 0x9C
R20,
R20, 0x9C
0xA5
0x52;R16 = 0x38 $001F IO Address
R2 $0020 TWBR $00

LDI LDI 0x2F

LDI
LDI
R17, R21,
R21,
R21, 0x9C
0x23
0x73
0x64
;R17 = 0x2F
TWSR $01
Standard IO
…

...
SUB R17R20,
R20, R21;add R17;add
;subtract R21 from R20

...
SREG: I T H S V N Z C ADD SUB
ADD
R16, R20, R21
R21 ;subtract
R21 toR21
to R16 R20from R20
Registers

CPU
R15 $005F
SPH
SREG
$3E
$3F
R16
Solution: $0060
Solution:R17
Solution:
Solution: 11 General
$52
$9C
$A5 0101 0010
1001 1100
1010 1100
0101
$38
$9C 0011
1001 1000 purpose

...
PC
…

- $73 0111 0011 RAM

+-- +$64
$9C
$23
$2F 10010100
0010
0110 1100
0011
1111
$DF
R30
$00
$82 1101
0000
1000 1111
0000
0010 R20
R20
R20 =
== $DF
$00
$82
(SRAM)
Instruction decoder $67
$100
C = 1 because
0110
1 0000 00000111 R16
R20 = 00 0x67
R31 R21 is bigger than R20 and there is a borrow from D8 bit.
CC===100because
becausethere
because R21 is
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because the
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the R20 ahas
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the toto the
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Z == 10 because
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(the result)
result) has
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value 0other than 0 after the addition.
$FFFF

Compiled by: Course owner 23

 AVR Data Format and Directives
 The AVR microcontroller has only one data type. It is 8-bit, and the size of each register
is also 8-bits.
 It is the job of the programmer to break down data larger than 8-bits.
 The data types used by the AVR can be positive or negative.
 Data Format representation in AVR microcontroller can be represented in four ways.
These are hex, binary, decimal and ASCII format.
 Hex represented as 0x or $ sign in front of the number. E.g. LDI R16, 0x99 or $99
 Binary represented as 0b in front of the number. E.g. LDI R23, 0xb00100101
 Decimal  represent the number as it is without any symbol. E.g. LDI R17, 12
 ASCII  use single quotes to represent the number. E.g. LDI R23, ‘2’
 To represent string we use double quote. And for defining ASCII strings(more than one
Character) we use .DB(Define Byte) directive

24
 Assembler Directives
 While instructions tell the CPU what to do, directives also called pseudo-instructions give
directions to the assembler.
 .EQU(equate)
 Used to define a constant value or a fixed memory address. It does not set aside
storage for a data item, but associate a constant number with a data or an address label
so that when the label appears in the program, its constant will be substituted for the
label.
 Example:- .EQU COUNT = 0x25
LDI R21, COUNT
 After executing the above instruction R21 will be loaded with the value 25 hex.
 We can also use the names of the I/O registers instead of their address with .EQU
directive.
 .EQU PORTB = 0x1B
 .SET directive is identical with .EQU with the only difference that the value assigned by
the .SET directive may be reassigned later.
25
 Assembler Directives
 .ORG(Origin)
 Used to indicate the beginning of the address. It can be used for both code and data.
 .INCLUDE directives
 Tells the AVR assembler to add the content of a file to our program.(like #include
directive in C/C++).
 For example when you want to use ATmega32, you must write the following instruction
at the beginning of your program.
 .INCLUDE “M32DEF.INC”

26
 Introduction to AVR Assembly Programming

 is a low-level language that helps to communicate directly with computer hardware.

 It uses mnemonics to represent the operations that a processor has to do. Which is an
intermediate language between high-level languages like C++ and the binary language.

 It uses hexadecimal and binary values, and it is readable by humans.

 Assembly language program consists a series of lines of assembly language instructions.

 An Assembly language instructions consists mnemonics, optionally followed by one or

two operands.

 The operands are the data items being manipulated, and the mnemonics are the
commands to the CPU, telling it what to do with those items.
27
 Introduction to AVR Assembly Programming

 An assembler is used to convert assembly code into machine language. That machine
code is stored in an executable file for the sake of execution.

 It enables the programmer to communicate directly with the hardware such as registers,
memory locations, input/output devices or any other hardware components. Which
could help the programmer to directly control hardware components and to manage the
resources in an efficient manner.

28
 Assembling an AVR Program

 How to execute Assembly Language?

1. Write the program in a text editor, in the case of AVR we use Atmel Studio, which has a
text editor, assembler, simulator and much more all in one software package.
2. The “asm” source file containing code created in step 1 is fed to the AVR assembler.
The assembler produces an object file, hex file, an eeprom file, a list file and map file.
After successful link, the hex file is ready to be burned in to the AVR’s program ROM
and is downloaded into the AVR Trainer.

29
 Assembling an AVR Program

 How to execute Assembly Language?

1. Write the program in a text editor, in the case of AVR we use Atmel Studio, which has a
text editor, assembler, simulator and much more all in one software package.
2. The “asm” source file containing code created in step 1 is fed to the AVR assembler.
The assembler produces an object file, hex file, an eeprom file, a list file and map file.
After successful link, the hex file is ready to be burned in to the AVR’s program ROM
and is downloaded into the AVR Trainer.

30
 Branch, Call, and Time Delay Loop
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 Objectives
 Code AVR assembly language instructions to create loops.
 Code AVR assembly language conditional branch instructions.
 Explain the conditions that determine each conditional branch instruction.
 Code JMP(Long Jump) instructions for unconditional jumps.
 Code AVR subroutines.
 Describe stack and its use in subroutines.
 Discuss pipelining in the AVR.
 Discuss crystal frequency versus instruction cycle time in the AVR.
 Code AVR Programs to generate a time delay.
 In the sequence of instructions to be executed, it is often necessary to transfer program control to different
location. There are many instructions in AVR to achieve this.

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 Introduction
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• CPU executes instructions one after another.

– For example in the following C program, CPU first executes the 1 void main ()
2 {
instruction of line 3 (adds b and c), then executes the 3 a = b + c;
instruction of line 4. 4 c -= 2;
5 d = a + c;
6 }

• But sometimes we need the CPU to execute, an instruction

other than the next instruction. For example:
– When we use a conditional instruction (if)
– When we make a loop
– When we call a function

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 Introduction (Continued)
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• Example 1: Not executing the next instruction,

because of condition.
– In the following example, the instruction of 1 void main ()
2 {
line 6 is not executed. 3 int a = 2;
4 int c = 3;
5 if (a == 8)
6 c = 6;
7 else
8 c = 7;
9 c = a + 3;
}

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 Introduction (Continued)
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• Example 2: In this example the next instruction will not be

executed because of loop.
– In the following example, the order of execution is as 1 void main ()
2
follows: 3
{
int a, c = 0;
• Line 4 4 for(a = 2; a < 4; a++)
5 c += a;
• Line 5 6 a = c + 2;

• Again, line 4 7 }
8
• Again line 5 9

• Line 6

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 Introduction (Continued)
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• Example 3: Not executing the next instruction, because of Code

calling a function. 1 void func1 ();

2 void main ()
– In the following example, the instruction of line 6 is 3 {

not executed after line 5. 4

5
int a = 2, c = 3;
func1 ();
6 c = a + 3;
7 }

• In the assembly language, there are 2 groups of 8 void func1 (){

9 int d = 5 / 2;
instructions that make the CPU execute an instruction 10 }

other than the next instruction. The instructions are: 11

– Jump: used for making loop and condition

– Call: used for making function calls

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 Conditional Jump in AVR
SREG: I T H S V N Z C
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• The conditional jump instructions in AVR are as follows:

Instruction Abbreviation of Comment
BREQ lbl Branch if Equal Jump to location lbl if Z = 1,
BRNE lbl Branch if Not Equal Jump if Z = 0, to location lbl
BRCS lbl Branch if Carry Set Jump to location lbl, if C = 1
BRLO lbl Branch if Lower
BRCC lbl Branch if Carry Cleared Jump to location lbl, if C = 0
BRSH lbl Branch if Same or Higher
BRMI lbl Branch if Minus Jump to location lbl, if N = 1
BRPL lbl Branch if Plus Jump if N = 0
BRGE lbl Branch if Greater or Equal Jump if S = 0
BRLTlbl Branch if Less Than Jump if S = 1
BRHS lbl Branch if Half Carry Set If H = 1 then jump to lbl
BRHC lbl Branch if Half Carry Cleared if H = 0 then jump to lbl
BRTS Branch if T flag Set If T = 1 then jump to lbl
BRTC Branch if T flag Cleared If T = 0 then jump to lbl
BRIS Branch if I flag set If I = 1 then jump to lbl
BRIC Branch if I flag cleared If I = 0 then jump to lbl

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 Conditions
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• When b is subtracted from a:

– The result is zero, when a is equal to b
a
– Carry will be set when a < b
-b

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 Example 1
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• Write a program that if R20 is equal to R21 then R22 increases. if (R20 == R21)
No

• Solution:
Yes
SUB R20,R21 ;Z will be set if R20 == R21
BRNE NEXT ;if Not Equal jump to next
INC R22 increment R22

NEXT:

• Write a program that if R26 < R24 then R22 increases.

No
if (R26 < R24)

• Solution: Yes

SUB R26,R24 ; R26 = R24-R26

BRCC L1 ;if Carry cleared jump to L1 increment R22

INC R22
L1:

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 Example 3
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• Write a program that if R26 >= R24 then R22 increases.

No
• Solution:
if (R26 < R24)

SUB R26,R24 ;R26=R24-R26, Z sets if R26==R24 Yes

BRCS L1 ;if Carry set jump to L1

INC R22 increment R22
L1:

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 Example 4: IF and ELSE
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R17 = 5;
if (R20 > R21)
R22++;
else
R22--;
R17 ++;

LDI R17,5
SUB R21,R20
BRCS IF_LABEL
DEC R22
JMP NEXT
IF_LABEL:
INC R22
NEXT:
INC R17

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 Loop
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• Example 1: Write a program that executes the instruction “ADD R30,R31” 9 times.
• Solution:
.ORG 00
LDI R16,9 ;R16 = 9 R16 = 9
L1: ADD R30,R31
DEC R16 ;R16 = R16 - 1
ADD R30,R31
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever
R16 = R16 - 1

Yes
if (R16 > 0)

No

END

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 Loop
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• Example 2: Write a program that calculates the result of 9+8+7+…+1

• Solution: R16 = 9
R17 = 0

.ORG 00
LDI R16, 9 ;R16 = 9 R17 = R17 + R16
LDI R17, 0 ;R17 = 0
L1: ADD R17,R16 ;R17 = R17 + R16
R16 = R16 - 1
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever
Yes
if (R16 > 0)

No

END

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 Loop
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• Example 3: Write a program that calculates the result of 20+19+18+17+…+1

• Solution: R16 = 20
R17 = 0

.ORG 00
LDI R16, 20 ;R16 = 20 R17 = R17 + R16
LDI R17, 0 ;R17 = 0
L1: ADD R17,R16 ;R17 = R17 + R16
R16 = R16 - 1
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever
Yes
if (R16 > 0)

No

END

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 Loop
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for (init; condition; calculation)

init

{
do something Do something

}
calculation

Yes
Condition

No

END

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 Loop
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• Example 4: Write a program that calculates 1+3+5+…+27

• Solution:
R20 = 0
R16 = 1

LDI R20,0
LDI R16,1 R20 = R20 + R16

L1:ADD R20,R16
LDI R17,2 R16 = R16 + 2

ADD R16,R17 ;R16 = R16 + 2

LDI R17,27 ;R17 = 27
Yes
SUB R17,R16 R16 <= 27

BRCC L1 ;if R16 <= 27 jump L1

No

END

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 Branch instructions and Looping(3)
 Example 5: Write a program to clear R20, then add 3 to R20 ten times and send the sum to PORTB. Use the zero
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flag and BRNE.

• .INCLUDE “M32DEF.INC”
» LDI R16, 10
» LDI R20, 0
» LDI R21, 3
• AGAIN: ADD R20, R21
» DEC R16
» BRNE AGAIN
» OUT PORTB, R20

 Because the location R16 is 8-bit register it can hold a maximum of 0xFF(255 decimal), therefore, the loop can be
repeated a maximum of 255 times.
 How we solve this problem?
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 Branch instructions and Looping(4)
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 Loop inside a loop:

 To solve the above problem we use a loop inside an other loop, which is called nested
loop. In a nested loop, we use two registers to hold the count.
 Example:
 Write a program to load the PORTB register with the value 0x55 and complement
PORTB 700 times.
 Solution: Because 700 is larger than 255(the maximum capability of general purpose
register), we use two registers to hold the count. The following code shows how to use
R20 and R21 as a register for counters.

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 Branch instructions and Looping(4)
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 Loop inside a loop(Program)

 In this program, R21 is used to keep the inner
• .INCLUDE “M32DEF.INC”
• .ORG 0 loop count. In the instruction “BRNE LOP2”
» LDI R16, 0x55 when ever R21 becomes 0 it falls through and
» OUT PORTB, R16
» “DEC R20” is executed.
LDI R20, 10
• LOP1: LDI R21, 70  The next instruction force the CPU to load the
• LOP2: COM R16 inner count with 70 if R20 is not zero, and the
» OUT PORTB, R16
» DEC R21 inner loop start again.
» BRNE LOP2  The process continue until R20 becomes zero
» DEC R20
» and the outer loop is finished.
BRNE LOP1
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 Other Conditional Jumps
 BREQ(Branch if equal, Branch if Z=1)
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 In this instruction, the Z flag is checked. If it is high, the CPU jumps to the target address.
 Example:

– OVER: IN R20, PINB

– TST R20

– BREQ OVER
 In this program, if PINB is zero, the CPU jumps to the label OVER. It says in the loop until PINB
has a value other than zero. Notice that the TST instruction can be examine a register and set the
flags according to the contents of the register without performing an arithmetic instruction such
as decrement.
 When the TST instruction executes, if the register contains the zero value, the zero flag is set;
otherwise, it is cleared. It also sets the N flag high if the D7 bit of the register is high, otherwise
N=0.
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 Other Conditional Jumps
 Example 6: write a program to determine if RAM location 0x200 contains the value 0. if so, put 0x55 into it.
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 Solution:  Write a program to add 10 to R24 50 times and

send the sum to PORTB using the BRNE
.EQU MYLOC = 0x200
instruction.
LDS R30, MYLOC LDI R16, 20; counter register
LDI R20, 0
TST R30
LDI R21, 5
BRNE NEXT
LOOP: ADD R20, R21
LDI R30, 0x55 DEC R16; decrement the counter
STS MYLOC, R30 BRNE LOOP; repeat until counter = 0
NEXT: … OUT PORTC, R20

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 Other Conditional Jumps
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 BRSH(branch if same or higher, branch if C= 0)

 In this instruction, the carry flag bit in the status register is used to make the decision
whether to jump. In executing “BRSH label” the processor looks at the carry flag to see if it
is raised (C = 1). It is not, the CPU starts to fetch and execute instructions from the address
of the label.. If C = 1, it will not branch but will execute the next instruction below BRSH.
 The following Program used to add two numbers together when the sum is higher than $FF.
 Write a program to find the sum of the values 0x79, 0xF5 and 0xE2. Put the sum into
R20(lower byte) and R21(higher bytes)

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 Other Conditional Jumps
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 Write a program to find the sum of the values 0x79, 0xF5 and 0xE2. Put the sum into R20(lower

byte) and R21(higher bytes)

.INCLUDE “M32DEF.INC” N_1: LDI R16, 0xF5
.ORG 0 ADD R20, R16
BRSH N_2
LDI R21, 0
INC R21
LDI R21, 0
N_2: LDI R16, 0xE2
LDI R16, 0x79
ADD R20, R16
ADD R20, R16 BRSH OVER
BRSH N_1 INC R21
INC R21 OVER:

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 Unconditional Branch instruction
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 The unconditional branch is a jump in which control is transferred unconditionally to the target location.

 In the AVR there are three unconditional branches. These are JMP(Jump), RJMP(Relative Jump) and

IJMP(indirect Jump).

 Deciding which one to use depends on the target address.

 JMP(JMP is a long Jump)

 In is unconditional jump that can go to any memory location in the 4M(word) address space of the AVR.

 In it a 4-byte(32 bit) instruction in which 10 bits are used for the opcode, and the other 22 bits represent

the 22-bit address of the target location.

 The 22-bit target address allows a jump to 4M of memory locations from 000000 to $3FFFFF.

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 Jump
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• Jump changes the Program Counter (PC) and causes the CPU to execute an instruction
other than the next instruction.
There are 2 kinds of Jump
– Unconditional Jump: When CPU executes an unconditional jump, it jumps
unconditionally (without checking any condition) to the target location.
• Example: RJMP and JMP instructions
– Conditional Jump: When CPU executes a conditional jump, it checks a condition, if the
condition is true then it jumps to the target location; otherwise, it executes the next
instruction.

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 Unconditional Jump in AVR
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• There are 3 unconditional jump instructions in AVR: Code

1 LDI R16, 0
RJMP, JMP, and IJMP 2 LDI R17, 2

• We label the location where we want to jump, using a 3 L1:

L1: ADD R16, R17
4 RJMP L1
L1
unique name, followed by ‘:’ 5 SUB R10,R15

• Then, in front of the jump instruction we mention the name

of the label.
• This causes the CPU to jump to the location we have
labeled, instead of executing the next instruction.

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 JMP(Jump)
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• There are 3 ways to provide the jump address:

– PC = operand
– PC = PC + operand
– PC = Z register

JMP Instruction:
JMP is an unconditional jump instruction. It
is 4 byte in size.
10 bits are used for opcode, and rest 22 bits
target address allows a jump to 4M of
memory location: $000000 to $3FFFFF

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 JMP
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• JMP PC = operand
1001 010X XXXX 110X XXXX XXXX XXXX XXXX XXXX XXXX

– Example:
1001 0100 0000 1100 0000 0000 0000 0110

• Operand = 0000000000000000000110

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 JMP
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Addres Code
• In JMP, the operand, contains the PC: 0007
0002
0001
0000 s
address of the destination 0000 .ORG 0

• When an JMP is executed: 0000 LDI R16, 15

Machine 0001 LDI R17, 5
– PC is loaded with the operand code:
0002 JMP LBL_NAME
value 940C 0006
0006
0004 LDI R18, 4
opCod operan
e d 0005 ADD R18, R17
0006 LBL_NAME:
0006
Machine
0006 ADD R16,R17
code: 0007 JMP LBL_NAME
940C 0006
0006 0009
opCod operan
e d

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 RJMP
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• RJMP (Relative jump)

– It is a 2 byte instruction and jump takes place relative to the current PC address.
– Upper 4 bits are for opcode, rest 12 bits for target address.
– The 12 bits target address allows a relative jump between ---2048 to +2047 or $000 to
$FFF.

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 RJMP (Relative jump)
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• RJMP PC = PC + operand
1100 XXXX XXXX XXXX

– Example: 1100 0000 0000 0110

• Operand = 000000000110
• PC = PC + 000000000110

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 RJMP
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PC: 0003
0007
0006
0001
0000
0002 Addres Code
• When RJMP is executed: +0
+F
s
0000 .ORG 0
0005 0000
– The operand will be added to the Machine 0001
LDI
LDI
R16, 15
R17, 5
code:
current value of PC 002
C002 0002 RJMP LBL_NAME
opCod operan 0003 LDI R18, 4
e d 0004 ADD R18, R17
0005 LBL_NAME:
0005
Machine
0005 ADD R16,R17
code: 0006 RJMP LBL_NAME
FFE
CFFE 0007
opCod operan
e d

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 Machine code Template for JMP
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• JMP K; jump to address K

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 Call Topics
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• Stack, Push and Pop

• Calling a function

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 STACK POINTER REGISTER
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• STACK POINTER
– A section of the RAM which store data or address temporarily since there are
limited number of registers.
– SP must be wide enough address all the RAM
– Conventionally SP is initialized with highest address of the RAM
– In AVR, RAMEND represents the last address of the RAM
– SP decrements when a PUSH takes place
– SP increments when a POP takes place

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 Stack
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• Push instruction store such as program • POP instruction loads the content of the
counter to the stack stack back to the CPU.
• PUSH Rr • POP Rd
[SP] = Rr
SP = SP + 1
SP = SP - 1
Rd = [SP]

S
P

Stac
k

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 Stack
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Addres Code
s
ORG 0
0000 LDI R16,HIGH(RAMEND)
0001 OUT SPH,R16
R20: $10
$00 R22 $30
$00
0002 LDI R16,LOW(RAMEND)
: OUT SPL,R16
R21 $00
$20 R0: $00 0003
: 0004 LDI R20,0x10
0005 LDI R21, 0x20
0006 LDI R22,0x30
0007 PUSH R20
SP 0000 $10
0008 PUSH R21
$20
0009 PUSH R22
$30
POP R21
000A
000B POP R0
000C POP R20
000D L1: RJMP L1

Memor
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 Usage of SP – An Example
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 CALL
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• CALL Instruction:
– 4 bytes instruction
– Uses 10 bits for opcode, 22 bits for target address
– Saves the address of the immediate instruction next to CALL in the stack.

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 Calling a Function
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• To execute a call:
– Address of the next instruction is saved
– PC is loaded with the appropriate value Addres
s
Code
0000 LDI R16,HIGH(RAMEND)
0001 OUT SPH,R16
0002 LDI R16,LOW(RAMEND)
0003 OUT SPL,R16
0004 LDI R20,15

Machine 0005 LDI R21,5

code: 0006 CALL FUNC_NAME
940E 000A
000A 0006
0008 INC R20
opCod operan 00 08
e d 0009 L1: RJMP L1
000A FUNC_NAME:
000A ADD R20,R21
000B SUBI R20,3
S 000C RET
P PC: 000C
000B
0006
0005
0004
0009
0008
000D

Stac
k
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 RET
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• RET Instruction:

– RET is the instruction at the end of a subroutine.

– When executed, the top of the stack is copied back to the PC and SP is
incremented.

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 Time delay
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• Delay Calculation for AVR :

In Assembly Language instructions, to create a time delay one must consider two
important factors.
– The crystal frequency
– The frequency of the crystal oscillator connected to XTAL1 and XTAL2 is one
factor for calculating the time delay. The duration of the clock period for the
instruction cycle is a function of this crystal frequency.
– The AVR design
– AVR microprocessors are able to execute an instruction in one cycle. There are
three ways of doing this.
1) Harvard architecture to get the max. code and data in to the CPU.
2) RISC architecture feature such as fixed instruction size
3) Pipelining to overlap fetch and execute
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 Time delay …
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• AVR microprocessors are able to execute an instruction in one cycle. There are three
ways of doing this.
– Use Harvard architecture to get the maximum amount of code and data into the
CPU.
– Use RISC architecture features such as fixed-size instructions.
– Use pipelining to overlap fetching and execution of instructions.
• Pipelining :
– In the early microprocessors, the CPU could either fetch or execute at a given time.
In other words, the CPU had to fetch an instruction from the memory, then execute
it then again fetch the next instruction, execute it, and so on.
– Pipelining allows the CPU to fetch and execute the given instruction at the same
time.

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 Time delay …
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• We can use the pipeline to speed up execution of instructions. In pipelines, the process
of execution is split up into smaller steps that are all executed in parallel. In the
execution of instructions, we must make sure that the sequence of instructions is kept
intact and that there is no different execution.

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 Instruction cycle time for the AVR
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• It takes a certain amount of time for the CPU to execute an instruction. This time is
referred to as machine cycles.
• All the instructions in the AVR are either 2-byte or 4-byte and hence most of the
instructions take no more than 2 machine cycles to execute (some instructions may
take up 3 to 4 machine cycles to execute like JMP CALL, RET).
• In the AVR family, the duration of the machine cycle depends upon the frequency of
the oscillator connected to the AVR system.
• In the AVR, one machine cycle consists of one oscillator period, which means that
with each oscillator clock, one machine cycle passes.
• Therefore, to calculate the machine cycle for the AVR, we take the inverse of the
crystal frequency.

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 Instruction cycle time for the AVR …
• Instruction cycles required by different instructions (considering 1 MHz as the crystal frequency) :
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Instruction Instruction cycles Time to execute

LDI 1 1 us

DEC 1 1 us

OUT 1 1 us

ADD 1 1 us

NOP 1 1 us

JMP 3 3 us

CALL 4 4 us

BRNE 2/1 2 us if taken, 1 us if it fails

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 Instruction cycle time for the AVR …
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• Example-1 :
• For the given crystal frequencies, calculate the period of the instruction cycles.
a) 8 MHz
b) 16 MHz
• Solution :
a) instruction cycle = 1/ 8 MHz = 0.125 us (microsecond)
b) instruction cycle = 1/ 16 MHz = 0.0625 us

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 Instruction cycle time for the AVR …
• Example-2 :
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• Find the delay in us of the code snippet below if the crystal frequency is 10 MHz
Instruction Cycles
DELAY : LDI COUNT, 0XFF 0
Again : NOP 1
NOP 1
NOP 1
DEC COUNT 1
BRNE AGAIN 2/1
RET 4

Solution : Time Delay = [1 +(( 1+ 1+ 1+ 1 + 2 ) x 255) + 4 ] x 0.1 us = 153.5 us

Note: Conditional Branch instruction such as BRNE, BRLO, can take only one
machine cycle if it does not jump.

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 Branch Penalty
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 Time delay
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machine cycle
LDI R16, 19 1
LDI R20, 95 1
LDI R21, 5 1
ADD R16, R20 1
ADD R16, R21 1
5

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 Time delay
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machine cycle
LDI R16, 100
1
AGAIN: ADD R17,R16 *100
1
DEC R16 *100
1
BRNE AGAIN *100
1/2

Branch penalty

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 Time delay
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machine cycle
LDI R17, 20
1
L1: LDI R16, 50
1 *20
L2: NOP
1 *20 * 50
NOP *20 * 50
1
DEC R16 *20 * 50
1
BRNE L2 *20 * 50
1/2
DEC R17 *20
1
BRNE L1 *20
1/2

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 Time Delay calculations- Example
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• Delay loop

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 I/O Ports Programming in AVR
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• Objectives
– List all ports of AVR microcontroller.
– Describe the dual role of AVR PINs
– Code assembly language to use the ports as input and output.
– Explain the dual role of ports A, B, C and D.
– Code AVR instructions for I/O handling.
– Code I/O bit manipulation programs for the AVRs

AVR Microcontroller and Embedded System Using Assembly and C

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 I/O Ports Programming in AVR
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• In the AVR family, there are many ports for I/O operations, depending on the family member. In case of
Atmega32, in is 40-pin chip. A total of 32 pins are set aside for the four ports A, B, C and D.
• The rest of the pins are designed as VCC, GND, XTAL1, XTAL2, RESET, AREF, AGND and AVCC.
Mega32/Mega16
(XCK/T0) PB0 0 00 00 0 PA0 (ADC0)
(T1) PB1 1 11 11 1 PA1 (ADC1)
(INT2/AIN0) PB2 2 22 22 2 PA2 (ADC2)
(OC0/AIN1) PB3 3 33 33 3 PA3 (ADC3)
(SS) PB4 4 44 44 4 PA4 (ADC4)
(MOSI) PB5 DDRx: 5
7 5 65 5 4 3 5 25 51 0
PA5 (ADC5)
(MISO) PB6 PORTx: 6
7 6 66 5 4 3 6 26 61 0
PA6 (ADC6)
(SCK) PB7 PINx: 7
7 7 67 5 4 3 7 27 71 0
PA7 (ADC7)
DDRA

DDRB
PINB
PORTB
RESET PORTA AREF
PINA
Px7 Px6 Px5 Px4 Px3 Px2 Px1 Px0
VCC AGND
GND AVCC
XTAL2 PC7 (TOSC2)
XTAL1 PC6 (TOSC1)
(RXD) PD0 PC5 (TDI)

DDRx
(TXD) PD1 PC4 (TDO) 0 1
PORTx
(INT0) PD2 PC3 (TMS)
0 high impedance Out 0
(INT1) PD3 PC2 (TCK)
(OC1B) PD4 PC1 1 (SDA)pull-up Out 1
(OC1A) PD5 PC0 (SCL)
(ICP) PD6 PD7 (OC2)

AVR Microcontroller and Embedded System Using Assembly and C

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 I/O Ports PINs and their Functions
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• Each port has three I/O registers associated with it. They are designed as
– PINx (Port Input x),
– DDRx (Data Direction Register x) and
– PORTx. Where x represents ports A, B, C and D.
• Each of the I/O registers 8-bits wide. And each port has a maximum of 8-pins.
Therefore, each bit of the I/O registers affect one of the pins. For example the content
of bit 0 of DDRB represent the direction of the PB0 pin.
• DDRx role in outputting data
– Each of the ports A-D in the Atmega32 can be used for input or output.
– DDRx I/O register used solely for the purpose of making a given port an input or
output port.
– For example to make a port an output, we write 1s to the DDRx register.

AVR Microcontroller and Embedded System Using Assembly and C

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 I/O Ports PINs and their Functions
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• Example: Write a program that makes all the pins of PORTA one.
.INCLUDE “M32DEF.INC”
LDI R16,0xFF ;R16 = 11111111 (binary)
OUT DDRA,R20 ;DDRA = R16
L1: LDI R16, 0x55
OUT PORTA,R20 ;PORTA = R16
CALL DELAY
LDI R16, 0xAA
OUT PORTA, R16 ;PORTA = R16
CALL DELAY
RJMP L1

AVR Microcontroller and Embedded System Using Assembly and C

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 I/O Ports PINs and their Functions
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• DDRx Role in inputting Data

• To make a port an input port, we must first put 0s in to DDRx register for that port. And then bring
in(read) the data present at the pins.
• When all ports have the value 0x00 in their DDR register, this means that all ports are configured as
input
0 1

AVR Microcontroller and Embedded System Using Assembly and C

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 I/O Ports PINs and their Functions
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• PIN Register Role in inputting Data

– To read the data present at the pins, we should read the PIN register. It must be noticed that to bring
data in to the CPU from pins we read the content of the PINx register. Where as to send data from
out to the pins we use the PORTx Register.
• PORT Register Role in inputting Data
• There is a pull-up resistors for each of the AVR pins. If we out 1s in to bits of the PORTx register, the
pull-up resistor activated. In cases in which nothing is connected to the pin or the connected device has
high impedance the resistors pull-up the pins.
• If we out 0s in to bits of the PORTx register, the pull-up resistor inactive.

AVR Microcontroller and Embedded System Using Assembly and C

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 I/O Ports PINs and their Functions
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• PORT Register Role in inputting Data …

DDRx.0 = 0
PORTx.= 1

AVR Microcontroller and Embedded System Using Assembly and C

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 I/O Ports PINs and their Functions
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• Example 2
• The following code will toggle all 8 bits of Port B forever with some time delay
between “on” and “off” states:
LDI R16,0xFF ;R16 = 0xFF = 0b11111111
OUT DDRB,R16 ;make Port B an output port (1111 1111)
L1: LDI R16,0x55 ;R16 = 0x55 = 0b01010101
OUT PORTB,R16 ;put 0x55 on port B pins
LDI R16,0xAA ;R16 = 0xAA = 0b10101010
OUT PORTB,R16 ;put 0xAA on port B pins
RJMP L1

AVR Microcontroller and Embedded System Using Assembly and C

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 Example 3
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• A 7-segment is connected to PORTA. Display 1 on the 7-segment.

DDRC: 1 1 1 1 1 1 1 1
PORTC: 0 0 0 0 0 1 1 0

ATmega32 0
5 1
.INCLUDE “M32DEF.INC” 8 6
PORTC
LDI R20,0x06 ;R20 = 00000110 (binary) 2
4
OUT PORTC,R20 ;PORTC = R20
LDI R20,0xFF ;R20 = 11111111 (binary) 3

DDRx
OUT DDRC,R20 ;DDRC = R20 0 1
PORTx
L1: RJMP L1
0 high impedance Out 0

1 pull-up Out 1

AVR Microcontroller and Embedded System Using Assembly and C

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 Example 4
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• A 7-segment is connected to PORTA. Display 3 on the 7-segment.

DDR: 1 1 1 1 1 1 1 1
PORTC: 0 1 0 0 1 1 1 1

ATmega32 0
5 1
.INCLUDE “M32DEF.INC” 8 6
PORTC
LDI R20,0x4F ;R20 = 01001111 (binary) 2
4
OUT PORTC,R20 ;PORTC = R20
LDI R20,0xFF ;R20 = 11111111 (binary) 3

OUT DDRC,R20 ;DDRC = R20

DDRx
0 1
L1: RJMP L1 PORTx

0 high impedance Out 0

1 pull-up Out 1

AVR Microcontroller and Embedded System Using Assembly and C

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 Example 5: Input
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• The following code gets the data present at the pins of port C and sends it to port B indefinitely, after
adding the value 5 to it:

.INCLUDE "M32DEF.INC"
LDI R16,0x00 ;R16 = 00000000 (binary)
OUT DDRC,R16 ;make Port C an input port
LDI R16,0xFF ;R16 = 11111111 (binary)
OUT DDRB,R16 ;make Port B an output port(1 for Out)
L2: IN R16,PINC ;read data from Port C and put in R16
LDI R17,5
ADD R16,R17 ;add 5 to it
OUT PORTB,R16 ;send it to Port B
RJMP L2 ;continue forever

AVR Microcontroller and Embedded System Using Assembly and C

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 Example 6
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• Write a program that continuously sends out to Port C the alternating values of 0x55
and 0xAA.

.INCLUDE "M32DEF.INC"
LDI R16,0xFF ;R16 = 11111111 (binary)
OUT DDRC,R16 ;make Port C an output port
L1: LDI R16,0x55 ;R16 = 0x55
OUT PORTC,R16 ;put 0x55 on Port C pins
LDI R16,0xAA ;R16 = 0xAA
OUT PORTC,R16 ;put 0xAA on Port C pins
RJMP L1

AVR Microcontroller and Embedded System Using Assembly and C

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 Example 7
40 PIN DIP BIHE university

• Write a program that reads from port A and (XCK/T0)

(T1)
PB0
PB1
1
2
40
39
PA0
PA1
(ADC0)
(ADC1)
(INT2/AIN0) PB2 3 38 PA2 (ADC2)

writes it to port B. (OC0/AIN1)

(SS)
PB3
PB4
4
5
MEGA32 37
36
PA3
PA4
(ADC3)
(ADC4)
(MOSI) PB5 6 35 PA5 (ADC5)
(MISO) PB6 7 34 PA6 (ADC6)
(SCK) PB7 8 33 PA7 (ADC7)
RESET 9 32 AREF
VCC 10 31 AGND
.INCLUDE “M32DEF.INC” GND 11 30 AVCC
XTAL2 12 29 PC7 (TOSC2)
LDI R20,0x0 ;R20 = 00000000 (binary)
XTAL1 13 28 PC6 (TOSC1)
OUT DDRA,R20 ;DDRA = R20 (RXD) PD0 14 27 PC5 (TDI)
(TXD) PD1 15 26 PC4 (TDO)
LDI R20,0xFF ;R20 = 11111111 (binary) (INT0) PD2 16 25 PC3 (TMS)
(INT1) PD3 17 24 PC2 (TCK)
OUT DDRB,R20 ;DDRB = R20 (OC1B) PD4 18 23 PC1 (SDA)
(OC1A) PD5 19 22 PC0 (SCL)
L1: IN R20,PINA ;R20 = PINA (ICP) PD6 20 21 PD7 (OC2)

OUT PORTB,R20 ;PORTB = R20

RJMP L1

DDRx
0 1
PORTx

0 high impedance Out 0

1 pull-up Out 1

AVR Microcontroller and Embedded System Using Assembly and C

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 Arithmetic and Logic instructions and Programs
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REDING Assignment

AVR Microcontroller and Embedded System Using Assembly and C

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