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Data Types Presentation

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0% found this document useful (0 votes)
13 views31 pages

Data Types Presentation

Uploaded by

Sowmya Bhat ECE
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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SystemVerilog Data Types

Introduction to Data Types


• SystemVerilog provides a rich set of data types
for hardware modeling and verification. These
data types improve expressiveness and
efficiency.
Built-in Data Types
• logic: A 4-state data type (0, 1, X, Z)
• bit: A 2-state data type (0, 1)
• byte, int, shortint, longint: Integer types with
varying widths
• real: A floating-point data type
Fixed-size Arrays
• Fixed-size arrays have predefined bounds.
• Example:
• logic [7:0] array1 [0:15]; // Packed array
• int array2 [10]; // Unpacked array
Dynamic Arrays
• Dynamic arrays allow flexible resizing during
runtime.
• Example:
• int dynamicArray[];
• dynamicArray = new[10];
Queues
• Queues are variable-size, ordered collections
of elements.
• Example:
• int queue[$];
• queue.push_back(5); // Add element to the
end
• queue.pop_front(); // Remove element from
the front
Associative Arrays
• Associative arrays allow indexing with non-
integer keys.
• Example:
• int assocArray[string];
• assocArray["key"] = 42;
Array Methods
• SystemVerilog provides methods for array
manipulation:
• - Reduction: array.sum(), array.min(),
array.max()
• - Locator: array.find(), array.unique()
• - Sorting: array.sort()
Structures and Unions
• Structures group related variables of different
types.
• Unions overlay multiple variables in the same
memory.
• Example:
• typedef struct {
• int id;
• string name;
• } Student;
Enumerated Types
• Enumerated types define a set of named
values.
• Example:
• typedef enum {RED, GREEN, BLUE} Color;
• Color currentColor = GREEN;
Packages and Typedef
• Packages allow modularity and reuse of
definitions.
• Typedef simplifies type declarations.
• Example:
• typedef logic [7:0] byte_t;
Array Methods

• Array methods in SystemVerilog provide


powerful tools for manipulating arrays. These
methods can be applied to any unpacked array
types, including fixed-size, dynamic, queue,
and associative arrays. Here are the key array
methods, along with detailed explanations
and examples:
1. Reduction Methods
• Reduction methods perform operations that reduce an
array to a single value. Common reduction methods include
sum, product, and logical operations like and, or, and xor.
• Example: Sum of an Array
• int array[5] = '{1, 2, 3, 4, 5};
• int total = array.sum();
• $display("Sum of array: %0d", total); // Output: Sum of
array: 15
• Example: Logical AND of an Array
• bit [3:0] bits = 4'b1101;
• bit result = bits.and();
• $display("Logical AND of bits: %b", result); // Output:
Logical AND of bits: 0
2. Locator Methods

• Locator methods help find specific elements


within an array. These methods include min,
max, unique, find, find_index, and more.
• Example: Finding the Minimum Value
• int array[5] = '{10, 20, 5, 30, 15};
• int min_value = array.min();
• $display("Minimum value: %0d", min_value);
// Output: Minimum value: 5
• Example: Finding Unique Values
• int array[5] = '{1, 2, 2, 3, 3};
• int unique_values[] = array.unique();
• foreach (unique_values[i]) begin
• $display("Unique value: %0d", unique_values[i]);
• end
• // Output: Unique value: 1
• // Unique value: 2
• // Unique value: 3
• Example: Finding an Element
• int array[5] = '{10, 20, 30, 40, 50};
• int index = array.find_index(x) with (x == 30);
• $display("Index of 30: %0d", index); //
Output: Index of 30: 2
3. Sorting and Ordering Methods
• These methods allow you to sort the elements of an array,
reverse their order, or shuffle them randomly.
• Example: Sorting an Array
• int array[5] = '{30, 10, 50, 20, 40};
• array.sort();
• foreach (array[i]) begin
• $display("Sorted array[%0d]: %0d", i, array[i]);
• end
• // Output: Sorted array[0]: 10
• // Sorted array[1]: 20
• // Sorted array[2]: 30
• // Sorted array[3]: 40
• // Sorted array[4]: 50
• Example: Reversing an Array
• int array[5] = '{10, 20, 30, 40, 50};
• array.reverse();
• foreach (array[i]) begin
• $display("Reversed array[%0d]: %0d", i, array[i]);
• end
• // Output: Reversed array[0]: 50
• // Reversed array[1]: 40
• // Reversed array[2]: 30
• // Reversed array[3]: 20
• // Reversed array[4]: 10
• Example: Shuffling an Array
• int array[5] = '{10, 20, 30, 40, 50};
• array.shuffle();
• foreach (array[i]) begin
• $display("Shuffled array[%0d]: %0d", i, array[i]);
• end
• // Output: Shuffled array[0]: 30
• // Shuffled array[1]: 10
• // Shuffled array[2]: 50
• // Shuffled array[3]: 20
• // Shuffled array[4]: 40
User defined Data types
• Creating New Types: SystemVerilog allows you
to create new types using the typedef
statement. This is useful for creating more
readable and maintainable code.
Example:
typedef logic [31:0] uint_t;
uint_t my_var;
• Defining Array Types: You can define new
array types using typedef.
Example:
typedef logic [7:0] byte_array_t[5];
byte_array_t my_array = '{8'h01, 8'h23, 8'h45,
8'h67, 8'h89};
• Associative Arrays: Associative arrays can be
declared with a user-defined index type.
Example:
typedef int unsigned addr_t;
typedef logic [31:0] mem_t[addr_t];
mem_t memory;
• Creating User-Defined Structures
• Structures: SystemVerilog allows you to create
structures using the struct statement, similar to C.
– Example:
typedef struct {
logic [7:0] red;
logic [7:0] green;
logic [7:0] blue;
} pixel_t;
pixel_t pixel;
• Initializing Structures: Structures can be
initialized using an array literal.
– Example:
pixel_t pixel = '{8'hFF, 8'h00, 8'h00}; // Red color
• Packed Structures: Packed structures are
stored as contiguous bits without any padding.
– Example:
typedef struct packed { logic [7:0] red; logic [7:0]
green; logic [7:0] blue; }
packed_pixel_t;
packed_pixel_t packed_pixel;
• Unions
• Unions: Unions allow multiple views of the
same data.
– Example:
typedef union { logic [31:0] int_view; logic [7:0]
byte_view[4]; }
data_u;
data_u data;
• Enumerated Types: Enumerated types allow you
to create a set of named constants.
– Example:
typedef enum logic [1:0] {
IDLE = 2'b00,
READ = 2'b01,
WRITE = 2'b10
} state_t;
state_t state;
• Enumerated Values: You can specify the
values of enumerated constants.
– Example
typedef enum logic [2:0] { INIT = 3'b000, RUN =
3'b001, STOP = 3'b010 } mode_t;
mode_t mode;
• Type Conversion
Static Cast: Converts between types without checking values.
– Example:
int a = 32;
logic [31:0] b;
b = int'(a);
Dynamic Cast: Checks for out-of-bounds values during
conversion.
– Example:
state_t s;
int i = 2;
if (!$cast(s, i))
begin
$display("Invalid cast");
end
• Streaming Operators: Used to pack and
unpack data.
Example:
logic [31:0] data;
byte_array_t bytes;
{<<{bytes}} = data; // Pack data into bytes

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