15ECE304 Microprocessor and

Microcontroller
Lecture-8A: ARM Assembly Language Programming
by
Dr. Ramesh Chinthala
Amrita Vishwa Vidyapeetham, Bengaluru
ARM – Assembly Language
Programming
• The ARM processor is very easy to program at the assembly level,
• though for most applications it is more appropriate to program in a high-level language such as C or
C++
• 8085 instruction opcode is 8-bit long and it can support 246 different binary instruction types
• ARM instruction is 32-bit long, and it can support ______________ different binary instruction types
• The assembler converts the assembly language instruction to machine language instruction, you don’t
need to remember all
• But, need to know a instruction formats
• We will see ARM assembly language programming at user level
• We will learn how to write simple ARM programs
• ARM emulator runs programming
• ARM development board runs programming
ARM – Assembly Language
Programming
• The ARM processor is very easy to program at the assembly level,
• though for most applications it is more appropriate to program in a high-level language such as C or
C++
• 8085 instruction opcode is 8-bit long and it can support 246 different binary instruction types
• ARM instruction is 32-bit long, and it can support ______232______ different binary instruction types
• The assembler converts the assembly language instruction to machine language instruction, you don’t
need to remember all
• But, need to know a instruction formats
• We will see ARM assembly language programming at user level
• We will learn how to write simple ARM programs
• ARM emulator runs programming
• ARM development board runs programming
ARM – Assembly Language
Programming
• Data processing instructions
• Data Transfer instructions
• Control Flow instructions
ARM – Assembly Language
Programming
• Data processing instructions
• Data Transfer instructions
• Control Flow instructions
ARM – Data processing instructions
• Below are rules for which apply to ARM data processing instructions
• All operands are 32-bit wide and come from registers or are specified
as literals (constant) in instruction itself
• ADD R1, R2, R3; valid instruction?
• ADD R1, R2, #04; valid instruction?
• The result is 32-bit wide and is placed in a register
• MUL R2, R1, R0; is result 32-bit wide?
• Each of the operand registers and the result register are
independently specified in the register
ARM – Data processing instructions
• Below are rules for which apply to ARM data processing instructions
• All operands are 32-bit wide and come from registers or are specified
as literals (constant) in instruction itself
• ADD R1, R2, R3; valid instruction? yes
• ADD R1, R2, #04; valid instruction?
• The result is 32-bit wide and is placed in a register
• MUL R2, R1, R0; is result 32-bit wide?
• Each of the operand registers and the result register are
independently specified in the register
ARM – Data processing instructions
• Below are rules for which apply to ARM data processing instructions
• All operands are 32-bit wide and come from registers or are specified
as literals (constant) in instruction itself
• ADD R1, R2, R3; valid instruction? yes
• ADD R1, R2, #04; valid instruction? Yes, 2nd operand is immediate val
• The result is 32-bit wide and is placed in a register
• MUL R2, R1, R0; is result 32-bit wide?
• Each of the operand registers and the result register are
independently specified in the register
ARM – Data processing instructions
• Operands Types: Simple Operand registers
• Arithmetic operations
• ADD R0, R1, R2; R0 := R1 + R2
• ADC R0, R1, R2; R0 := R1 + R2 + ?
• SUB R0, R1, R2; R0 := R1 - R2
• SBC R0, R1, R2; R0 := R1 - R2 + ?
• RSB R0, R1, R2; R0 := R2 – R1
• RSC R0, R1, R2; R0 := R2 – R1 + ?
ARM – Data processing instructions
• Operands Types: Simple Operand registers
• Arithmetic operations
• ADD R0, R1, R2; R0 := R1 + R2
• ADC R0, R1, R2; R0 := R1 + R2 + Carry Flag value
• SUB R0, R1, R2; R0 := R1 - R2
• SBC R0, R1, R2; R0 := R1 - R2 + ?
• RSB R0, R1, R2; R0 := R2 – R1
• RSC R0, R1, R2; R0 := R2 – R1 + ?
ARM – Data processing instructions
• Operands Types: Simple Operand registers
• Arithmetic operations
• ADD R0, R1, R2; R0 := R1 + R2
• ADC R0, R1, R2; R0 := R1 + R2 + Carry Flag value
• SUB R0, R1, R2; R0 := R1 - R2
• SBC R0, R1, R2; R0 := R1 - R2 + ( (C-1) or Cbar )
• RSB R0, R1, R2; R0 := R2 – R1
• RSC R0, R1, R2; R0 := R2 – R1 + ?
ARM – Data processing instructions
• Operands Types: Simple Operand registers
• Arithmetic operations
• ADD R0, R1, R2; R0 := R1 + R2
• ADC R0, R1, R2; R0 := R1 + R2 + Carry Flag value
• SUB R0, R1, R2; R0 := R1 - R2
• SBC R0, R1, R2; R0 := R1 - R2 + ( (C-1) or Cbar )
• RSB R0, R1, R2; R0 := R2 – R1
• RSC R0, R1, R2; R0 := R2 – R1 + ( (C-1) or Cbar )
ARM – Data processing instructions
• Operands Types: Simple Operand registers
• Bit-wise logical operations
• AND R0, R1, R2; R0 := R1 and R2
• ORR R0, R1, R2; R0 := R1 or R2
• EOR R0, R1, R2; R0 := R1 xor R2
• BIC R0, R1, R2; R0 := R1 and (not R2)
• In BIC – bit clear instruction every one in the second operand clear
the corresponding bit in the first operand
ARM – Data processing instructions
• Operands Types: Simple Operand registers
• Register movement operations
• MOV R0, R2; R0 := R2
• MNV R0, R2; R0 := not R2, 1’s complement of R2 into R0
ARM – Data processing instructions
• Operands Types: Simple Operand registers
• Comparison operations
• CMP R1, R2; set cc on R1- R2
• CMN R1, R2; set cc on R1 + R2
• TST R1, R2; set cc on R1 and R2
• TEQ R1, R2; sett cc on R1 xor R2
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01, #01 means decimal value
• ADC R8, R7, #&FF; R8 = R7 + ?,
• Can we use a 32-bit immediate value?
• Valid Immediate = ?
•?
•?
•?
•?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01, #01 means decimal value
• ADC R8, R7, #&FF; R8 = R7 + ?, #&FF means hexa-decimal value
• Can we use a 32-bit immediate value?
• Valid Immediate = ?
•?
•?
•?
•?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01, #01 means decimal value
• ADC R8, R7, #&FF; R8 = R7 + 255, #&FF means hexa-decimal value
• Can we use a 32-bit immediate value?
• Valid Immediate = ?
•?
•?
•?
•?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01
• ADC R8, R7, #&FF; R8 = R7 + ?
• Can we use a 32-bit immediate value:No, only 8-bit or shifted value of 8-
bit
• Valid Immediate = ?
•?
• ?
•?
• ?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01
• ADC R8, R7, #&FF; R8 = R7 + ?
• Can we use a 32-bit immediate value:No, only 8-bit or shifted value of 8-
bit
• Valid Immediate = (0-255)x22n, where n = 0 to 12
• 0000-0001-0000-0001 not a valid,
• ?
• 0000-0001-0000-0010
• ?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01
• ADC R8, R7, #&FF; R8 = R7 + ?
• Can we use a 32-bit immediate value:No, only 8-bit or shifted value of 8-
bit
• Valid Immediate = (0-255)x22n
• 0000-0001-0000-0001 not a valid,
• ?
• 0000-0001-0000-0010 a valid,
• ?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01
• ADC R8, R7, #&FF; R8 = R7 + ?
• Can we use a 32-bit immediate value:No, only 8-bit or shifted value of 8-
bit
• Valid Immediate = (0-255)x22n
• 0000-0001-0000-0001 not a valid, because LSB-bit-1 to MSB-bit-1, 9-bits
• ?
• 0000-0001-0000-0010 a valid, because LSB-bit-1 to MSB-bit-1, 8-bits,
• ?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01
• ADC R8, R7, #&FF; R8 = R7 + ?
• Can we use a 32-bit immediate value:No, only 8-bit or shifted value of 8-
bit
• Valid Immediate = (0-255)x22n
• 0000-0001-0000-0001 not a valid, because LSB-bit-1 to MSB-bit-1, 9-bits
• where LSB-bit-0 is not taken care by left shift
• 0000-0001-0000-0010 a valid, because LSB-bit-1 to MSB-bit-1, 8-bits,
• ?
ARM – Data processing instructions
• Operands Types: Immediate Operands
• ADD R3, R3, #01; R3 := R3 + 01
• ADC R8, R7, #&FF; R8 = R7 + ?
• Can we use a 32-bit immediate value:No, only 8-bit or shifted value of 8-
bit
• Valid Immediate = (0-255)x22n
• 0000-0001-0000-0001 not a valid, because LSB-bit-1 to MSB-bit-1, 9-bits
• where LSB-bit-0 is not taken care by left shift
• 0000-0001-0000-0011 not valid, because LSB-bit-1 to MSB-bit-1, 9-bits,
• where LSB-bit-0 is taken care by left shift
Valid Immediate values
• Y = 0000-0001-0000-0010 is valid, bcoz 9-bit is shifted version of some 8-bit pattern
• X = 0000-0000-1000-0001
• Y = 0000-0001-0000-0010 = left shift X by 1-bit, where X is a 8-bit pattern (only)

• Y = 0000-0011-0100-0100 is valid, bcoz 10-bit is shifted version of some 8-bit pattern

• X = 0000-0000-1101-0001
• Y = 0000-0011-0100-0100 = left shift X by 2-bits, where X is a 8-bit pattern (only)
Thank You
Setting the condition codes
• Any data processing instruction can set the cc (N, Z, C, and V)
• ADD, will set cc?
Setting the condition codes
• Any data processing instruction can set the cc (N, Z, C, and V)
• ADD, will set cc? NO
Setting the condition codes
• Any data processing instruction can set the cc (N, Z, C, and V)
• ADD, will set cc? NO
• ADDS, will set cc?
Setting the condition codes
• Any data processing instruction can set the cc (N, Z, C, and V)
• ADD, will set cc? NO
• ADDS, will set cc? YES
Setting the condition codes
• Any data processing instruction can set the cc (N, Z, C, and V)
• ADD, will set cc? NO
• ADDS, will set cc? YES
• The comparison operations by default set the condition codes (cc), no
need to specify the opcode extension {S}
• ADD{S}
Setting the condition codes
• Any data processing instruction can set the cc (N, Z, C, and V)
• ADD, will set cc? NO
• ADDS, will set cc? YES
• The comparison operations by default set the condition codes (cc), no
need to specify the opcode extension {S}
• Logical or Move operations set only N, and Z
• Logical or Move operations doesn’t produce meaningful values for C
or V,
Use of conditional codes
• Control flow
• BNZ LABEL
• Conditional branch instruction uses condition codes
Use of conditional codes
• Control flow
• BNZ LABEL; branch if Z = 0 to the LABELed instruction
• Conditional branch instruction uses condition codes
Multiply Instrution
• MUL R4, R3, R2; R4 := (R3 x R2)
Multiply Instrution
• MUL R4, R3, R2; R4 := (R3 x R2)[31:0]
Multiply Instrution
• MUL R4, R3, R2; R4 := (R3 x R2)[31:0]
• Special Constraints on MUL instruction
• Immediate second operands are supported
Multiply Instrution
• MUL R4, R3, R2; R4 := (R3 x R2)[31:0]
• Special Constraints on MUL instruction
• Immediate second operands are supported
• The Rd, Rs1 shouldn’t be same
• The MULS, then ‘V’ flag is preserved and ‘C’ flag is rendered
meaningless
Multiply Instrution
• MUL R4, R3, R2; R4 := (R3 x R2)[31:0]
• Special Constraints on MUL instruction
• Immediate second operands are supported
• The Rd, Rs1 shouldn’t be same
• The MULS, then ‘V’ flag is preserved and ‘C’ flag is rendered
meaningless. Why ?
Thank You