Functions of Combinational Logic

1
 Basic Adders
Half-Adder - The half-adder accepts two binary
digits on its inputs and produces
two binary digits on its outputs.
Sum bit and Carry bit are outputs.
Full-Adder - Full-adder accepts two input bits
and an input carry bit and generates
a sum output and an output carry bit.

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 Half-Adder
Simple Binary Addition
0+0=0 Zero plus zero equals zero
0+1=1 Zero plus one equals one
1+0=1 One plus zero equals one
1 + 1 = 10 One plus one equals zero with a carry
of one

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Half-Adder

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Full-Adder – Extra Input

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Full-adder logic.

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 Full-Adder
• Full adder from two half-adder circuits

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 Determine the outputs for the inputs shown.

Inputs are A = 1, B = 0, and Cin = 0. Inputs are A = 1, B = 0, and Cin = 1.

Outputs are Σ = 1 and Cout = 0. Outputs are Σ = 0 and Cout = 1.

Inputs are A = 1, B = 1, and Cin = 0.

Outputs are Σ = 0 and Cout = 1.

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 Parallel Binary Adders
To add binary numbers with more than one bit,
you must use additional full-adders.
Carry bit from right column

1
11
+ 0 1
1 0 0

Carry bit from second column becomes a sum bit. 9

 Parallel Binary Adders
• Two-bit parallel binary adder using two full-adders.

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 Parallel Binary Adders
• Find the sum generated by the 3-bit parallel adder. Show the intermediate
carries when the binary numbers 101 (A) and 011 (B) are added.
1 0 0 1 1 1

1 1
4

1 0 0 0

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 Parallel Binary Adders
• Four-bit parallel binary adder

Group of four bits is called a nibble.

Two nibbles is one byte. 12
• Use 4-bit parallel adder truth table to find the sum and
output carry for the addition of the following two 4-bit
numbers. The input carry (Cn-1) is 0.
A4A3A2A1 = 1100 and B4B3B2B1 = 1100

For n = 1: A1 = 0, B1 = 0, and Cn-1 = 0.

From 1st row of table: Σ1 = 0 and C1 = 0.
Cn-1 Cn For n = 2: A2 = 0, B2 = 0, and Cn-1 = 0.
From 1st row of table: Σ2 = 0 and C2 = 0.
For n = 3: A3 = 1, B3 = 1, and Cn-1 = 0.
From 4th row of table: Σ3 = 0 and C3 = 1.
For n = 4: A4 = 1, B4 = 1, and Cn-1 = 1.
From last row of table: Σ4 = 1 and C4 = 1.
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Result is 11000.
Four-bit parallel adder.

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Propagation delay characteristics for the 74LS283.

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Figure Examples of adder expansion.

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Figure
Two 74LS283 adders connected as an 8-bit parallel adder (pin numbers are in parentheses).

The following two 8-bit numbers are added.

A8A7A6A5A4A3A2A1 = 10111001 and B8B7B6B5B4B3B2B1 = 10011110

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Figure A voting system using full-adders and parallel binary adders.

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Figure A 4-bit parallel ripple carry adder showing “worst-case” carry propagation delays.

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• Ripple Carry Adder suffers from propagation
delay
• Look-Ahead Carry Adder
– Tries to anticipate the output carry of each stage
– Carry Generation occurs when both inputs are 1
• Cg = AB
– Carry Propagation occurs when input is rippled
to the output carry
• Cp = A + B
– Output Carry is a 1 if Cg = 1 or (Cp = 1 AND Cin = 1)
• Cout = Cg + CpCin

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Figure Illustration of conditions for carry generation, C g, and carry propagation, Cp.

Cg = A B = 1 (A + B ) Cin = 1 (A + B ) Cin = 1 (A + B ) Cin = 1

Cg = A B = 1
Look-Ahead Carry Adder eliminates ripple carry delay. 21
Cout = Cg + CpCin
Figure
Carry generation and carry propagation in terms of the input bits to a 4-bit adder.

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Figure Logic diagram for a 4-stage look-ahead carry adder.

Notice that Cin is only dependent on inputs,

so doesn’t suffer from propagation delay like
the ripple adder. 23
 Comparators
• 1-Bit Comparator
• 2-Bit Comparator
• 4-Bit Comparator

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 Comparators
• 1-Bit Comparator - Exclusive NOR

The output is 1 when the inputs are equal

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 Comparators
• 2-Bit Comparator

The output is 1 when A0 = B0 AND A1 = B1

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• Apply the following set of binary numbers to the comparator inputs
and determine the output by following the logic levels through the
circuit. (Exclusive NOR - High is inputs are the same)

11 and 10

1 0
0
0
?
1 1
1

Since output is equal to 0, then the inputs are not equal.

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 Comparators
• 4-Bit Comparator

One of three outputs will be HIGH:

• A greater than B (A > B)
• A equal to B (A = B)
• A less than B (A < B)

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Figure What are the outputs for the given inputs?

0
A B
0110 > 0011 YES
0110 = 0011 NO
0110 < 0011 NO
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Figure An 8-bit magnitude comparator using two 74HC85s.

Lowest-order comparator must have a LOW on A > B

and A < B input and a HIGH on A = B input. 30
 Decoders

• Binary decoder
• 4-bit decoder
• BCD-to-decimal decoder
• BCD-to-7-segement decoder

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 Decoders
• Suppose we want to know when a binary
1001 occurs on the inputs of a digital circuit.
• We can use a Decoder for this function.
• Binary decoder
The output is 1 only when:
A0 = 1
A2 = 0
A3 = 0
A4 = 1

This is only one of an infinite 32

number of examples
• Determine the logic required to decode the
binary number 1011 by producing a HIGH
level on the output. LSB = A0 (right most)
• A0 = 1, A1 = 1, A2 = 0, A3 = 1
• X = A3A2A1A0

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 Decoders
• 4-bit decoder (4 line to 16 line decoder or 1 of 16 decoder)

Logic
Diagram

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 Decoders

• 4-bit decoder

– Binary inputs

– Active-low outputs
(bubbles)
Truth
Table

A3A2A1A0 Output
0 1 1 0 6 is low, all other outputs are high 35
 Decoders
• BCD-to-decimal decoder

If 0011 is input, then output 3 is low and all other outputs are high
Active Low output since bubbles on outputs. 36
 Decoders
• BCD-to-7-segement decoder

Common-anode

Logic
Diagram

37
Common Anode has all anodes of LEDs tied to +V
 Decoders
• BCD-to-7-segment decoder

Truth
Table

38
Figure
Pin diagram and logic symbol for the 74LS47 BCD-to-7-segment decoder/driver.

LT = Lamp Test - when LOW and BI/RBO is HI then all LEDs are ON
BI = Blanking Input
RBI = Ripple Blanking Input 39
Copyright ©2006 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
RBO = Ripple Blanking Output All rights reserved.
Figure
Examples of zero suppression using the 74LS47 BCD to 7-segment decoder/driver.

Tie RBI of Right

to next left
BI/RBO for
leading zero
suppression.
Left most RBI is
tied to ground.

Tie RBI of Left

to next right
BI/RBO for
trailing zero
suppression.
Right most RBI
is tied to ground.
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 Encoders

• Decimal-to-BCD encoder
• 8-line-to-3-line encoder

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 Encoders
• Decimal-to-BCD encoder ( 10 inputs, 4 outputs)

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Logic Diagram of Decimal-to-BCD Encoder

All odds
A0 = 1 + 3 + 5 + 7 + 9

A1 = 2 + 3 + 6 + 7

A2 = 4 + 5 + 6 + 7

A3 = 8 + 9
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 Encoders
• 8-line-to-3-line encoder

If line 5 on input is high, then output will be 101. 44

Assume only one input is high.
 Code Converters

• BCD-to-binary conversion
• Binary-Gray conversions

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 BCD
• Convert BCD number 00100111 to binary.
• Could convert to decimal 27 and then convert to binary.
• Can add weights.
80 40 20 10 8 4 2 1
0 0 1 0 0 1 1 1
1 1
10 2
100 4
10100 20
0011011 27

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Figure Four-bit binary-to-Gray conversion logic.

Convert 1 1 0 0 to Gray

101 0

XOR

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Figure
Four-bit Gray-to-binary conversion logic.

Convert 1 0 1 0 to Gray

110 0

XOR

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 Multiplexers (Data Selectors)

• 4-input multiplexer
• Expanded multiplexers

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 Multiplexers (Data Selectors)
• 4-input multiplexer

If Data-Select Inputs are 10, then Y = D2 50

If D = 0, then Y = 0. If D = 1, then Y = 1.
• What is the output Y if we have the
following inputs?

01
1

1 10
0
1
0

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 Demultiplexers
Reverses the multiplexing function.
Sends the data input to the selected output.
Decoders can be demultiplexers.

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 Demultiplexers
• 2-line-to-4-line demux

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• Find the data-output waveforms for the demultiplexer.

S0 and S1 select
which output line
will receive the
input data.
If data input is zero,
then all outputs will
be zero.

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 Parity Generators/Checkers
• Parity generator/checker
Sum of even number of 1s is always 0.
Sum of odd number of 1s is always 1.

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Figure Problem 4. Find the sum based on the inputs.
Note: We are adding A = 111 to B = 101.

1 1 0 0
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 Figure Problem 14. Plot the 3 outputs (A>B, A=B, A<B)

A3A2A1A0 B3B2B1B0 A>B A = B A<B

1 0 0 1 0 1 0 0 1 0 0
1 1 1 1 1 1 1 1 0 1 0
1 1 1 0 0 0 1 0 1 0 0
1 1 0 0 0 0 1 1 1 0 0
0 1 0 1 1 1 0 0 0 0 1

A>B

A=B

A<B

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Figure Problem 22. Find sequence of digits that appear.

A3A2A1A0
0 0 0 0 0
0
1 0 0 1 9
1 1 1 1 undefined
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Figure Like Problem 28.

If S0S1 = 11 and
D3D2D1D0 = 1001,
what is the output?

=1

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