Microprocessors and Microcontrollers

(21EC208)
IV Semester ECE

By,
Dr.S.Gandhimathi @ Usha,
Associate Professor/ECE
VCET
 Course Objectives
• To study the architecture of 8086 Microprocessor
and assembly language programming
fundamentals.
• To develop skills in interfacing of peripheral devices
with 8086 Microprocessor, 8051 Microcontroller and
MSP430 Microcontroller.
• To learn about 8086 Microprocessor and 8051
Microcontrollers.
• To study the architecture of MSP430 Microcontroller.
• To develop microcontroller based systems.
 COURSE OUTCOMES
CO1: Explain the architecture of Microprocessors and Understand
Microcontrollers.
CO2: Analyse various types of Interfacing Techniques. Apply

CO3: Write assembly language program for 8086 Apply

Microprocessor, 8051 and MSP430 microcontrollers.
CO4: Learn the architecture of MSP430 Microcontroller. Understand

CO5: Develop ALP for microcontroller based system Apply

design.
 CO-PO/PSO MAPPING
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1 2 3 4 5 6 7 8 9 0 1 12 1 O2
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CO2 K3 3 2 1 --- --- --- --- --- 1 1 --- --- 3 ---
CO3 K3 3 2 1 --- 2 --- --- --- 1 1 --- --- 3 ---
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CO5 K3 3 2 1 --- 2 --- --- --- --- --- --- --- 3 2

Course
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 21EC208/ Microprocessors and Microcontrollers
• UNIT I ARCHITECTURE OF 8086 & ASSEMBLY LANGUAGE PROGRAMMING
Microprocessor Families – 8086 –Architecture – Instruction set – Addressing Modes –
Bus Cycles – Assembly Language Programming of 8086 – Assembler Directives –
Interrupts and its applications.
• UNIT II PERIPHERAL INTERFACING
External Memory Interface – Programmable Peripheral Interface (8255) – Serial
Communication Interface (8251) –Keyboard and Display Interface (8279) – Programmable
Timer Controller (8253/8254) – Programmable interrupt controller (8259).
• UNIT III 8051 MICROCONTROLLER
8051 Microcontroller – Instruction Set – Assembly Language Programming – I/ O
Interfacing – 8051 Timers –USART – Interrupts – 8051 Programming in C .
• UNIT IV MSP430 MICROCONTROLLER
Architecture Introduction - Embedded C Programming in MSP430 - GPIO Pins &
Configuration - Timers, Capture & PWM – DAC – ADC Ports - I2C.
• UNIT V SYSTEM DESIGN USING MICROCONTROLLERS
ADC & DAC Interfacing – Sensor Interfacing – RTC Interfacing (DS1307) using I2C Standard
– Relay, Motor Control – DC & Stepper Motor – System Design: Traffic Light Controller &
Digital Weighing Machine.
TEXT BOOK(S):
• Douglas V Hall, “Microprocessors and Interfacing”, 3rd Edition, McGraw
Hill Education, 2012.
• Muhammad Ali Mazidi, “The 8051 Microcontroller and Embedded Systems
using Assembly and C”, 2nd Edition, Pearson India, 2007.
• John H. Davies, "MSP430 Microcontroller Basics", 2nd Edition,
Newnes,2008.

REFERENCES:
• V. A.K. Ray and K.M. Burchandi, “Intel Microprocessors Architecture
Programming and Interfacing”, McGraw Hill, 2000.
• Sunil Mathur, "Microprocessor 8086: Architecture, Programming and
Interfacing", PHI Learning Pvt.Ltd., 2011.
• Kenneth Ayala, "The 8051 Microcontroller”, 3rd Edition, Delmar Cengage
Learning, 2004.
Block Diagram of a Microcomputer
 Introduction
• A microprocessor consists of an ALU, control unit
and register array.
• ALU performs arithmetic and logical operations on
the data received from an input device or memory.
• Control unit controls the instructions and flow of
data within the computer.
• Register array consists of registers identified by
letters like B, C, D, E, H, L and accumulator.
 Introduction
• Computer's Central Processing Unit (CPU) built on a single
Integrated Circuit (IC) is called a microprocessor.
• It is a programmable, multipurpose, clock-driven, register-
based electronic device that reads binary instructions from
a storage device called memory, accepts binary data as
input and processes data according to those instructions
and provides results as output.
• It contains millions of tiny components like transistors,
registers, and diodes that work together.
 Working of Microprocessor

• The microprocessor follows a sequence to execute the

instruction: Fetch, Decode, and then Execute.
• Initially, the instructions are stored in the storage memory
of the computer in sequential order.
• The microprocessor fetches those instructions from the
stored area (memory), then decodes it and executes those
instructions till STOP instruction is met.
• Then, it sends the result in binary form to the output port.
• Between these processes, the register stores the
temporary data and ALU (Arithmetic and Logic Unit)
performs the computing functions.
 Evolution of Microprocessors

First Generation (4 - bit Microprocessors)

• Introduced in the year 1971-1972 by Intel Corporation.
Named as Intel 4004 since it was a 4-bit processor.
• single chip processor. It could perform simple arithmetic
and logical operations such as addition, subtraction,
Boolean OR and Boolean AND.
• Control unit capable of performing control functions like
fetching an instruction from storage memory, decoding it,
and then generating control pulses to execute it.
Second Generation (8 - bit Microprocessor):
• Introduced in 1973 by Intel.
• First 8 - bit microprocessor which could perform
arithmetic and logic operations on 8-bit words.
• It was Intel 8008, and another improved version was
Intel 8085.
Third Generation (16 - bit Microprocessor):
• Introduced in 1978 were represented by Intel's 8086,
Zilog Z800 and 80286.
• 16 - bit processors with a performance like
minicomputers.
Fourth Generation (32 - bit Microprocessors):
• Several different companies introduced the 32-bit
microprocessors, but the most popular one is the Intel
80386.
Fifth Generation (64 - bit Microprocessors):
• From 1995 to now we are in the fifth generation. After
80856, Intel came out with a new processor namely Pentium
processor followed by Pentium Pro CPU, which allows
multiple CPUs in a single system to achieve multiprocessing.
• Other improved 64-bit processors are Celeron, Dual, Quad,
Octa Core processors.
 Basic Terms used in Microprocessor

• Instruction Set - The group of commands that the microprocessor can

understand is called Instruction set. It is an interface between hardware
and software.

• Bus - Set of conductors intended to transmit data, address or control

information to different elements in a microprocessor. A microprocessor
will have three types of buses, i.e., data bus, address bus, and control bus.

• IPC (Instructions Per Cycle) - It is a measure of how many instructions a

CPU is capable of executing in a single clock.

• Clock Speed - It is the number of operations per second the processor can
perform. It can be expressed in megahertz (MHz) or gigahertz (GHz). It is
also called the Clock Rate.
• Bandwidth - The number of bits processed in a single
instruction is called Bandwidth.
• Word Length - The number of bits the processor can
process at a time is called the word length of the processor.
• 8-bit Microprocessor may process 8 -bit data at a time. The
range of word length is from 4 bits to 64 bits depending
upon the type of the microcomputer.
• Data Types - The microprocessor supports multiple data
type formats like binary, ASCII, signed and unsigned
numbers.
 Features of Microprocessor

• Low Cost - Due to integrated circuit technology

microprocessors are available at very low cost. It will
reduce the cost of a computer system.
• High Speed - Due to the technology involved in it, the
microprocessor can work at very high speed. It can execute
millions of instructions per second.
• Small Size - A microprocessor is fabricated in a very less
footprint due to very large scale and ultra large scale
integration technology. Because of this, the size of the
computer system is reduced.
• Versatile - The same chip can be used for several
applications, therefore, microprocessors are versatile.
• Low Power Consumption - Microprocessors are using metal
oxide semiconductor technology, which consumes less power.
• Less Heat Generation - Microprocessors uses semiconductor
technology which will not emit much heat as compared to
vacuum tube devices.
• Reliable - Since microprocessors use semiconductor technology,
therefore, the failure rate is very less. Hence it is very reliable.
• Portable - Due to the small size and low power consumption
microprocessors are portable.
 Microprocessor Applications

• Household Devices
• Industrial Applications
• Transportation Industry
• Computers and Electronics
• In Medicals
• Instrumentation
• Entertainment
• Communication
Microprocessor Families
 8086 Microprocessor
Introduction:
• INTEL 8086 is a 16 bit Microprocessor
• Implemented in N-channel HMOS technology
• 40 pin dual in-line package
Features:
• 16 bit Microprocessor
• 16 bit data bus
• 20 address lines
• It can generate 16 bit I/O address. Able to access 65,536 I/O ports.
• It has fourteen 16 bit registers
• It has multiplexed address & data bus
• It is designed to operate in two modes 1. Min mode 2. Max mode
• It supports multiprogramming
• It has powerful instruction set
• It fetches up to 6 instruction bytes from memory- high speed
8086 MICROPROCESSOR ARCHITECTURE
Bus Interface Unit (BIU)
• The BIU fetches instructions, reads data from memory and ports, and
writes data to memory and I/O ports.
• It has Segment registers , Instruction pointer and Instruction queue
Execution Unit (EU)
EU receives program instruction codes and data from the BIU,
executes these instructions and stores the results either in the
general registers or output them through the BIU.
It contains
• ALU
• General purpose registers
• Index registers
• Pointers
• Flag register
 Register organization of 8086:

All the registers of 8086 are 16-bit registers.

The general purpose registers, can be used either 8-bit registers or 16-bit registers used for

holding the data and variables

intermediate results temporarily.

The special purpose registers are used as segment registers, pointers, index registers or as offset
storage registers for particular addressing modes.
AX Register:
• Accumulator register consists of two 8-bit registers AL and AH, which can be combined together
and used as a 16- bit register AX.
• AL in this case contains the low-order byte of the word
AH contains the high-order byte.
• Accumulator can be used for I/O operations, rotate and string manipulation.
BX Register:
• This register is mainly used as a base register.
• It holds the starting base location of a memory region within the data segment.
• It is used as offset storage for forming physical address in case of certain addressing mode.
CX Register:
• It is used as default counter - count register in case of string and loop instructions.
DX Register:
• Data register can be used as a port number in I/O operations and implicit operand or destination
in case of few instructions.
• In integer 32-bit multiply and divide instruction the DX register contains high-order word of the
initial or resulting number.
Segment Registers:
Most of the registers contain data/instruction offsets within 64 KB memory segment.
There are four different 64 KB segments for instructions, stack, data and extra data.
• Code segment (CS)
The CS register is automatically updated during FAR JUMP, FAR CALL and FAR RET
instructions.

• Stack segment (SS)

SS register can be changed directly using POP instruction.

• Data segment (DS)

DS register can be changed directly using POP and LDS instructions.

• Extra segment (ES)

ES register can be changed directly using POP and LES instructions.
INSTRUCTION POINTER (IP)
 It is a 16-bit register. The operation is same as the program counter.
 The IP register is updated by the BIU to point to the address of the next instruction.

INSTRUCTION QUEUE
 The instruction queue is a First-In-First-out (FIFO) group of registers where 6 bytes of
instruction code is pre-fetched from memory ahead of time.
 It is being done to speed-up program execution by overlapping instruction fetch and
execution.
 This mechanism is known as PIPELINING.

CONTROL UNIT
 The control unit in the EU directs the internal operations like RD , WR and M/IO
operations

ALU
 It is a 16 bit register. It can add, subtract, increment, decrement, complement, shift
numbers and performs AND, OR, XOR operations.
POINTER REGISTERS
 Stack Pointer (SP)
16-bit register pointing to program stack.
 Base Pointer (BP)
16-bit register pointing to data in the stack segment.
- used for based, based indexed or register indirect addressing.
 Index Registers
Source Index (SI)
- 16-bit register.
- used for indexed, based indexed and register indirect addressing, as well as a
source data address in string manipulation instructions.
Destination Index (DI)
- 16-bit register.
- used for indexed, based indexed and register indirect addressing, as well as a
destination data address in string manipulation instructions
FLAG REGISTER

Six status flags - OF, SF, ZF, AF, PF, CF

Three control flags - TF, DF, IF
 Conditional Flags:

1.Carry Flag (CY):

• This flag indicates an overflow condition for unsigned integer arithmetic.
• It is also used in multiple-precision arithmetic.

2. Auxiliary Flag (AC):

• If an operation performed in ALU generates a carry/barrow from lower nibble
• (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), the AC flag is set i.e. carry given by D3 bit to D4 is AC flag.

3.Parity Flag (PF):

• This flag is used to indicate the parity of result.
• If lower order 8-bits of the result contains even number of 1’s, the Parity Flag is set and for odd number of 1’s,
the Parity flag is reset.

4.Zero Flag (ZF):

It is set if the result of arithmetic or logical operation is zero else it is reset.

5.Sign Flag (SF):

In sign magnitude format the sign of number is indicated by MSB bit.
If the result of operation is negative, sign flag is set.

6. Overflow flag(OF):
Set if the result is too large positive number or is too small negative number to fit into destination operand.
 II. Control Flags

• Control flags are set or reset deliberately to control the operations of the execution unit.
1. Trap Flag (TF):
• It is used for single step control. It allows user to execute one instruction of a program at a
time for debugging.
• When trap flag is set, program can be run in single step mode.

2. Interrupt Flag (IF):

• It is an interrupt enable/disable flag.
• If it is set, the maskable interrupt of 8086 is enabled and if it is reset, the interrupt is disabled.
• It can be set by executing instruction sit and can be cleared by executing CLI instruction.

3. Direction Flag (DF):

• It is used in string operation.
• If it is set, string bytes are accessed from higher memory address to lower memory address.
• When it is reset, the string bytes are accessed from lower memory address to higher memory
address.
Memory segmentation
• Offset is the displacement of the memory location
from the starting location of the segment. The
8086 addresses a segmented memory.
• The complete physical address which is 20-bits long
is generated using segment and offset registers
each of the size 16-bit
 ADDRESSING MODES

• An addressing mode is the way the 8086 identifies the operands for the
instruction.

8086 has the following addressing modes:

1. Register Addressing Mode
2. Immediate Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Base Addressing Mode
6. Indexed Addressing Mode
7. Based Indexed Addressing Mode
8. Relative Addressing Mode
9. Implied Addressing Mode
1.Register Addressing Mode

• Both source and destination operands are registers. The operand sizes must match.
MOV destination, source

Examples:
• MOV AL, AH
• MOV AX, BX

2.Immediate Addressing Mode

• The data operand is supplied as part of the instruction. The immediate operand can
only be a source.

Examples:
• MOV CH, 3A H
• MOV DX, 0C1A5 H
3.Direct Addressing Mode

• One of the operands is a memory location, given by a constant offset.

• In this mode the 16 bit effective address (EA) is taken directly from the displacement field
of the instruction.

Examples:
• MOV AX,[1234 H]
• MOV DL, [3BD2 H]

4.Register Indirect Addressing Mode

• One of the operands is a memory location, with the offset given by one of the BP, BX, SI, or
DI registers.

Example:
• MOV [BX], CL
• MOV DL, [BX]
5.Base Addressing Mode:
• In this mode EA is obtained by adding a displacement (signed 8 bit
or unsigned 16 bit) value to the contents of BX or BP.
• The segment registers used are DS and SS.

Example:
• MOV AX, [BP + 200]

6.Indexed Addressing Mode:

• The operand’s offset is the sum of the content of an index register SI
or DI and an 8-bit or 16-bit displacement.

Example:
• MOV AH, [DI]
7.Based Indexed Addressing Mode

• In this mode, the EA is computed by adding a base register (BX or BP), an index register (SI
or DI) and a displacement (unsigned 16 bit or sign extended 8 bit)

Example:
• MOV AX, [BX + SI + 1234 H]
• MOV CX, [BP][SI] + 4

8.String Addressing Mode

• The instruction is a string instruction, which uses index registers implicitly to access
memory.

Example:

• MOVS B
• MOVS W
9.I/O Port Addressing Mode

• The destination or source of the data is an I/O port. Either direct port addressing (including an 8-bit
port address) or indirect addressing (DX must contain the
port address) may be used.

Examples:
• IN AX, 50H ; Direct
• OUT DX, AL ; Indirect

10.Relative Addressing Mode

• In this mode, the operand is specified as a signed 8 bit displacement, relative to PC(Program
Counter).

Examples:
• JMP 0200 H
• JNC START

11.Implied Addressing Mode

• Instructions using this mode have no operands.
• Examples:
• CLC, STC, CMC
 INSTRUCTION SET

• Intel 8086 has approximately 117 instructions.

These instructions are used to transfer data between registers,
register to memory, memory to register or register to I/O ports
and other instructions are used for data manipulation.

1.Data Transfer Instructions

2.Arithmetic Instructions
3.Bit Manipulation Instructions
4.String Instructions
5.Program Execution Transfer Instructions
6.Processor Control Instructions
 Data Transfer Instructions

MOV destination, source

• This (Move) instruction transfers a byte or a word from the source
operand to the destination
Example :
• MOV AX, BX
• MOV AX, 2150H
• MOV AL, [1135]
PUSH
• PUSH Source
• This instruction decrements SP (stack pointer) by 2 and then
transfers a word from the source operand to the top of the stack now
pointed to by stack pointer.
Example :
• PUSH SI
• PUSH BX
POP
• POP destination
• This instruction transfers the word at the current top
of stack (pointed to by SP) to the destination operand
and then increments SP by 2, pointing to the new top
of the stack.
(DEST) ((SP)+1:(SP))
(SP) (SP) + 2
• Example :
• POP DX
• POP DS
LAHF
• Load Register AH from Flags
• This instruction copies Sign flag(S), Zero flag (Z), Auxiliary flag
(AC), Parity flag (P) and Carry flag (C) of 8086 into bits 7, 6, 4, 2
and 0 respectively, of register AH

SAHF
• Store Register AH into Flags
• This instruction transfers bits 7, 6, 4, 2 and 0 from register AH
into S, Z, AC, P and C flags respectively, thereby replacing the
previous values.
XCHG
• XCHG destination, source
• This (Exchange) instruction switches the contents of the source and destination operands.

XLAT
XLAT table
• This (Translate) instruction replaces a byte in the AL register with a byte from a 256-byte,
user-coded translation table. XLAT is useful for translating characters from one code to another.

• AL ((BX) + (AL))
• Example :
• XLAT ASCII_TAB
• XLAT Table_3
LEA
• LEA destination, source
• This (Load Effective Address) instruction transfers the offset of the source
operand (memory) to the destination operand (16-bit general register).
Example :
• LEA BX, [BP] [DI]
• LEA SI, [BX + 02AF H]

LDS
• LDS destination, source
• This (Load pointer using DS) instruction transfers a 32-bit pointer variable
from the source operand (memory operand) to the destination operand and
register DS.

• Example :
• LDS SI, [6AC1H]
LES
LES destination, source
• This (Load pointer using ES) instruction transfers a 32-bit pointer
variable from the source operand (memory operand) to the destination
operand and register ES.
Example :
LES DI, [BX]
IN
IN accumulator, port
• This (Input) instruction transfers a byte or a word from an input port to
the
Example :
• IN AX, DX , • IN AL, 062H
OUT OUT port, accumulator
• Transfers a byte or a word from the accumulator (AL or AX) to an output
port.
 Arithmetic Instructions
ADD
ADD destination, source

Example :
ADD CX, DX
ADD AX, 1257 H
ADD BX, [CX]

ADC
ADC destination, source
This (Add with carry) instruction adds the two operands and adds one if carry flag (CF) is
set and stores the result in destination operand.
Example :
ADC AX, BX
ADC AL, 8
ADC CX, [BX]
• SUB
SUB destination, source
• This (Subtract) instruction subtracts the source operand from the destination operand and the
result is stored in destination operand.
(DEST) (DEST) – (SRC)

Example :
SUB AX, 6541 H
SUB BX, AX
SUB SI, 5780 H

SBB
SBB destination, source
• This (Subtract with Borrow) instruction subtracts the source from the destination and subtracts 1
if carry flag (CF) is set. The result is stored in destination operand.
• (DEST) (DEST) – (SRC) –1
Example :
SBB BX, CX
SBB AX, 2
CMP
CMP destination, source
• This (Compare) instruction subtracts the source from the destination, but does not store
the result.
• (DEST) – (SRC)

Example :
• CMP AX, 18
• CMP BX, CX

INC
INC destination
• This (Increment) instruction adds 1 to the destination operand (byte or word).
• (DEST) (DEST) + 1

Example :
• INC BL
• INC CX
DEC
DEC destination
• This (Decrement) instruction subtracts 1 from the destination operand. (DEST)
(DEST) –1
Example :
• DEC BL
• DEC AX

NEG
NEG destination
This (Negate) instruction subtracts the destination operand from 0 and stores
the result in destination. This forms the 2’s complement of the number.
• (DEST) 0 – (DEST)
Example :
• NEG AX
• NEG CL
DAA
• This (Decimal Adjust for Addition) instruction converts the binary result of an
ADD or ADC instruction in AL to packed BCD format.

DAS
• This (Decimal Adjust for Subtraction) instruction converts the binary result of a
SUB or SBB instruction in AL to packed BCD format.

AAA
• This (ASCII Adjust for Addition) instruction adjusts the binary result of ADD or ADC
instruction.
• If bits 0-3 of AL contain a value greater than 9, or if the auxiliary carry flag (AF) is set,
the CPU adds 06 to AL and adds 1 to AH. The bits 4-7 of AL are set to zero.
(AL)= (AL) + 6
(AH)= (AH) + 1
(AF)= 1
AAS
This (ASCII Adjust for Subtraction) instruction adjusts the binary result of a SUB or SBB
instruction.
• If D3–D0 of AL > 9,
• (AL) = (AL) – 6
• (AH) =(AH) – 1
• (AF)= 1
MUL
• MUL source
• This (Multiply) instruction multiply AL or AX register by register or memory location
contents. Both operands are unsigned numbers. If the source is a byte (8 bit), then it is
multiplied by register AL and the result is stored in AH and AL.
• If the source operand is a word (16 bit), then it is multiplied by register AX and the result
is stored in AX and DX registers.
• If 8 bit data, (AX)= (AL) x (SRC)
If 16 bit data, (AX), (DX)= (AX) x (SRC)
Example :
• MUL 25
• MUL CX
IMUL :
IMUL Source
This (Integer Multiply) instruction performs a signed multiplication of the
source operand and the accumulator.
If 8 bit data, (AX) = (AL) x (SRC)
If 16 bit data, (AX), (DX) = (AX) x (SRC)
Example :
IMUL 250
IMUL BL

AAM:
This (ASCII Adjust for Multiplication) instruction adjusts the binary result of a
MUL instruction. AL is divided by 10(0AH) and quotient is stored in AH. The
remainder is stored in AL.
(AH) =(AL/0AH)
(AL) =Remainder
DIV
DIV Source
• This (Division) instruction performs an unsigned division of the
accumulator by the source operand. It allows a 16 bit unsigned number to be
divided by an 8 bit unsigned number, or a 32 bit unsigned number to be
divided by a 16 bit unsigned number.
For 8 bit data, AX / source
(AL) = Quotient
(AH) = Remainder

For 16 bit data, AX, DX / Source

(AX) = Quotient
(DX) = Remainder
Example :
DIV CX
DIV 321
IDIV
IDIV source
This (Integer Division) instruction performs a signed division of the
accumulator by the source operand.
For 16 bit data, AX, DX / Source
(AX)= Quotient ,(DX) Remainder
Example :
IDIV CL
IDIV AX
AAD
This (ASCII Adjust for Division) instruction adjusts the unpacked BCD
dividend in AX before a division operation. AH is multiplied by 10(0AH) and
added to AL. AH is set to zero.
(AL) = (AH x 0AH) + (AL)
(AH) = 0
• CBW
This (Convert Byte to Word) instruction converts a byte to a word.
It extends the sign of the byte in register AL through register AH.
This instruction can be used for 16 bit IMUL or IDIV instruction.
IF AL < 80 H, then AH = 00 H
IF AL > 80 H, then AH = FFH

CWD :
This (Convert Word to Double word) instruction converts a word to
a double word.
It extends the sign of the word in register AX through register DX.
If AX < 8000 H, then DX = 0000 H
If AX > 8000 H, then DX = FFFFH
 Bit Manipulation Instructions

(i)Logical Instructions: AND, OR, XOR,

NOT,TEST

(ii)Shift Instructions: SHL, SAL, SHR, SAR

(iii)Rotate Instructions: ROL, ROR, RCL, RCR

AND
AND destination, source
(DEST) ¬ (DEST) “AND” (SRC)
Example :
AND BL, CL
AND AL, 0011 1100 B

OR
OR destination, source
(DEST) ¬ (DEST) “OR” (SRC)
Example :
OR AX, BX
OR AL, 0000 1111B
• XOR
XOR destination, source
• This (Exclusive OR) instruction performs the logical “XOR” of the
two operands and the result is stored in destination operand.
• (DEST) ¬ (DEST) “XOR” (SRC)
• Example :
• XOR BX, AX
• XOR AL, 1111 1111B

NOT NOT destination

(DEST) ¬ 1’s complement of (DEST)

Example :
NOT AX
• TEST
• TEST destination, source
• This (TEST) instruction performs the logical “AND” of the two operands and
updates the flags but does not store the result.
• (DEST) “AND” (SRC)
• Example :
• TEST AL, 15 H
• TEST SI, DI
•
SHL
• SHL destination, count
• This (Shift Logical Left) instruction performs the shift operation.
The number of bits to be shifted is represented by a variable count, either
1 or the number contained in the CL register.
• Example
• SHL AL, 1
• Before execution :
• SAL
• SAL destination, count
• SAL (Shift Arithmetic Left) and SHL (Shift Logical Left) instructions perform
the same operation and are physically the same instruction.
Example
• SAL AL, CL
• SAL AL, 1

SHR
• SHR destination, count
• This (Shift Logical Right) instruction shifts the bits in the destination
operand to the right by the number of bits specified by the count operand,
either 1 or the number contained in the CL register.
Example
• SHR BL, 1
• SHR BL, CL
SAR
• SAR destination, count
• This (Shift Arithmetic Right) instruction shifts the bits in the destination operand to the right
by the number of bits specified in the count operand. Bits equal to the original high-order
(sign) bits are shifted in on the left, thereby preserving the sign of the original value.

ROL
ROL destination, count

This (Rotate Left) instruction rotates the bits in the byte/word destination operand to the left by
the number of bits specified in the count operand.

RCR

• RCR destination, count

• This (Rotate through Carry Right) instruction rotates the contents right through carry by the
specified number of bits in the count operand.
 STRING INSTRUCTIONS
REP
• REP MOVS destination, Source

• This (Repeat) instruction converts any string primitive instruction into a re-executing loop.
• It specifies a termination condition which causes the string primitive instruction to
continue executing until the termination condition is met.

• Example :

REP MOVS CL, AL

The other Repeat instructions are :
REPE - Repeat while Equal
REPZ - Repeat while zero
REPNE - Repeat while Not Equal
REPNZ - Repeat while Not Zero
The above instructions are used with the CMPS and SCAS instructions.
MOVS
• MOVS destination - string, source-string
• This (Move String) instruction transfers a byte/word from the source
string (addressed by SI) to the destination string (addressed by DI) and
updates SI and
DI to point to the next string element.
Example :
• MOVS Buffer 1, Buffer 2

CMPS
• CMPS destination-string, source-string
• This (Compare String) instruction subtracts the destination byte/word
(addressed by DI) from the source byte/word (addressed by SI). It affects the
flags but does not affect the operands.
Example :
• CMPS Buffer 1, Buffer 2
SCAS
• SCAS destination-string
• This (Scan String) instruction subtracts the destination string element (addressed by DI) from
the contents of AL or AX and updates the flags.
Example :
• SCAS Buffer

LODS
• LODS source-string
• This (Load String) instruction transfers the byte/word string element addressed by SI to register AL
or AX and updates SI to point to the next element in the string.
Example :
• LODSB name , • LODSW name

STOS
• STOS destination - string
• This (Store String) instruction transfers a byte/word from register AL or AX to the string element
addressed by DI and updates DI to point to the next location in the string.

• Example :
• STOS display
 Program Transfer Instructions

• (i)Unconditional instructions: CALL, RET, JMP

• (ii)Conditional instructions: JC, JZ, JA.....
• (iii)Iteration control instructions :LOOP, JCXZ
• (iv)Interrupt instructions: INT, INTO, IRET

CALL
• CALL procedure - name
• This (CALL) instruction is used to transfer execution to a subprogram or
procedure. RET (return) instruction is used to go back to the main program.
There are two basic types of CALL : NEAR and FAR

• Example :
• CALL NEAR
• CALL AX
RET
• This (Return) instruction will return execution from a procedure to the
next instruction after the CALL instruction in the main program.
Example :
• RET
• RET 6

JMP
JMP target
• This (Jump) instruction unconditionally transfers control to the target
location. The target operand may be obtained from the instruction itself (direct
JMP) or from memory or a register referenced by the instruction (indirect JMP).

• Example :
• JMP BX
LOOP LOOP label
• This (Loop if CX not zero) instruction decrements
CX by 1 and transfers control to the target operand
if CX is not zero. Otherwise the instruction following
LOOP is executed.
• If CX=0, CX = CX–1
• IP = IP + displacement
• If CX=0, then the next sequential instruction is
executed.
Example :
LOOP again
 Processor Control Instructions
HLT
This (Halt) instruction will cause the 8086 to stop fetching and executing
instructions. The 8086 will enter a halt state.
WAIT
• This (Wait) instruction causes the 8086 to enter the wait state while its test line
is not active.
ESC
• This (Escape) instruction provides a mechanism by which other coprocessors
may receive their instructions from the 8086 instruction stream and make use of
the 8086 addressing modes.
NOP
• This (No operation) instruction causes the CPU to do nothing. NOP does not
affect any flags.
 ASSEMBLER DIRECTIVES

• An assembler is a program which translates an

assembly language program into machine language
program.
• An assembler directive is a statement to give
direction to the assembler to perform the task of
assembly process.
• The assembler directives control organization of the
program and provide necessary information to the
assembler to understand assembly language programs
to generate machine codes.
• ASSUME
It is used to inform the assembler the names of the logical segments, which
are to be assigned to the different segments used in an assembly language
program
Format:
• ASSUME seg register: name [ [, seg register:name]]...
• ASSUME data register:type [[, data register:type]]...
• ASSUME [[register:]] NOTHING [[, register:NOTHING]]...

DB (Define Byte)
• It can be used to define data like BYTE.
• Example:
• WEIGHTS DB 18, 68, 45
DW (Define Word)
• It can be used to define data like WORD (2 bytes).
• Example:
• SUM DW 4589
• DD (Define Double Word)
It can be used to define data like DWORD (4 bytes).
Example:
• NUMBER DD 12345678
DQ (Define Quad Word)
• It can be used to define data like QWORD (8 bytes).
Example:
• TABLE DQ 1234567812345678
DT (Define Ten Bytes)
• It can be used to define data like TBYTE (10 bytes).
Example:
• AMOUNT DT 12345678123456781234
END (End of program)
• It marks the end of a program module and, optionally,
sets the program entry point to address.
• Example:
• END label
• ENDP (End Procedure) It marks the end of procedure.
Format:
name ENDP
Example:
• CONTROL PROC FAR
• ...
• CONTROL ENDP
• • ENDM (End Macro)
• • It terminates a macro or repeat block.
• • Format:
• • ENDM
• • Example:
• CODE MACRO
• ...
• ENDM
ENDS (End of Segment)
• It marks the end of segment, structure, or union name previously
begun with SEGMENT, STRUCT, UNION, or a simplified segment
directive.
• Format:
• name ENDS
• Example:
CODE SEGMENT
...
CODEENDS
• MACRO
• • A sequence of instructions to which a name is assigned is
called a macro. The name of a macro is used in assembly
language programming.
• Macros and subroutines are similar.
• Macros are used for short sequences of instructions, where
• as subroutines for longer ones. Macros execute faster than
subroutines. A subroutine requires CALL and RET
instructions
• • Format:
• • name MACRO [ optional arguments ]
• • statements ENDM
 8086 Bus Cycle and Timing Diagram
The BIU initiates all external operations which are also called bus
activity. The external bus activities are repetitions of certain basic
operations. The basic operation performed by the CPU bus are called
bus cycles.
Depending on the activities of 8086 , the bus cycles can be classified
as
● Memory read cycle
● Memory write cycle
● I/O read cycle
● I/O write cycle
● Interrupt acknowledge cycle
T- states:
- The time taken to perform a bus cycle.
one T-state :
• Timing diagram provides information about the various conditions (high
state or low state) of the signals while a bus cycle is executed.
• Timing diagram is a graphical representation of the operations of
microprocessor with respect to time.

• State: one cycle of the clock is called state.

• Machine cycle: The basic microprocessor operation such as reading a byte
from memory or writing a byte to a port is called machine cycle and made
up of more than one state.
• Instruction cycle: The time required for a microprocessor to fetch and
execute an entire instruction is called Instruction cycle and made up of
more than one machine cycle.
• An instruction cycle is made up of machine cycles, and a machine cycle is
made up of states. The time for a state is determined by the frequency of
the clock signal.
Read cycle timing diagram for Minimum mode
• The read cycle begins in T1 with the assertion of the address latch enable (ALE) signal and also
M/IO’ signal.

• During the negative going edge of this signal, the valid address is latched on the local bus. The
BHE’ and A0 signals address low, high or both bytes.

• From T1 to T4, the M/IO’ signal indicate a memory or I/O operation.

• At T2, the address is removed from the local bus and is sent to the output.

• The bus is then tristated. The read (RD ) control signal is also activated in T2.

• The read (RD ) signal causes the addressed device to enable its data bus drivers.

• After RD goes low, the valid data is available on the data bus.

• The addressed device will drive the READY line high. When the processor returns the read signal
to high level, the addressed device will again tristate its bus driver
Write cycle timing diagram for Minimum mode
• A write cycle also begins with the assertion of ALE and the emission of
the
address. The M/IO’ signal is again asserted to indicate a memory or I/O
Operation.
• In T2, after sending the address in T1, the processor sends the data to be
written to the addressed location. The data remains on the bus until the
middle of T4 state.
The WR’ becomes active at the beginning of T2 (unlike RD’ is
somewhat delayed in T2 to provide time for floating).
• The BHE’ and A0 signals are used to select the proper byte or bytes of
memory or I/O word to be read or written.
• The M/IO’, RD’ and WR’ signals indicate the types of data transfer as
specified in Table
Read cycle timing diagram for Maximum mode
Write cycle timing diagram for Maximum mode: