Lec 13 Encoders - Decoders
Lec 13 Encoders - Decoders
n inputs n-to-2n .
.
. 2n outputs
Decoder .
Add
Sub
And Light
op0 3-to-8 Xor C0 2-to-4 A/C
op1 Decoder Not Decoder Door
C1
op2 Load Light-A/C
Store
Jump
Decoder with Enable
• A decoder can have an additional input signal called
the enable which enables or disables the output
generated by the decoder
n inputs n-to-2n .
.
. 2n outputs
Decoder .
Enable bit
2-to-4 Decoder
•A 2-to-4 Decoder
• 2 inputs (A , A 0)
1
• 22 = 4 outputs (D , D , D , D )
3 2 1 0
2-to-4 Decoder
•A 2-to-4 Decoder
• 2 inputs (A , A 0)
1
• 22 = 4 outputs (D , D , D , D )
3 2 1 0
• Truth Table
A1 A0 D0 D1 D2 D3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
2-to-4 Decoder
•A 2-to-4 Decoder
• 2 inputs (A , A 0)
1
• 22 = 4 outputs (D , D , D , D )
3 2 1 0
• Truth Table
A1 A0 D0 D1 D2 D3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
2-to-4 Decoder with Enable
Truth Table
EN A1 A0 D0 D1 D2 D3
0 X X 0 0 0 0
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
1 1 1 0 0 0 1
2-to-4 Decoder with Enable
Truth Table
EN A1 A0 D0 D1 D2 D3
0 X X 0 0 0 0
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
1 1 1 0 0 0 1
3-to-8 Decoder
D0
D1
A0 3-to-8 D2
A1 Decoder D3
A2 D4
D5
D6
D7
3-to-8 Decoder
A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7
D0 0 0 0 1 0 0 0 0 0 0 0
D1 0 0 1 0 1 0 0 0 0 0 0
D2
A0 3-to-8
D3 0 1 0 0 0 1 0 0 0 0 0
A1 Decoder
D4
A2 0 1 1 0 0 0 1 0 0 0 0
D5
D6 1 0 0 0 0 0 0 1 0 0 0
D7
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1
3-to-8 Decoder
D0
D1
D2
A0 3-to-8
D3
A1Decoder
D4
A2
D5
D6
D7
3-to-8 Decoder (using 2 2-to-4 decoders)
D0
D0 A0 2-to-4 D1
D1 A1 Decoder D2
D2 E D3
A0 3-to-8
A1 Decoder D3
A2
A2 D4
D5
D6
D4
D7 A0 2-to-4 D5
A1 Decoder D6
E D7
Decoder-Based Combinational
Circuits
• A Decoder generates all the minterms
• A boolean function can be expressed as a sum of
minterms
• Any boolean function can be implemented using a
decoder and an OR gate.
• Note: The Boolean function must be represented as
minterms (not minimized form)
Decoder-Based Combinational
Circuits (Example)
X Y Z C S
S = ∑m (1,2,4,7)
0 0 0 0 0
0 0 1 0 1 C = ∑m (3,5,6,7)
0 1 0 0 1 3 inputs and 8 possible min terms
0 1 1 1 0 3-to-8 decoder can be used for
1 0 0 0 1 implementing this circuit
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Decoder-Based Combinational
Circuits (Example)
S = ∑m (1,2,4,7)
X Y Z C S
C = ∑m (3,5,6,7)
0 0 0 0 0
0 0 1 0 1 3 inputs and 8 possible min terms
3-to-8 decoder can be used for implementing this circuit
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Encoder
n
. 2n-to-n
2 inputs . . n outputs
. Encoder
• Description:
D0
D1 • 23 = 8 inputs, 3 outputs
D2 A0
D3
8-to-3 • one input =1, others = 0’s
Encoder A1
D4 A2
D5 • Each input generate unique binary code
D6
D7
8-to-3 Encoder (truth table)
inputs outputs
D0 D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
D1
0 0 0 0 0 0 0 1 0 0 0
D2 A0
D3
8-to-3 0 0 0 0 0 0 1 0 0 0 1
Encoder A1
D4 A2 0 0 0 0 0 1 0 0 0 1 0
D5
D6 0 0 0 0 1 0 0 0 0 1 1
D7 0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table)
inputs outputs
1 D0 D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
0 D1 0 0 0 0 0 0 0 1 0 0 0
0 D2
8-to-3 A0 0
0 D3 0 0 0 0 0 0 1 0 0 0 1
0 Encoder A1 0
D4 A2 0 0 0 0 0 0 1 0 0 0 1 0
0
0 D5
D6 0 0 0 0 1 0 0 0 0 1 1
0
D7 0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table)
inputs outputs
0 D0 D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
1 D1 0 0 0 0 0 0 0 1 0 0 0
0 D2
8-to-3 A0 1
0 D3 0 0 0 0 0 0 1 0 0 0 1
0 Encoder A1 0
D4 A2 0 0 0 0 0 0 1 0 0 0 1 0
0
0 D5
0 0 0 0 1 0 0 0 0 1 1
0 D6
D7 0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table)
inputs outputs
0 D0 D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
0 D1 0 0 0 0 0 0 0 1 0 0 0
0 D2
8-to-3 A0 1
0 D3 0 0 0 0 0 0 1 0 0 0 1
0 Encoder A1 0
D4 A2 1 0 0 0 0 0 1 0 0 0 1 0
1
0 D5
D6 0 0 0 0 1 0 0 0 0 1 1
0
D7 0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table)
inputs outputs
0 D0 D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
0 D1 0 0 0 0 0 0 0 1 0 0 0
0 D2
8-to-3 A0 1
0 D3 0 0 0 0 0 0 1 0 0 0 1
0 Encoder A1 1
D4 A2 1 0 0 0 0 0 1 0 0 0 1 0
0
0 D5
0 0 0 0 1 0 0 0 0 1 1
1 D6
D7 0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (equations)
inputs outputs
D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
D0
0 0 0 0 0 0 0 1 0 0 0
D1
D2 A0 0 0 0 0 0 0 1 0 0 0 1
D3
8-to-3
Encoder A1 0 0 0 0 0 1 0 0 0 1 0
D4 A2
D5 0 0 0 0 1 0 0 0 0 1 1
D6
0 0 0 1 0 0 0 0 1 0 0
D7
0 0 1 0 0 0 0 0 1 0 1
Output equations: 0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
A0 = ?
A1 = ?
A2 = ?
8-to-3 Encoder (equations)
inputs outputs
D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
D0 0 0 0 0 0 0 0 1 0 0 0
D1
D2 0 0 0 0 0 0 1 0 0 0 1
8-to-3 A0
D3 A1 0 0 0 0 0 1 0 0 0 1 0
D4
Encoder
A2 0 0 0 0 1 0 0 0 0 1 1
D5
D6 0 0 0 1 0 0 0 0 1 0 0
D7
0 0 1 0 0 0 0 0 1 0 1
Output equations: 0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
A0 = D1 + D3 + D5 + D7
A1 = ?
A2 = ?
8-to-3 Encoder (equations)
inputs outputs
D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
D0 0 0 0 0 0 0 0 1 0 0 0
D1
D2 0 0 0 0 0 0 1 0 0 0 1
8-to-3 A0
D3 A1 0 0 0 0 0 1 0 0 0 1 0
D4
Encoder
A2 0 0 0 0 1 0 0 0 0 1 1
D5
D6 0 0 0 1 0 0 0 0 1 0 0
D7
0 0 1 0 0 0 0 0 1 0 1
Output equations: 0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
A0 = D1 + D3 + D5 + D7
A1 = D2 + D3 + D6 + D7
A2 = ?
8-to-3 Encoder (equations)
inputs outputs
D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
0 0 0 0 0 0 0 1 0 0 0
D0
D1 0 0 0 0 0 0 1 0 0 0 1
D2 A0
8-to-3 0 0 0 0 0 1 0 0 0 1 0
D3 A1
D4
Encoder 0 0 0 0 1 0 0 0 0 1 1
A2
D5 0 0 0 1 0 0 0 0 1 0 0
D6
D7 0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
Output equations:
1 0 0 0 0 0 0 0 1 1 1
A0 = D1 + D3 + D5 + D7
A1 = D2 + D3 + D6 + D7
A2 = D4 + D5 + D6 + D7
8-to-3 Encoder (circuit)
D1
D0 D3
D1 D5 A0
D2 A0 D7
D3
8-to-3
A1 D2
D4
Encoder
A2 D3
A1
D5 D6
D6 D7
D7 D4
D5
A2
D6
Output equations: D7
A0 = D1 + D3 + D5 + D7
A1 = D2 + D3 + D6 + D7
A2 = D4 + D5 + D6 + D7
8-to-3 Encoder (limitations)
Two Limitations: inputs outputs
D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0
1. Two or more inputs = 1
•Example: D3 = D6 = 1 0 0 0 0 0 0 0 1 0 0 0
•A2A1A0 = 111 0 0 0 0 0 0 1 0 0 0 1
0 0 0 0 0 1 0 0 0 1 0
2. All inputs = 0
•Same as D0 =1 0 0 0 0 1 0 0 0 0 1 1
0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
Output equations:
0 1 0 0 0 0 0 0 1 1 0
A0 = D1 + D3 + D5 + D7 1 0 0 0 0 0 0 0 1 1 1
A1 = D2 + D3 + D6 + D7
A2 = D4 + D5 + D6 + D7
Priority Encoder
• Address the previous two limitations
inputs outputs
D3 D2 D1 D0 A1 A0 V
0 0 1 X 0 1 1 Row 3 = 2 combinations
0 1 X X 1 0 1 Row 4 = 4 combinations
1 X X X 1 1 1
Row 5 = 8 combinations
4-to-2 Priority Encoder
Description:
• 22 = 4 inputs, 2 + 1 outputs
• Two or more 1’s take highest
priority
inputs outputs
D3 D2 D1 D0 A1 A0 V
0 0 0 0 X X 0
0 0 0 1 0 0 1
Equations:
0 0 1 X 0 1 1
A0 = D3 + D1 D2’
0 1 X X 1 0 1 A 1 = D2 + D 3
1 X X X 1 1 1 V = D 0 + D1 + D2 + D3
4-to-2 Priority Encoder
Description:
• 22 = 4 inputs, 2 + 1 outputs
• Two or more 1’s take highest
priority
inputs outputs
D3 D2 D1 D0 A1 A0 V
0 0 0 0 X X 0
0 0 0 1 0 0 1
0 0 1 X 0 1 1 Equations:
A0 = D3 + D1 D2’
0 1 X X 1 0 1
A 1 = D2 + D 3
1 X X X 1 1 1
V = D 0 + D1 + D2 + D3