Computer Organization And Architecture

Gitam University, Benguluru

Unit – 1

Register Transfer and Micro operations

1
REGISTER TRANSFER AND MICROOPERATIONS

• Register Transfer Language

• Register Transfer

• Bus and Memory Transfers

• Arithmetic Microoperations

• Logic Microoperations

• Shift Microoperations

• Arithmetic Logic Shift Unit

 SIMPLE DIGITAL SYSTEMS

• Combinational and sequential circuits can be used to create simple

digital systems.

• These are the low-level building blocks of a digital computer.

• Simple digital systems are frequently characterized in terms of

– the registers they contain, and
– the operations that they perform.

• Typically,
– What operations are performed on the data in the registers
– What information is passed between registers
 Register Transfer Language

MICROOPERATIONS (1)

• The operations on the data in registers are called

microoperations.
• The functions built into registers are examples of
microoperations
– Shift
– Load
– Clear
– Increment
– …
 Register Transfer Language

MICROOPERATION (2)

An elementary operation performed (during

one clock pulse), on the information stored
in one or more registers

Registers ALU
(R) (f) 1 clock cycle

R  f(R, R)
f: shift, load, clear, increment, add, subtract, complement,
and, or, xor, …
 Register Transfer Language

ORGANIZATION OF A DIGITAL SYSTEM

• Definition of the (internal) organization of a computer

- Set of registers and their functions

- Microoperations set

Set of allowable microoperations provided

by the organization of the computer

- Control signals that initiate the sequence of

microoperations (to perform the functions)
 Register Transfer Language

REGISTER TRANSFER LEVEL

• Viewing a computer, or any digital system, in this way

is called the register transfer level

• This is because we’re focusing on

– The system’s registers
– The data transformations in them, and
– The data transfers between them.
 Register Transfer Language

REGISTER TRANSFER LANGUAGE

• Rather than specifying a digital system in words, a specific

notation is used, register transfer language

• For any function of the computer, the register transfer

language can be used to describe the (sequence of)
microoperations

• Register transfer language

– A symbolic language
– A convenient tool for describing the internal organization of digital
computers
– Can also be used to facilitate the design process of digital systems.
 Register Transfer Language

DESIGNATION OF REGISTERS

• Registers are designated by capital letters, sometimes

followed by numbers (e.g., A, R13, IR)
• Often the names indicate function:
– MAR - memory address register
– PC - program counter
– IR - instruction register

• Registers and their contents can be viewed and represented in

various ways
– A register can be viewed as a single entity:

MAR

– Registers may also be represented showing the bits of data they contain
 Register Transfer Language

DESIGNATION OF REGISTERS

• Designation of a register
- a register
- portion of a register
- a bit of a register

• Common ways of drawing the block diagram of a register

Register Showing individual bits

R1 7 6 5 4 3 2 1 0

15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields
 Register Transfer

REGISTER TRANSFER

• Copying the contents of one register to another is a register

transfer

• A register transfer is indicated as

R2  R1

– In this case the contents of register R1 are copied (loaded) into

register R2
– A simultaneous transfer of all bits from the source R1 to the
destination register R2, during one clock pulse
– Note that this is a non-destructive; i.e. the contents of R1 are not
altered by copying (loading) them to R2
 Register Transfer

REGISTER TRANSFER

• A register transfer such as

R3  R5

Implies that the digital system has

– the data lines from the source register (R5) to the destination
register (R3)
– Parallel load in the destination register (R3)
– Control lines to perform the action
 Register Transfer

CONTROL FUNCTIONS
• Often actions need to only occur if a certain condition is true
• This is similar to an “if” statement in a programming language
• In digital systems, this is often done via a control signal, called
a control function
– If the signal is 1, the action takes place
• This is represented as:

P: R2  R1

Which means “if P = 1, then load the contents of register R1 into

register R2”, i.e., if (P = 1) then (R2  R1)
 Register Transfer

HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS

Implementation of controlled transfer

P: R2 R1

Block diagram Control P Load

R2 Clock
Circuit
n
R1

t t+1
Timing diagram
Clock

Load
Transfer occurs here

• The same clock controls the circuits that generate the control function
and the destination register
• Registers are assumed to use positive-edge-triggered flip-flops
 Register Transfer

SIMULTANEOUS OPERATIONS

• If two or more operations are to occur

simultaneously, they are separated with commas

P: R3  R5, MAR  IR

• Here, if the control function P = 1, load the contents

of R5 into R3, and at the same time (clock), load the
contents of register IR into register MAR
 Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols Description Examples

Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
Arrow  Denotes transfer of information R2 R1
Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A B, B
A
 Register Transfer

CONNECTING REGISTRS

• In a digital system with many registers, it is impractical to

have data and control lines to directly allow each register
to be loaded with the contents of every possible other
registers

• To completely connect n registers  n(n-1) lines

• O(n2) cost
– This is not a realistic approach to use in a large digital system

• Instead, take a different approach

• Have one centralized set of circuits for data transfer – the
bus
• Have control circuits to select which register is the
source, and which is the destination
 Bus and Memory Transfers

BUS AND BUS TRANSFER

Bus is a path(of a group of wires) over which information is
transferred, from any of several sources to any of several destinations.
From a register to bus: BUS  R
Register A Register B Register C Register D

Bus lines

Register A Register B Register C Register D

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

B1 C1 D 1 B2 C2 D 2 B3 C3 D 3 B4 C 4 D 4

0 0 0 0
4 x1 4 x1 4 x1 4 x1
MUX MUX MUX MUX

x
select
y

4-line bus
 Bus and Memory Transfers

TRANSFER FROM BUS TO A DESTINATION REGISTER

Bus lines

Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D 0 D1 D2 D 3
z E (enable)
Select 2x4
w
Decoder

Three-State Bus Buffers

Normal input A Output Y=A if C=1
High-impedence if C=0
Control input C

Bus line with three-state buffers

Bus line for bit 0
A0
B0
C0
D0

S0 0
Select 1
S1 2
Enable 3
 Bus and Memory Transfers

BUS TRANSFER IN RTL

• Depending on whether the bus is to be mentioned

explicitly or not, register transfer can be indicated as
either
R2 R1
or
BUS R1, R2  BUS

• In the former case the bus is implicit, but in the latter, it is

explicitly indicated
 Bus and Memory Transfers

MEMORY (RAM)
• Memory (RAM) can be thought as a sequential circuits
containing some number of registers
• These registers hold the words of memory
• Each of the r registers is indicated by an address
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data
• Assume the RAM contains r = 2k words. It needs the
following
– n data input lines data input lines
– n data output lines
n
– k address lines
– A Read control line address lines
– A Write control line k
RAM
Read
unit
Write
n
data output lines
 Bus and Memory Transfers

MEMORY TRANSFER
• Collectively, the memory is viewed at the register level as
a device, M.
• Since it contains multiple locations, we must specify
which address in memory we will be using
• This is done by indexing memory references

• Memory is usually accessed in computer systems by

putting the desired address in a special register, the
Memory Address Register (MAR, or AR)
• When memory is accessed, the contents of the MAR get
sent to the memory unit’s address lines
M
Memory Read
AR
unit Write

Data out Data in

 Bus and Memory Transfers

MEMORY READ

• To read a value from a location in memory and load it into

a register, the register transfer language notation looks
like this:
R1  M[MAR]

• This causes the following to occur

– The contents of the MAR get sent to the memory address lines
– A Read (= 1) gets sent to the memory unit
– The contents of the specified address are put on the memory’s output
data lines
– These get sent over the bus to be loaded into register R1
 Bus and Memory Transfers

MEMORY WRITE

• To write a value from a register to a location in memory

looks like this in register transfer language:

M[MAR]  R1

• This causes the following to occur

– The contents of the MAR get sent to the memory address lines
– A Write (= 1) gets sent to the memory unit
– The values in register R1 get sent over the bus to the data input lines
of the memory
– The values get loaded into the specified address in the memory
 Bus and Memory Transfers

SUMMARY OF R. TRANSFER MICROOPERATIONS

A B Transfer content of reg. B into reg. A

AR DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A  constant Transfer a binary constant into reg. A
ABUS R1, Transfer content of R1 into bus A and, at the same time,
R2 ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR  M Memory read operation: transfers content of
memory word specified by AR into DR
M  DR Memory write operation: transfers content of
DR into memory word specified by AR
 Arithmetic Microoperations

MICROOPERATIONS

• Computer system microoperations are of four types:

- Register transfer microoperations

- Arithmetic microoperations
- Logic microoperations
- Shift microoperations
 Arithmetic Microoperations

ARITHMETIC MICROOPERATIONS
• The basic arithmetic microoperations are
– Addition
– Subtraction
– Increment
– Decrement

• The additional arithmetic microoperations are

– Add with carry
– Subtract with borrow
– Transfer/Load
– etc. …

Summary of Typical Arithmetic Micro-Operations

R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
 Arithmetic Microoperations

BINARY ADDER / SUBTRACTOR / INCREMENTER

B3 A3 B2 A2 B1 A1 B0 A0
Binary Adder
FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0

C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

Binary Incrementer
A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0
 Arithmetic Microoperations

ARITHMETIC CIRCUIT
Cin
S1
S0
A0 X0 C0
S1 D0
S0 FA
B0 0 4x1 Y0 C1
1 MUX
2
3
A1 X1 C1
S1 FA D1
S0
B1 0 4x1 Y1 C2
1 MUX
2
3
A2 X2 C2
S1 FA D2
S0
B2 0 4x1 Y2 C3
1 MUX
2
3
A3 X3 C3
S1 D3
S0 FA
B3 0 4x1 Y3 C4
1 MUX
2
3 Cout
0 1

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A
 Logic Microoperations

LOGIC MICROOPERATIONS
• Specify binary operations on the strings of bits in registers
– Logic microoperations are bit-wise operations, i.e., they work on the
individual bits of data
– useful for bit manipulations on binary data
– useful for making logical decisions based on the bit value
• There are, in principle, 16 different logic functions that can
be defined over two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

• However, most systems only implement four of these

– AND (), OR (), XOR (), Complement/NOT
• The others can be created from combination of these
 Logic Microoperations

LOGIC MICROOPERATIONS
• For example, the exclusive-OR microoperation with the contents of two
registers R1 and R2 is symbolized by the statement P: R1 ← R1 ⊕ R2

• It specifies a logic microoperation to be executed on the individual bits of

the registers provided that the control variable P = 1. As a numerical example,
assume that each register has four bits. Let the content of R1 be 1010 and the
content of R2 be 1100.

• The exclusive-OR microoperation stated above symbolizes the following

logic computation:

• The content of R1, after the execution of the microoperation, is equal to the
bit-by-bit exclusive-OR operation on pairs of bits in R2 and previous values of
R1.

• The logic microoperations are seldom used in scientific computations, but they
are very useful for bit manipulation of binary data and for making logical
decisions.
 Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

• List of Logic Microoperations
- 16 different logic operations with 2 binary vars.
n
- n binary vars → 2 2 functions

• Truth tables for 16 functions of 2 variables and the

corresponding 16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's
 Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

Ai
0
Bi

1
4X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement
 Logic Microoperations
HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

• The hardware implementation of logic microoperations requires that logic gates

be inserted for each bit or pair of bits in the registers to perform the required logic
function.

• Although there are 16 logic microoperations, most computers use only 4:

AND, OR, XOR (exclusive-OR), and complement from which all others can be derived.

• Figure (Previous Slide) shows one stage of a circuit that generates the four
basic logic microoperations.

• It consists of four gates and a multiplexer. Each of the four logic operations is
generated through a gate that performs the required logic.

• The outputs of the gates are applied to the data inputs of the multiplexer. The two
selection inputs S1 and S0 choose one of the data inputs of the multiplexer and direct
its value to the output.

• The diagram shows one typical stage with subscript i. For a logic circuit with n
bits, the diagram must be repeated n times for i = 0, 1, 2, ... , n - 1.

• The selection variables are applied to all stages. The function table in Fig. lists the
logic microoperations obtained for each combination of the selection variables.
 Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

• Logic microoperations can be used to manipulate individual
bits or a portions of a word in a register.

• They can be used to change bit values, delete a group of bits,

or insert new bit values into a register.

• The following examples show how the bits of one register

(designated by A) are manipulated by logic microoperations as
a function of the bits of another register (designated by B).

• In a typical application, register A is a processor register and

the bits of register B constitute a logic operand extracted from
memory and placed in register B.
 Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

• Consider the data in a register A. The bit data pattern of another

register, B (logic operand), is used to modify the contents of A.

• The different operations are given below:

– Selective-set AA+B
– Selective-complement AAB
– Selective-clear A  A • B’
– Mask AA•B
– Clear AAB
– Insert A  (A • B) + C
– Compare AAB
– ...
 Logic Microoperations

SELECTIVE SET

• In a selective set operation, the bit pattern in B is used to set

certain bits in A

1100 At
1010 B (logic operand)
1110 At+1 (A  A + B)

• If a bit in B is set to 1, that same position in A gets set to 1,

otherwise that bit in A keeps its previous value
 Logic Microoperations

SELECTIVE COMPLEMENT

• In a selective complement operation, the bit pattern in B is

used to complement certain bits in A

1100 At
1010 B
0110 At+1 (A  A  B)

• If a bit in B is set to 1, that same position in A gets

complemented from its original value, otherwise it is
unchanged
 Logic Microoperations

SELECTIVE CLEAR

• In a selective clear operation, the bit pattern in B is used to

clear certain bits in A

1100 At
1010 B
0100 At+1 (A  A  B’)

• If a bit in B is set to 1, that same position in A gets set to 0,

otherwise it is unchanged
 Logic Microoperations

MASK OPERATION
• In a mask operation, the bit pattern in B is used to clear certain
bits in A

1100 At
1010 B
1000 At+1 (A  A  B)

• If a bit in B is set to 0, that same position in A gets set to 0,

otherwise it is unchanged.
• The mask operation is similar to the selective-clear operation
except that the bits of A are cleared only where there are
corresponding 0's in B.
• The mask operation is an AND micro operation as seen from the
above example.
• The mask operation is more convenient to use than the selective
clear operation since most computers provide an AND instruction,
and few provide an instruction that executes the microoperation
for selective-clear.
 Logic Microoperations

INSERT OPERATION
• An insert operation is used to introduce a specific bit pattern
into A register, leaving the other bit positions unchanged
• This is done as
– A mask operation to clear the desired bit positions, followed by
– An OR operation to introduce the new bits into the desired
positions
– Example
» Suppose you wanted to introduce 1010 into the low order
four bits of A: 1101 1000 1011 0001 A (Original)
1101 1000 1011 1010 A (Desired)

» 1101 1000 1011 0001 A (Original)

1111 1111 1111 0000 Mask
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits (OR)
1101 1000 1011 1010 A (Desired)
 Logic Microoperations

CLEAR OPERATION
• In a clear operation, if the bits in the same position in A and B
are the same, they are cleared in A, otherwise they are set in A

• The clear operation compares the words in A and B and

produces an all 0' s result if the two numbers are equal.

• This operation is achieved by an exclusive-OR microoperation as

shown by the following example:

• The all-0's result is then checked to determine if the two

numbers were equal.
 Shift Microoperations

Shift Microoperations

• Shift microoperations are used for serial transfer of data. They are also
used in conjunction with arithmetic, logic, and other data-processing
operations.

• The contents of a register can be shifted to the left or the right. At the same
time that the bits are shifted, the first flip-flop receives its binary information
from the serial input.

• During a shift-left operation the serial input transfers a bit into the rightmost
position.

• During a shift-right operation the serial input transfers a bit into the leftmost
position.

• The information transferred through the serial input determines the type of
shift.

• There are three types of shifts: logical, circular, and arithmetic.

 Shift Microoperations

LOGICAL SHIFT
• In a logical shift the serial input to the shift is a 0.

• A right logical shift operation:

0

• A left logical shift operation:

0

• In a Register Transfer Language, the following notation is used

– shl for a logical shift left
– shr for a logical shift right
– Examples:
» R2  shr R2
» R3  shl R3
 Shift Microoperations

CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted out
of the other end of the register.

• A right circular shift operation:

• A left circular shift operation:

• In a RTL, the following notation is used

– cil for a circular shift left
– cir for a circular shift right
– Examples:
» R2  cir R2
» R3  cil R3
 Arithmetic Shift

• An arithmetic shift is a microoperation that shifts a

signed binary number to the left or right.

• An arithmetic shift-left multiplies a signed binary

number by 2

• An arithmetic shift-right divides the number by 2

• Arithmetic shifts must leave the sign bit unchanged

since the sign of the number remains the same.
 Arithmetic Shift

• The leftmost bit in a register holds the sign bit, and the
remaining bits hold the number.

• The sign bit is 0 for positive and 1 for negative. Negative

numbers are in 2's complement form.

• Bit Rn-1 in the leftmost position holds the sign bit. Rn-2 is the most
significant bit of the number and R0 is the least significant bit.
 Arithmetic Shift

• The arithmetic shift-right leaves the sign bit unchanged

and shifts the number (including the sign bit) to the right.
Thus Rn-1 remains the same, Rn-2 receives the bit from Rn-1 and
so on for the other bits in the register. The bit in R 0 is lost.

• The arithmetic shift-left inserts a 0 into R0, and shifts all

other bits to the left. The initial bit of R n-1 is lost and replaced
by the bit from Rn-2. A sign reversal occurs if the bit in Rn-
1 changes in value after the shift. This happens if the
multiplication by 2 causes an overflow.
 Arithmetic Shift
• An overflow occurs after an arithmetic shift left if initially, before
the shift, Rn-1 is not equal to Rn-2.

• An overflow flip-flop V, can be used to detect an arithmetic

shift-left overflow. V = Rn-1 ⊕ Rn-2

• If V = 0, there is no overflow, but if V = 1, there is an overflow

and a sign reversal after the shift.

• V must be transferred into the overflow flip-flop with the same

clock pulse that shifts the register.
 Shift Microoperations

ARITHMETIC SHIFT
• An left arithmetic shift operation must be checked for the
overflow
0
sign
bit

Before the shift, if the leftmost two

V bits differ, the shift will result in an
overflow

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3
HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS
 HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

• A combinational circuit shifter can be constructed with multiplexers as

shown in Fig (previous slide).
• The 4-bit shifter has four data inputs, A0 through A3, and four data
outputs, H0 through H3.
• There are two serial inputs, one for shift left (IL) and the other for
shift right (IR).
• When the control input S = 0, the input data are shifted right.
• When S = 1, the input data are shifted left.
• The function table in Fig. (previous slide) shows which input goes to
each output after the shift.
• A shifter with n data inputs and outputs requires n multiplexers.
• The two serial inputs can be controlled by another multiplexer to
provide the three possible types of shifts.
 ARITHMETIC LOGIC SHIFT UNIT (ALU)

• Instead of having individual registers performing the

microoperations directly, computer systems employ a number of
storage registers connected to a common operational unit called an
arithmetic logic unit, abbreviated ALU.

• To perform a microoperation, the contents of specified registers are

placed in the inputs of the common ALU.

• The ALU performs an operation and the result of the operation is

then transferred to a destination register.

• The ALU is a combinational circuit so that the entire register

transfer operation from the source registers through the ALU and
into the destination register can be performed during one clock
pulse period.
 ARITHMETIC LOGIC SHIFT UNIT (ALU)

• The shift microoperations are often performed in a separate unit, but

sometimes the shift unit is made part of the ALU.

• The arithmetic, logic, and shift circuits can be combined into one ALU with
common selection variables.

• One stage of an arithmetic logic shift unit (ALU) is shown in Fig. (next
slide. The subscript i designates a typical stage that is a part of Circuit.

• Inputs Ai and Bi are applied to both the arithmetic and logic units.
 ARITHMETIC LOGIC SHIFT UNIT (ALU)

• A particular microoperation is selected with inputs S1 and S0. A 4 x 1

multiplexer at the output chooses between an arithmetic output in E i and a logic
output in Hi.

• The data in the multiplexer are selected with inputs S3 and S2.

• The other two data inputs to the multiplexer receive inputs Ai-1 for the shift-
right operation and Ai+1 for the shift-left operation.

• The first eight are arithmetic operations and are selected with S 3S2 = 00. The
next four are logic operations and are selected with S 3S2 = 01. The last two
operations are shift operations and are selected with S3S2 = 10 and 11.
 ALU

ARITHMETIC LOGIC SHIFT UNIT (ALU)

S3
S2 Ci
S1
S0

Arithmetic D i
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi Circuit
Ai
Ai-1 shr
Ai+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F = A + B + 1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with
borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=AB XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F