Chapter 1

Digital Systems and Numbering Systems

Representation
 Digital Systems and Binary
Numbers
 Digital age and information age
 Digital computers
• General purposes
• Many scientific, industrial and commercial applications
• Digital systems
• Telephone switching exchanges
• Digital camera
• Electronic calculators, PDA's
• Digital TV
• Discrete information-processing systems
• Manipulate discrete elements of information
• For example, {1, 2, 3, …} and {A, B, C, …}…
Analog and Digital Signal
• Analog system
• The physical quantities or signals may vary continuously over
a specified range.
• Digital system
• The physical quantities or signals can assume only discrete
values.
X(t) X(t)

t t
Analog signal Digital signal
Binary Digital Signal
• An information variable represented by physical quantity.
• For digital systems, the variable takes on discrete values.
• Two level, or binary values are the most prevalent values.
• Binary values are represented abstractly by: V(t)
• Digits 0 and 1
• Words (symbols) False (F) and True (T) Logic 1
• Words (symbols) Low (L) and High (H)
• And words On and Off undefine

• Binary values are represented by values Logic 0 or

ranges of values of physical quantities. t
Binary digital signal
Decimal Number System
• Base (also called radix) = 10
• 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }

2 1 0 -1 -2
• Digit Position
• Integer & fraction 5 1 2 7 4

• Digit Weight 100 10 1 0.1 0.01

• Weight = (Base) Position

500 + 10 + 2 + 0.7 + 0.04

• Magnitude
d2*B2+d1*B1+d0*B0+d-1*B-1+d-2*B-2
• Sum of all “Digit x Weight” products
(512.74)10
• Formal Notation
Octal Number System
• Base = 8
• 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }
64 8 1 1/8 1/64
• Digit Weights and Positions 5 1 2 7 4
Position
• Weight = (Base)
2 1 0 -1 -2

5 *82+1 *81+2 *80+7 *8-1+4 *8-2

• Magnitude =(330.9375)10
• Sum of “Digit x Weight” products

(512.74)8
• Formal Octal Notation
Binary Number System
• Base = 2
• 2 digits { 0, 1 }, called binary digits or “bits”

4 2 1 1/2 1/4
• Weights
• Weight = (Base) Position 1 0 1 0 1
2 1 0 -1 -2

• Magnitude 2 1 0
1 *2 +0 *2 +1 *2 +0 *2 +1 *2
-1 -2

• Sum of “Bit x Weight” products

=(5.25)10

• Formal Notation: (101.01)2

• Groups of bits
4 bits = Nibble 1011
8 bits = Byte 11000101
Hexadecimal Number System
• Base = 16
• 16 digits: { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }

256 16 1 1/16 1/256

• Weights
• Weight = (Base) Position 1 E 5 7 A
2 1 0 -1 -2

1 *162+14 *161+5 *160+7 *16-1+10 *16-2

• Magnitude =(485.4765625)10
• Sum of “Digit x Weight” products

(1E5.7A)16
• Formal Notation:
Powers of 2
n 2n n 2n
0 20=1 8 28=256
1 21=2 9 29=512
2 22=4 10 210=1024 Kilo

3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega

6 26=64 30 230=1G Giga

7 27=128 40 240=1T Tera

Addition
• Decimal Addition

1 1 Carry
5 5
+ 5 5

1 1 0
= Ten ≥ Base
 Subtract a Base
Binary Addition
• Column Addition

1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23

1 0 1 0 1 0 0 = 84

≥ (2)10
Binary Subtraction
• Borrow a “Base” when needed
1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23

0 1 1 0 1 1 0 = 54
Binary Multiplication
• Bit by bit
1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1

1 1 1 0 0 1 1 0
Number Base Conversions
Evaluate
Magnitude
Octal
(Base 8)

Evaluate
Magnitude
Decimal Binary
(Base 10) (Base 2)

Hexadecimal
(Base 16)
Evaluate
Magnitude
Decimal Integer to Binary
Conversion
• Divide the number by the ‘Base’ (=2)
• Take the remainder (either 0 or 1) as a binary digit
• Take the quotient and repeat the division
• Each time, the new remainder gives a more significant binary
digit
Example: (13)10
Quotient Remainder Coefficient
13/ 2 = 6 1 d0 = 1
6 /2= 3 0 d1 = 0
3 /2= 1 1 d2 = 1
1 /2= 0 1 d3 = 1
Answer: (13)10 = (d3 d2 d1 d0)2 = (1101)2

MSB LSB
Decimal Fraction to Binary
Conversion
• Multiply the fractional number by the ‘Base’ (=2)
• Take the integer part (either 0 or 1) as a binary digit
• Take the fractional part of the result and repeat the multiplication
• Each time, the new integer part gives a less significant binary digit

Example: (0.625)10
Integer Fraction Coefficient
0.625 * 2 = 1 . 25 a-1 = 1
0.25 * 2 = 0 . 5 a-2 = 0
0.5 *2= 1 . 0 a-3 = 1
Answer: (0.625)10 = (0.d-1 d-2 d-3)2 = (0.101)2

MSB LSB
Decimal to Octal Conversion
Example: (175)10
Quotient Remainder Coefficient
175 / 8 = 21 7 d0 = 7
21 / 8 = 2 5 d1 = 5
2 /8= 0 2 d2 = 2
Answer: (175)10 = (d2 d1 d0)8 = (257)8

Example: (0.3125)10
Integer Fraction Coefficient
0.3125 * 8 = 2 . 5 d-1 = 2
0.5 *8= 4 . 0 d-2 = 4
Answer: (0.3125)10 = (0.d-1 d-2 d-3)8 = (0.24)8
Binary − Octal Conversion
• 8 = 23 Octal Binary
• Each group of 3 bits (starting from 0 000
the fractional point) represents an
1 001
octal digit should assume
zeros in the empty 2 010
digit positions!
Example: 3 011

( _ 1 0 1 1 0 . 0 1 _ )2 4 100
5 101
6 110
( 2 6 . 2 )8 7 111

Works both ways (Binary to Octal & Octal to Binary)

Binary − Hexadecimal Conversion
• 16 = 24 Hex Binary
0 0000
• Each group of 4 bits (starting from 1 0001

the fractional point) represents a 2

3
0010
0011
hexadecimal digit
should assume 4 0100
zeros in the empty 5 0101
digit positions! 6 0110
Example: 7 0111
8 1000
( _ _ _1 0 1 1 0 . 0 1_ _ )2 9 1001
A 1010
B 1011
C 1100
D 1101
(1 6 . 4 )16 E 1110
F 1111

Works both ways (Binary to Hex & Hex to Binary)

Octal − Hexadecimal Conversion
• Convert to Binary as an intermediate step
Example:
( 2 6 . 2 )8
should assume
zeros in the empty should assume
digit positions! zeros in the empty
digit positions!
( _ _ 0 1 0 1 1 0 . 0 1 0 _ )2

( 1 6 . 4 )16

Works both ways (Octal to Hex & Hex to Octal)

Decimal, Binary, Octal and
Hexadecimal
Decimal Binary Octal Hex
00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
Summary of Logic Gates

Figure 2.5 Digital logic gates 22

Summary of Logic Gates

Figure 2.5 Digital logic gates 23

 Binary Adder
Half Adder x S
● Adds 1-bit plus 1-bit y HA C
● Produces Sum and Carry
x
+ y
───
x y C S C S
0 0 0 0
0 1 0 1
x S
1 0 0 1
1 1 1 0
y C
 Binary Adder
Full Adder x S
● Adds 1-bit plus 1-bit plus 1-bit y FA C
z
● Produces Sum and Carry
x
+ y
y + z
x y z C S
───
0 0 0 0 0 0 1 0 1 C S
0 0 1 0 1 x 1 0 1 0
0 1 0 0 1 z
S = xy'z'+x'yz'+x'y'z+xyz = x  y  z
0 1 1 1 0
y
1 0 0 0 1
1 0 1 1 0 0 0 1 0
1 1 0 1 0 x 0 1 1 1
1 1 1 1 1 z
C = xy + xz + yz
 Binary Adder
Full Adder
x S
y HA HA

z C

Figure 4.8 - Implementation of full adder with two half adders and an
OR gate
Decoders
Binary Decoder
Only one
● Example: 2-bit Binary Number lamp will
turn on

0 1
x1 0
Binary
0 Decoder 0
x0 0

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Decoders
•

● We say that only one output is active

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Decoders
2-to-4 Line Decoder
YD33

D0 Y22
D
D1

Decoder
A

Binary
D2 Y11
D
B D3
Y00
D

A B D0 D1 D2 D3
A
I1
0 0 1 0 0 0 B
I0
0 1 0 1 0 0
D3  AB D2  AB'
1 0 0 0 1 0
1 1 0 0 0 1 D1  A' B D0  A' B '
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Decoders
 3-to-8 Line Decoder

The output whose value is equal to 1 represents the minterm equivalent of the
binary number currently available in the input lines.

Eastern Mediterranean University 30 / 65

Decoders
3-to-8 Line Decoder

D0
D1
D2

Decoder
Binary
z D3
y D4
x D5
D6
D7

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Decoders
“Enable” Control
YD33
D0
D1 Y

Decoder
I1 D2

Binary
2

I0 D2
Y
D11
E D3
Y
D00
E I1 I 0 D0 D1 D2 D3
0 x x 0 0 0 0
I1
1 0 0 1 0 0 0 I0
1 0 1 0 1 0 0 E

1 1 0 0 0 1 0
1 1 1 0 0 0 1
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Encoders
Put “Information” into code
Only one
Binary Encoder switch
● Example: 4-to-2 Binary Encoder should be
activated
at a time

x1
x3 x2 x1 y1 y0
y1 0 0 0 0 0
x2 Binary
0 0 1 0 1
Encoder
y0 0 1 0 1 0
x3 1 0 0 1 1

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Encoders
Octal-to-Binary Encoder (8-to-3)
I7
I7 I6 I5 I4 I3 I2 I1 I0 Y2 Y1 Y0 I6
0 0 0 0 0 0 0 1 0 0 0

Encoder
I5 Y2

Binary
0 0 0 0 0 0 1 0 0 0 1 I4 Y1
0 0 0 0 0 1 0 0 0 1 0
I3 Y0
0 0 0 0 1 0 0 0 0 1 1
0 0 0 1 0 0 0 0 1 0 0 I2
0 0 1 0 0 0 0 0 1 0 1 I1
0 1 0 0 0 0 0 0 1 1 0 I7
I0
1 0 0 0 0 0 0 0 1 1 1 I6 Y2
I5
Y2 I 7  I 6  I 5  I 4 I4
I3 Y1
Y1 I 7  I 6  I 3  I 2 I2
I1
Y0 I 7  I 5  I 3  I1 I0 Y0
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Encoder / Decoder Pairs

Binary Binary
Encoder Decoder

I7 Y7
I6 Y6
I5 Y5
Y2 I2
I4 Y4
Y1 I1
I3 Y3
Y0 I0
I2 Y2
I1 Y1
I0 Y0
Multiplexers - Select binary information from one of many input
lines and direct it to a single output line.

- The selection of a particular input line is controlled

by a set of selection lines.

S1 S0 Y
I0
0 0 I0 I1 MUX
I1 Y
0 1 I2
1 0 I2 I3 S1 S0
1 1 I3
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Multiplexers
• 2-to-1 MUX
I0
I0 Y
MUX Y
I1 I1
S
S
• 4-to-1 MUX
I0

I1
Y
I0 I2

I1 MUX I3
Y
I2
I3 S1 S0
S1 S0 37 / 65
DeMultiplexers
Y3
DeMUX Y2
I
Y1
S1 S0 Y0

Y3

Y2 S1 S0 Y3 Y2 Y1 Y0
I
Y1 0 0 0 0 0 I
Y0
0 1 0 0 I 0
1 0 0 I 0 0
S1 1 1 I 0 0 0
S0
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DeMultiplexers/Decoders
A decoder with enable input can function as a 1-to-4 demux when E is
taken as a data input line and I1 and I0 are taken as selection inputs.

Y3 Y3

Decoder
I1

Binary
Y Y2
I DeMUX 2 I0
Y1 Y1
S1 S0 Y0 E
Y0
E I1 I 0 Y3 Y2 Y1 Y0
S1 S0 Y3 Y2 Y1 Y0 0 x x 0 0 0 0
0 0 0 0 0 I 1 0 0 0 0 0 1
0 1 0 0 I 0 1 0 1 0 0 1 0
1 0 0 I 0 0 1 1 0 0 1 0 0
1 1 I 0 0 0 1 1 1 1 0 0 0

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 Sequential Circuits

• Asynchronous
Inputs Outputs
Combinational
Circuit
Memory
Elements

• Synchronous

Inputs Outputs
Combinational
Circuit
Flip-flops
Clock

40
 Flip-Flops

• Edge-Triggered D Flip-Flop
D Q

Q Positive
Edge
CLK

D
Flip-Flop Characteristic Tables

D Q D Q(t+1)
0 0 Reset
Q 1 1 Set

J K Q(t+1)
J Q 0 0 Q(t) No change
0 1 0 Reset
K Q 1 0 1 Set
1 1 Q’(t) Toggle

T Q T Q(t+1)
0 Q(t) No change
Q 1 Q’(t) Toggle
 Registers

Group of D Flip-Flops I0 D Q A0
Synchronized (Single Clock) R
Store Data
I1 D Q A1

I2 D Q A2

I3 D Q A3
CLK
R
Clear_b
 Binary Storage and Registers
• Registers
• A binary cell is a device that possesses two stable states and is capable of storing one of the two states.
• A register is a group of binary cells. A register with n cells can store any discrete quantity of information that contains n bits.

• A binary cell n cells 2n possible states

• Two stable state
• Store one bit of information
• Examples: flip-flop circuits, ferrite cores, capacitor
• A register
• A group of binary cells
• AX in x86 CPU
• Register Transfer
• A transfer of the information stored in one register to another.
• One of the major operations in digital system.
• An example in next slides.

• A register that goes through a prescribed sequence of states upon the application of input
pulses is called a counter.
A Digital Computer Example
Memory

Control
CPU unit Datapath

Inputs: Keyboard, Outputs: CRT,

mouse, modem, LCD, modem,
Input/Output
microphone speakers

Synchronous or
Asynchronous?
Transfer of information

Figure 1.1 Transfer of information among register

Transfer of information
• The other major
component of a digital
system
• Circuit elements to
manipulate individual
bits of information
• Load-store machine
LD R1;
LD R2;
ADD R3, R2, R1;
SD R3;

Figure 1.2 Example of binary information processing