Scribd
Upload
27 views

Data Processing Instructions (1)

Uploaded by

KISHOORE
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
27 views

Data Processing Instructions (1)

Uploaded by

KISHOORE
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 15

Introduction to the ARM

Instruction Set

Data Processing Instructions


ARM instruction set:
• ARM instructions process data held in registers and only access
memory with load and store instructions.
• ARM instructions commonlyARMtake two or three operands.
instruction set

Data processing
instructions

Data transfer
instructions

Block transfer
instructions

Branching instructions

Multiply instructions
Data processing instruction:
• These instruction manipulate data within the registers.
• The instructions are-move instruction, logical instructions,
comparison instruction and multiply instruction.
• Move and logical instruction update carry flag C, negative flag and
zero flag.
Move instruction:
• It copies N or immediate value to the destination register Rd.
• The instruction is used for setting initial values and transferring data between the registers.
• Syntax:<instruction>{<cond>}{s} Rd, N

MOV Move a 32-bit value into a register Rd=N


MVN Move the NOT of the 32 bit value into a register Rd=~N

• Example:
PRE r5=5
r7=8
MOV r7,r5 ; let r7 = r5
POST r5=5
r7=5
Barrel shifter:
• A unique and powerful feature of the ARM processor is the ability to shift the 32-bit binary
pattern in one of the source registers left or right by a specific number of positions before
it enters the ALU.
• Pre-processing or shift occurs within the cycle time of the instruction. This is particularly useful
for loading constants into a register and achieving fast multiplier or division by a power of 2.
Barrel shifter operation:
• The logical shift(LSL) to register Rm before moving it to the destination register. The MOV
instruction copies the shift operator result into register Rd. N represents the result of the LSL
operation.
PRE r5=5
r7=8
MOV r7,r5,LSL #2 ; let r7=r5*4=(r5<<2)
POST r5=5
r7=20
Logical shift by 1:
Barrel shifter operation:

x represents the register being shifted and y represents the shift amount.
Barrel shifter example:
PRE cpsr=nzcvqiFt_USER
r0=0x00000000
r1=0x80000004
MOVS r0, r1, LSL #1
POST cpsr=nzCvqiFt_USER
r0=0x00000008
r1=0x80000004
Arithmetic instruction:
• The arithmetic instruction implement addition and subtraction of 32 bit signed and
unsigned values.
• Syntax: <instruction>{<contd>}{S} Rd, Rn, N
ADC Add two 32-bit values and carry Rd=Rn+ N+ carry
ADD Add two 32-bit values Rd=Rn+ N
RSB Reserve subtract of two 32-bit values Rd=N-Rn

RSC Reserve subtract with carry of two 32-bit value Rd=N-Rn-!(carry flag)

SBC Subtract with carry of two 32-bit values Rd=Rn-Rn-!(carry flag)

SUB Subtract two 32-bit values Rd=Rn-N

N is the result of the shifter operation.


Examples for subtractions:
• Simple subtraction:
PRE r0=0x00000000
r1=0x00000002
r2=0x00000001
SUB r0, r1,r2
POST r0=0x00000001
• SUBS is used in decrementing loop counters:

PRE cpsr=nzcvqiFt_USER

R1=0x00000001

SUBS r1, r1, #1

POST nZCvqiFt_USER

r1=0x00000000
Logical instructions:
• Performs bitwise logical operations on the two source registers
• Syntax: <instruction>{<cond>}{S} Rd, Rn,N

AND Logical bitwise of 32 bit values Rd=Rn&N


ORR Logical bitwise OR of 32 bit values Rd=Rn|N
EOR Logical exclusive OR of two 32 bit values Rd=Rn^N
BIC Logical bit clear(AND NOT) Rd=Rn&~N

• Ex. For logical OR operation:


PRE r0=0x00000000
r1=0x02040608
r2=0x10305070
ORR r0, r1, r2
POST r0=0x12345678
Comparison instructions:
• Used to compare or test a register with a 32 bit value.
• These instructions update the cpsr register according to the result, but do not effect the other
registers.
• After the bit is set, the information can be used to change the program flow by using conditional
execution.
• Syntax:<instruction>{<cond>}Rn, N

CMN Compare negated Flags set as a result of RN+N


CMP Compare Flags set as a result of RN-N
TEQ Test for quality of two 32-bit Flags set as a result of RN^N
values
TST Test bits of a 32 bit value Flags set as a result of RN&N
Example for CMP comparison
instruction:
PRE cpsr=nzcvqiFt_USER
r0=4
r9=4
CMP r0,r9
POST cpsr=nZcvqiFt_USER

You might also like