CSE2003– Computer Architecture and

Organization
Dr. Swagat Kumar Samantaray
School of Computing Science & Engineering
VIT Bhopal University
 INSTRUCTIONS FOR CLASS

COURSE DETAIL
Course Code :CSE2003
Course Type :LT
Number of Unit:6
Credits:4

COURSE OBJECTIVES:
• To provide basic concepts of computer architecture
and organization
• To impart the knowledge of implementation of
arithmetic operations in the computer.
• To develop a deeper understanding of the hardware
environment upon which all processing are carried
out.
• To provide knowledge about internals of memory
system, interfacing techniques and subsystem
devices.

2
 MODULE-1-2

Introduction to computer systems - Overview of Organization and Architecture -Functional

components of a computer -Registers and register files-Interconnection of components-
Organization of the von Neumann machine and Harvard architecture-Performance of processor
Introduction to ISA (Instruction Set Architecture)-Instruction formats- Instruction types and
addressing modes- Instruction execution (Phases of instruction cycle)- Assembly language
programming-Subroutine call and return mechanisms-Single cycle
Data path design-Introduction to multi cycle data path-Multi cycle Instruction execution.
Tutorial on Assembly Language Programming

Data Representation and Computer Arithmetic

Fixed point representation of numbers-algorithms for arithmetic operations: addition- subtraction
- multiplication – division (restoring and non-restoring)- Floating point representation with IEEE
standards and algorithms for common arithmetic operations –
conversion between integer and real numbers.
Tutorial on Fixed and floating point arithmetic operations

3
 MODULE-3

Memory System
Memory systems hierarchy-Main memory organization-Types of Main memory : SRAM ,
DRAM and its characteristics and performance – latency –cycle time -bandwidth- memory
interleaving
Cache memory: Address mapping-line size-replacement and policies- coherence
Virtual memory: Paging (Single level and multi-level) – Page Table Mapping – TLB
Reliability of memory systems: Error detecting and error correcting systems.
Tutorial on design aspects of memory system

4
 MODULE-
4-5-6
External storage systems and Pipelining
Organization and structure of disk drives: Electronic- magnetic and optical technologies, RAID
Architectures.
Pipelining – Data Hazards – Instructional hazards – Performance Case Study on RAID
architectures used in Industry

Interfacing and Communication

I/O fundamentals: handshaking, buffering - I/O techniques: programmed I/O, interrupt-driven
I/O, DMA- Interrupt structures: vectored and prioritized-interrupt overhead- Buses: Bus
Protocols -Arbitration

Multiprocessor Architectures
Introduction – Characteristics – Multi core Architecture – Parallel Processing - Flynn
Classification – Inter Connection Structures –Memory Organization

5
 Text Books

W. Stallings, “Computer organization and

Carl Hamacher, Zvonko Vranesic, Safwat Zaky, architecture: Designing for Performance”,
“Computer organization”, Mc Graw Hill, Fifth Prentice-Hall, 9th edition, 2013, ISBN: 978-
edition , 2011, ISBN: 9781259005275 9332518704

6
 Reference Books

• David A. Patterson and John L. Hennessy “Computer

Organization and Design-The Hardware/Software Interface”,
Morgan Kaufmann, 5th edition, 2011.
• James P Hayes, “Computer Architecture and Organization”,
Mc Graw Hill, 3rd Edition, 2012, ISBN:9781259028564.

7
 “
What is Computer Architecture and Organization?

8
 “
⊡ What is Computer Organization ?

The Operational unit of Computer and their Interconnection .

9
 Two
Separate
Layers
Partition-I Partition-II

Low Level Interface

Hardware
High level
Software

10
 APPLICATION
HARDWARE SOFTWARE
SYSTEM
SOFTWARE

11
 Computer Architecture Computer Organization

⊡ The architecture of a computer ⊡ Organization of a computer

system can be considered as a system defines the way system
catalogue of tools or attributes is structured so that all those
that are visible to the user such catalogued tools can be used.
as instruction sets, number of ⊡ Physical Aspects of Computer
bits used for data, addressing System
techniques, etc.
⊡ Computer organization is used to
⊡ Logical Aspects of a Computer study the basic computer
System hardware structure and behavior
⊡ The architecture refers to those of digital Computers. It answers
attributes of the system visible the question,
to the programmer ⊡ “ How operations are carried out
⊡ “How fast we can run our in Computer?”
system hardware.”

12
 Benefits and Importance of studying Computer Organization and
Architecture.
• COA is necessary to understand the designing and functioning of the various components to
process information digitally.
• COA study focuses on the Interface between hardware and software.
• COA tells the way of operating hardware components and their interconnections in Computer.
• COA provides an organized way of working with different hardware components together in one
place.
• Computer organization says, “How to do?” and computer architecture says, “What to do?”.
• COA provides detailed knowledge of the system components, Circuit designs, Structure of
Instruction, Computer arithmetic, Assembly programming, processor control, logical design, and
performance method.
• COA proves that different computer organizations can use the same architecture. For example,
Intel and AMD make X86 CPU (processor is of 86 bits), but INTEL makes its organization on X86,
and AMD makes its own, which means the processor is 86 bits. Still, internal circuits, working,
interconnections will be different.
• COA subject helps the computer engineers to understand the components functioning, working,
characteristics, performance, and their interactions .

13
 EVALUTION PATTERN

No of Tutorial- No of Attendance
No of Quiz-5 No of Activity-
5 Assignment-5

Mid Term Term End

Examinations Examinations

14
 1

Introduction to Computer
Architecture

Introduction to computer systems - Overview of Organization and Architecture -

Functional components of a computer -Registers and register files-Interconnection of
components- Organization of the von Neumann machine and Harvard architecture-
Performance of processor

15
DIGITAL COMPUTER Fast electronic calculating machine that accepts
digitized input information , process it according to a
list of internally stored instructions and produces the
resulting output Information.

Program Memory

TYPES COMPUTER

Desktop Notebook Super

Workstations Mainframes Servers
Computer Computer Computer

16
 Mainframes
Desktop Computer Workstations

Notebook Computer Super Computer Servers

17
 Computer Types

Digital
Computer

MICRO Mini
Computer Computer

Super
Mainframes
Computers

18
 Microcomputer

• A microcomputer is a small, relatively inexpensive computer with

a microprocessor as its central processing unit (CPU).

• The Commodore 64, also known as the C64 or the CBM 64, is an 8-bit home
computer introduced in January 1982 by Commodore International.

Ref: InfoWorld, 1 February 1982

19
 Mini Computer

A minicomputer, or colloquially mini, is a class of smaller general purpose computers that

developed in the mid-1960s[1]

The PDP-8 is a 12-bit minicomputer that was produced

by Digital Equipment Corporation (DEC).
It was the first commercially successful minicomputer,

1. Henderson, Rebecca M.; Newell, Richard G., eds. (2011). Accelerating Energy Innovation: Insights from Multiple Sectors. Chicago:
University of Chicago Press. p. 180. ISBN 978-0226326832.

20
 Mainframes

A mainframe computer, informally called

a mainframe or big iron,[1] is a computer used
primarily by large organizations for critical
applications like
• bulk data processing for tasks such
as censuses,
• industry and consumer statistics,
• enterprise resource planning,
• large-scale transaction processing.

Vance, Ashlee (July 20, 2005).

"IBM Preps Big Iron Fiesta". The Register.
Retrieved October 2, 2020.

A single-frame IBM z15 mainframe. Larger capacity

models can have up to four total frames

21
 Super Computer

• A supercomputer is a computer with a high level of performance as compared to a

general-purpose computer.
• The performance of a supercomputer is commonly measured in floating-
point operations per second (FLOPS) instead of million instructions per second (MIPS).

The IBM Blue Gene/P supercomputer "Intrepid"

at Argonne National Laboratory runs 164,000
processor cores using normal data center air
conditioning, grouped in 40 racks/cabinets
connected by a high-speed 3D torus network.[1][2]

Top 5 supercomputers in the world

1. "IBM Blue gene announcement". 03.ibm.com. 26 June 2007. Retrieved 9 June 2012.
2. "Intrepid". Argonne Leadership Computing Facility. Argonne National Laboratory. Archived from the original on 7 May 2013.
Retrieved 26 March 2020.

22
 India Super Computer

India's Journey of Supercomputers began in the '80s when the USA refused to give supercomputer to
India.
The father of India’s supercomputer
first supercomputer PARAM 8000

In response, the Indian government set up the

Centre for Development of Advanced Computing
(C-DAC) with the mission of building an
indigenous supercomputer.
Prathush is India’s fastest supercomputer with
3.7 petaflops high performance

The supercomputer is at the Indian Institute of

Meteorology, Pune

Prof.Vijay Pandurang Bhatkar

23
Garry Kasparov

24
https://www.youtube.com/watch?v=KF6sLCeBj0s

On May 11, 1997, chess grandmaster Garry Kasparov resigns after 19 moves in a
game against Deep Blue, a chess-playing computer developed by scientists at
IBM. This was the sixth and final game of their match, which Kasparov lost two
games to one, with three draws.

https://www.youtube.com/watch?v=NP8xt8o4_5Q

25
 “
Which is the Indian super
computer ?

Param shivay

India's newest and fastest supercomputer, PARAM-Siddhi AI

As of November 2020 the latest and fastest machine in the series is the PARAM Siddhi
AI which ranks 63rd in world with an Rpeak of 5.267 petaflops

26
 Digital Computers

⊡ MICRO Computer ⊡ MINI Computer

□ A microcomputer is a □ It was first developed
small relatively by IBM in mid 1960.
inexpensive □ Also called midrange
computer with a computer.
microprocessor as its □ It may content one or
central processing more processors,
unit (CPU). support
□ It includes a multiprocessing and
microprocessor , tasking and generally
memory, and resilient to high
Input/output devices. workloads.
□ Example: IBM Pc, □ Example: DEC’s,VAX,
Apple Macintoshes, RANGE.
Dell. 27
 Digital Computers

⊡ Mainframe Computer ⊡ Super Computer

□ It is type of computers □ It consists of tens of
that generally are thousands of
known for their large processor that are
size, amount of storage,
able to perform
processing power and
high reliability.
billions and trillions of
□ Used by large calculations or
organizations for computations per
mission-critical seconds.
applications required for □ Designed for
high volume data enterprises and
processing. organization which
□ Ability to run multiple need massive
operating system.
computing power.
□ It first appeared in 1940.
28 □ Example: IBM Sequoia
Basic Structure of Computers

30
 Functional Units

Basic functional units of a computer

31
 Information Handled by
Computer
⊡ Instructions/machine instructions
□ Govern the transfer of information within a
computer as well as between the computer
and its I/O devices
□ Specify the arithmetic and logic operations
to be performed
□ Program : A list of Instruction that perform a
task
⊡ Data
□ Used as operands by the instructions
□ Source program
⊡ Encoded in binary code – 0 and 1.
32
 DATA
⊡ Data is to be processed
⊡ Compilation of High level language source program in to
list of machine instruction ( object Program)

object Program
Compiler
source program

⊡ Information channeled by computer must encoded in

suitable form.
⊡ Each number, character or instruction is encoded as a
string of binary digits called bits.( 0 or 1)
Module-II Data Representation and Computer Arithmetic

33
 Input Unit
⊡ Computer accept coded information
⊡ Read the data
⊡ Example: keyboard, Joystick,
mouse,Micrphone.
⊡ In keyboard when a key is pressed , the
corresponding letter or digit is
automatically translated into its
corresponding binary code and transmitted
over a cable to the memory or processor.

34
 Memory Unit
□ Store programs and data
□ Two classes of storage
□ Primary storage
■ Fastest
■ Programs must be stored in memory while they are
being executed
■ Large number of semiconductor storage cells
■ Processed in words Address : To provide easy access
to any word
■ RAM and memory access time (how long it takes for a
character in RAM to be transferred to or from the CPU)
■ Memory hierarchy – cache, main memory
□ Secondary storage Module-III Memory System
■ larger
■ cheaper
⊡ In Computing, a Word is the natural unit of
data used by a particular processor design.
⊡ Word addressing means that address of
memory on a computer uniquely identify
words of memory.

36
 Arithmetic and Logic Unit
( ALU)
⊡ Most computer operations are executed in ALU of
the processor.
⊡ Load the operands into memory – bring them to
the processor – perform operation in ALU – store
the result back to memory or retain in the
processor.
⊡ Registers – High speed storage element
⊡ Fast control of ALU
⊡ Faster than other devices connected to a computer
which enables a single processor to control
external devices
37
 Output Unit

⊡ Send processed results to the outside

world
⊡ Most common example is Printer,
Graphical Display
⊡ Very slow compare to processor speed.

38
 Control Unit
⊡ All computer operations are controlled by the
control unit.
⊡ The timing signals that govern the I/O transfers
are also generated by the control unit.
⊡ Control unit is usually distributed throughout the
machine instead of standing alone.

39
 Basic functional
units of a computer

40
 Operations of a
computer
⊡ Accept information in the form of programs
and data through an input unit and store it in
the memory
⊡ Fetch the information stored in the memory,
under program control, into an ALU, where the
information is processed
⊡ Output the processed information through an
output unit
⊡ Control all activities inside the machine
through a control unit
41
 Registers and register files-
Interconnection of components

42
 Registers
⊡ In Computer Architecture, the Registers are very fast computer
memory which are used to execute programs and operations
efficiently.
⊡ The sole purpose of having register is fast retrieval of data for
processing by CPU.
⊡ Different registers in Processor
□ Instruction Register (IR) - holds the instruction currently
being executed
□ Program Counter ( PC) - contains the address (location) of
the instruction being executed at the current time.
□ General Purpose Register (R0 – Rn-1)
⊡ Different registers for Memory
□ Memory Address Register ( MAR) - the CPU register that either
stores the memory address from which data will be fetched to the CPU registers,
or the address to which data will be sent and stored via system bus.
□ Memory Data Register (MDR) - 43 holding information (either program
This instruction adds the operand at the memory location
LOCA with the operand at the register R0 in the processor and
place the sum result into the register R0.

44
 Assignment Solution

Need to perform an Logical AND Operation between two data which is available at
memory location LOCX and loctaion LOCY. Write an assembly program to do the
logical AND operation and store the result in memory location LOCZ ( Hint: Use
Internal Registers). Also write down the stpes to do the operation.

R0
Address Data/operand

LOCY 10101111 R2

LOCX 11011101

LOCZ

LOAD LOCX, R0 LOCX---- R0

LOAD LOCY, R2 LOCY---- R2
AND R0,R2 R0 AND R2 - R2
STORE R2, LOCZ R2 -- LOCZ

45
Need to perform an Logical AND Operation between two
data which is available at memory location LOCX and
location LOCY.
Write an assembly program to do the logical AND operation
and store the result in memory location LOCZ
( Hint: Use Internal Registers).
Also write down the steps to do the operation

46
 Processor and Memory
Interconnection

MEMORY

MAR MDR
CONTROL

PC R0 Processor
R1
.
.
IR ALU
.
Rn-1

n general purpose Register

47
 Registers
⊡ Instruction Register (IR):
□ The IR holds the instruction which is just about to be executed.
□ The instruction from PC is fetched and stored in IR.
□ As soon as the instruction in placed in IR, the CPU starts
executing the instruction and the PC points to the next
instruction to be executed.
⊡ Program Counter (PC):
□ Program Counter (PC) is used to keep the track of execution of the
program.
□ It contains the memory address of the next instruction to be fetched.
□ PC points to the address of the next instruction to be fetched from the
main memory when the previous instruction has been successfully
completed.
□ PC also functions to count the number of instructions.
⊡ General Purpose Registers:
□ These are numbered as R0, R1, R2….Rn-1, and used to store temporary
data during any ongoing operation.
48
 Memory Registers
⊡ Memory Address Registers (MAR):
It holds the address of the location to be
accessed from memory.

⊡ Memory Data Registers (MDR):

It contains data to be written into or to be
read out from the addressed location

MAR and MDR (Memory Data Register) together

facilitate the communication of the CPU and the
main memory.
49
 Write a set of instruction to add
three data which is available at
memory location starting from
0x1004 MOV R0, R1 1006H and store the program
0x1003 ADD R1,R2 in memory location 3005H.
0x1002 STORE 1000, R1
0x1001 MOV R2,R3
0x1000 77

0x0000 23
MEMORY

50
⊡ Write a set of instruction to add three data
which is available at memory location
starting from LOC100 and store the
program in memory location LOC200.

51
 Typical Operating
Steps

1. Programs reside in the memory through input

devices
2. PC is set to point to the first instruction
3. The contents of PC are transferred to MAR
4. A Read signal is sent to the memory
5. The first instruction is read out and loaded
into MDR
6. The contents of MDR are transferred to IR
7. Decode and execute the instruction

52
 Typical Operating
Steps…
8. Get operands for ALU
• General-purpose register
• Memory (address to MAR – Read – MDR to ALU)
9. Perform operation in ALU
10.Store the result back
• To general-purpose register
• To memory (address to MAR, result to MDR –
Write)
11.During the execution, PC is incremented to
the next instruction
53
 Typical Operating Steps…

Write Control Registers

I ns t 0x1004 XXXX Rea
ru c t d Co
ion nt r
0x1003 99 ol
CONTROL

PROGRAM
Input 0x1002 XXXX
UNIT
Device 0x1001 XXXX ALU
0x1000 ADD x y
Rea Ope Out
dO ut rand put
0x0000
99
MEMORY
0x1001 DECODE
0x1000 0x1000 ADD x y ADD x y &
EXECUTE
PC MAR MDR IR

54
 Bus Structures

⊡ There are many ways to connect different parts

inside a computer together.
⊡ To achieve a reasonable speed of operation , a
computer must be organized so that all its units
can handle one full word of data at a given time.
⊡ A group of lines that serves as a connecting path
for several devices is called a bus.
□ Address
□ Data
□ Control

55
Bus is Pathway of Bits

56
57
58
⊡ A computer has main memory with 2048
location of each 16 bit calculate the total
memory capacity.
⊡ Word length= 16 bit = 2byte 1 byte = 8
bit
⊡ No of location = 2048 = 2 KB
⊡ Capacity = 2 K * 2 Byte = 4 KB

59
 Single Bus Structure

Input Output Memory Processor

• A simple way to interconnect functional units is to use a single

Bus
• Bus can be used for one transfer at a time
• Only two unit can actively use the bus at any given time.
• The bus control lines are used to arbitrate/decide the multiple
request for use the bus.
• Advantages: Low cost and flexibility
60
for attaching peripherals
 Speed of Operation

⊡ Different devices have different transfer/operate

speed.
⊡ Device such as keyboard, printer are relatively
slow and magnetic disk is fast.
⊡ Memory and Processor units is faster part of
computer
⊡ If the speed of bus is bounded by the slowest
device connected to it, the efficiency will be
very low.
⊡ How to solve this?
⊡ A common approach – use buffer registers
61
 Buffer
⊡ The buffer registers with the devices to hold the
information during transfer.
⊡ Example : Consider the transfer of an encoded character
from processor to a Character Printer
□ The Processor sends the character over the bus to the
printer buffer.
□ Once the Buffer is loaded , the printer is start printing
with out ant further intervention by processor.
Advantages:
□ The buffer registers smooth out timing difference
among processors, memories and I/O device during
sequence of data transfer .
□ Allow processor to switch rapidly from one device to
another
62
63
 Interrupt

⊡ Normal execution of programs may be preempted if some

device requires urgent servicing.
⊡ The normal execution of the current program must be
interrupted – the device raises an interrupt signal.
⊡ An Interrupt is a request from an I/O device for service by
the processor.
⊡ Interrupt-service routine (ISR)
⊡ Current system information backup and restore (PC,
general-purpose registers, control information, specific
information).
⊡ When ISR completed the state of the processor is restored
so that the interrupted program may continued.
64
 Interrupt Example

⊡ The task can be implemented with a program that consists

of two routines, COMPUTE and DISPLAY.
⊡ The processor continuously executes the COMPUTE routine.
⊡ When it receives an interrupt request from the timer, it
suspends the execution of the COMPUTE routine and
executes the DISPLAY routine which sends the latest results
to the display device.
⊡ Upon completion of the DISPLAY routine, the processor
resumes the execution of the COMPUTE routine.
⊡ Since the time needed to send the results to the display
device is very small compared to the ten-second interval,
the processor in effect spends almost all of its time
executing the COMPUTE routine.
65
 Interrupt

Transfer of control through the use of interrupts.

66
67
• Memory buffer register (MBR): Contains a word to be stored in
memory or sent to the I/O unit, or is used to receive a word
from memory or from the I/O unit.
• Memory address register (MAR): Specifies the address in
memory of the word to be written from or read into the MBR.
• Instruction register (IR): Contains the 8-bit opcode instruction
being executed.
• Instruction buffer register (IBR): Employed to hold temporarily
the right-hand instruction from a word in memory.
• Program counter (PC): Contains the address of the next
instruction pair to be fetched from memory.
• Accumulator (AC) and multiplier quotient (MQ): Employed to
hold temporarily operands and results of ALU operations.
68
 Data Flow

⊡ The exact sequence of events during an

instruction cycle depends on the design of the
processor.
• During the fetch cycle, an instruction is read from memory.

• The PC contains the address of the next

instruction to be fetched. This address is
moved to the MAR and placed on the
address bus.
• The control unit requests a memory read, and
the result is placed on the data bus and
copied into the MBR and then moved to
the IR.
• Meanwhile, the PC is incremented by 1,
preparatory for the next fetch

69
 Indirect Cycle

⊡ Once the fetch cycle is over, the control unit examines

the contents of the IR to determine if it contains an
operand specifier using indirect addressing. IF YES
>>>>
⊡ Indirect cycle is performed.
⊡ The rightmost N bits of the MBR, which contain the
address reference, are transferred to the MAR.
⊡ Then the control unit requests a
memory read, to get the desired address of
the operand into the MBR.
Data Flow, Indirect Cycle

70
 execute cycle

⊡ The fetch and indirect cycles are simple and predictable.

⊡ The execute cycle takes many forms; the form
depends on which of the various machine instructions is
in the IR.
⊡ This cycle may involve transferring data among
registers, read or write from memory or I/O, and/or the
invocation of the ALU.

71
 interrupt cycle
⊡ The current contents of the PC must
be saved so that the processor can
resume normal activity after the
interrupt.
⊡ The contents of the PC are
transferred to the MBR to be written
into memory.
⊡ The special memory location
Data Flow, Interrupt Cycle
reserved for this purpose is loaded
into the MAR from the control unit.
It might, for example, be a stack
pointer.
⊡ The PC is loaded with the address
of the interrupt routine. As a result,
the next instruction cycle will begin
72
Data Flow, Fetch Cycle Data Flow, Indirect Cycle

Data Flow, Interrupt Cycle

73
Architecture Type

74
75
• A fundamental design approach first implemented in
the IAS computer is known as the stored-program
concept.

• This idea is usually attributed to the mathematician

John von Neumann and Alan Turing developed the
idea at about the same time.
• The first publication of the idea was in a 1945 proposal by von
Neumann for a new computer, the EDVAC (Electronic Discrete
Variable Computer)

76
 Von Newmann Architecture Havard Architecture
 It is ancient computer architecture  It is modern computer
based on stored program architecture based on Harvard
computer concept. Mark I relay based model.
 Same physical memory address is  Separate physical memory
used for instructions and data. address is used for instructions
CPU cannot access instructions and data. CPU can access
and read/write at the same time. instructions and read/write at the
same time.
 There is common bus for data and  Separate buses are used for
instruction transfer. It is cheaper in transferring data and instruction.
It is costly than van neumann
cost.
architecture.
 Two clock cycles are required to  An instruction is executed in a
execute single instruction. It is
single cycle. It is used in micro
used in personal computers and
controllers and signal processing
small computers.
77
Von Newmann Architecture Havard Architecture

78
 Register
I/O main ALU
System memory Internal
Bus Bus

Control
CPU Unit
Computer

Sequencing
Logic
Control unit
registers and
Decoders
Control
Memory
The Computer: Top-Level Structure
79
Thank You

80
CSE2003– Computer Architecture and
Organization
Dr. Swagat Kumar Samantaray
School of Computing Science & Engineering
VIT Bhopal University
 MODULE-2

Data Representation and Computer Arithmetic

Fixed point representation of numbers-algorithms for arithmetic operations: addition-
subtraction - multiplication – division (restoring and non-restoring)- Floating point
representation with IEEE standards and algorithms for common arithmetic operations –
conversion between integer and real numbers.
Tutorial on Fixed and floating point arithmetic operations

82
 Number
• All Computer deal with Number.
• Computer build using Logic Circuits.

• The natural way of represent a

number in a computer system is by
a string of bits called Binary Number
and text character can also be
represtnted by a string of bits called
Character Code.

83
 Fixed Point Number
Representation 110101
53

Signed
and
magnitude

Positive Signed Binary Numbers Negative Signed Binary Numbers

1’s
Cpmpleme To get 1’s complement of a binary number, simply invert the given
nt number.
The 1’s Complement of (110010) is 001101

To get 2’s complement of binary number is 1’s complement of given

2’s number plus 1 to the least significant bit (LSB).
Compleme 2’s complement of 10010 is :
nt 1’s Complement of 10010 + 1 which is
(01101) + 1 = 01110
84
 Example- ( Signed
magnitude)

Find the Signed Representation of numbers using 8 bit .

(+27
(11011)2 (00011011)2
)10

(-
(11011)2 (10011011)2
27)10

(+101 (01100101)2
)10

(- (11101010)2
106)10

85
 Example- ( 1’s Complement
Representation)
Step-1: Find the Binary Equivalent of the Number
-67
(67) 10 1000011

Step-2: Write Positive Number using 8 bit

(+67) 10
01000011

Step-3: Find the 1’s Complement by replacing 0 by 1 and 1 by 0

1’s Complenet of ( 01000011) 10111100

To represent (-67)10 in 1’s Complement is (10111100)2

86
 Example- ( 1’s Complement
Representation)

Step-1: Find the Binary Equivalent of the Number

102
(102) 10 1100110

Step-2: Write Positive Number using 8 bit

(+102) 10
01100110

The 1’s Complement representation of the positive Number is same as sign-magnitude

representation of positive Number

To represent (+102)10 in 1’s Complement is (01100110)2

87
 TASK

Represent the Decimal Numbers in 1’s Complement representation using

eight bits -88

Step-1: Find the Binary Equivalent of the Number

(88) 10 1011000
Step-2: Write Positive Number using 8 bit

(+88) 10
01011000
Step-3: Find the 1’s Complement by replacing 0 by 1 and 1 by 0

The 1’s Complement of (+88) 10

To represent (-88)10 in 1’s Complement is (10100111)2

88
 Example- ( 2’s Complement
Representation)

Represent the Decimal Numbers in 2’s Complement representation using eight bits

Step-1: Find the Binary Equivalent of the Number

(44) 10 101100 -44
Step-2: Write Positive Number using 8 bit
(+44) 10
00101100
Step-3: Find the 1’s Complement by replacing 0 by 1 and 1 by 0

1’s Complement (+44) 10=(-44) 10 = 11010011

Step-4: Find the 2’s Complement by adding 1 to the 1’s Complement

2’s Complement = 11010011

To represent (-44)10 in 2’s + 1
Complement is (11010100)2
110101
00
89
 Example- ( 2’s Complement
Representation)
Step-1: Find the Binary Equivalent of the Number
64

Step-2: Write Positive Number using 8 bit

01000000

The 2’s Complement representation of the positive Number is same as sign-magnitude

representation of positive Number .
Hence , the 2’s Complement representation of +64 is 01000000

90
Example- ( 2’s Complement
Representation)

-89

91
92
 Binary ,signed-integer
Representation
Binary Unsigned Signed and Binary Unsigned Signed and
Decimal Magnitude Decimal Magnitude
Number Number

0111 7 +7 1000 8 -0

0110 6 +6 1001 9 -1

0101 5 +5 1010 10 -2

0100 4 +4 1011 11 -3

0011 3 +3 1100 12 -4

0010 2 +2 1101 13 -5

0001 1 +1 1110 14 -6

0000 0 +0 1111 15 -7

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 Binary Signed and 1’s Binary Signed and 1’s
Magnitude Complement Magnitude Complement

0111 +7 +7
1000 -0 -7
0110 +6 +6
1001 -1 -6
0101 +5 +5
1010 -2 -5
0100 +4 +4
1011 -3 -4
0011 +3 +3
1100 -4 -3
0010 +2 +2
1101 -5 -2
0001 +1 +1
1110 -6 -1
0000 +0 +0
1111 -7 -0

https://www.electronics-tutorials.ws/binary/signed-
binary-numbers.html

94
 Convert the following decimal values into signed binary numbers using the sign-
+23magnitude
10as a 6-bitformat:
number ⇒ 010111 2

-5610 as a 8-bit number ⇒ 101110002

+8510 as a 8-bit number ⇒ 010101012
-12710 as a 8-bit number ⇒ 111111112

For example, +0 and -0 would be 0000 and 1000 respectively as a signed 4-bit
binary number.

95
 1’s Complementation in
Signed Binary Representation:

Let we are using 5 bits register

The representation of -5 and +5

1’s Complement Using Inverters

Positive Number of simply represent

by binary number

96
 Range

⊡ if the word size is n bits, the range of numbers

that can be represented is from -(2n-1- 1) to+(2n-
1
-1)
Word size Range for 1's complement numbers

4 -7 to +7

8 -127 to +127

16 -32767 to +32767

32 -2147483647 to +2147483647

97
 2’s Complementation in
Signed Binary number
Representation
Positive numbers are simply represented as simple Binary representation. But if the number is negative then
it is represented using 2’s complement. First represent the number with positive sign and then take 2’s
complement of that number.

Example − Let we are using 5 bits registers. The representation of -5 and +5 will be as follows

98
 Two’s Complement

Example-1 − Find 2’s complement of binary number 10101110.

Simply invert each bit of given binary number, which will be 01010001. Then add 1 to the LSB of this
result, i.e., 01010001+1=01010010 which is answer.

99
 Twos Complement ,8 Bits 00010010
+18
Twos Complement,16 Bits 00000000 00010010

Twos Complement,8 Bits 1110110

-18
Twos Complement,16 Bits 10000000 00010010

100
 Addition and Substraction

Addition : If two numbers were unsigned integers

1 0 0 1
+
0 1 0 1

1 1 1 0

101
102
 Addition and Subtraction
2’s Complement
Addition in twos complement

• If the result of the operation is positive, we

get a positive number in twos complement
form, which is the same as in unsigned-
integer form.
• If the result of the operation is negative,
we get a negative number in twos
complement form.
• In some instances, there is a carry bit
beyond the end of the word which is
ignored. 103
104
105
overflow rule: If two numbers are added, and they are
both positive or both negative, then overflow occurs if and
only if the result has the opposite sign.

106
subtraction rule: To subtract one number
(subtrahend) from another (minuend), take the
twos complement (negation) of the subtrahend
and add it to the minuend.

107
108
 3+2 = 5

-3 4
3
4+4 = 8

3+(-3) = 0

3+(-5) = -2

109 4
110
 Binary
Addition

1 0 1 0 1

1 1 0 0 1

1 1 1 0 1 0

111
 Advantages & Disadvantages
Advantage
 It is quite convenient for the computer to perform arithmetic. To get
the correct answer after addition, the result of addition and final
carry has to be added up.

 Hence, 1's complement notation is also generally not used to

represent signed numbers inside a computer, so the concept of 2’s
complement has come.
Disadvantages

 1's complement notation is not very simple to understand because it

is very much different from the conventional way of representing
signed numbers.

 The other disadvantage is that there are two notations for 0 (0000
and 1111), which is very inconvenient when the computer wants to
test for a 0 result.

112
Binary number 1’s complement 2’s complement

000 111 000

001 110 111

010 101 110

011 100 101

100 011 100

101 010 011

110 001 010

111 000 001

113
 Multiplication

A B AXB
1110
0 0 0 x
1011
0 1 0
1110
1110
1 0 0
0000
1 1 1 1110

10011010

114
 Memory Location

Number of Character operands, as well as instruction are stored in

Operand
? To store
Instruction ADD B, R0
ADD B Opcode R0 Operand

115
Memory is the electronic holding place for the instructions and data a computer needs to reach
quickly. It's where information is stored for immediate use. Memory is one of the basic functions
of a computer, because without it, a computer would not be able to function properly. Memory is
also used by a computer's operating system, hardware and software.
There are technically two types of computer memory: primary and secondary.

Memory vs. storage

The concept of memory and storage can be easily
conflated as the same concept; however, there are
some distinct and important differences. Put succinctly,
memory is primary memory, while storage is secondary
memory. Memory refers to the location of short-term
data, while storage refers to the location of data stored
on a long-term basis.

116
• Memory consists of many millions of storage cells.
• Each cell will store a bit of information having value 0 or 1.
• Group of n bit can be stored and retrieve in a single basic
operation.
• Each group of n bit is ---word of information
• n is called word length
• Modern processors, including embedded systems, usually
have a word size of 8, 16, 24, 32, or 64 bits, while modern
general purpose computers usually use 32 or 64 bits.

117
n bits

First word
Second word

bn-1 bn-2 … b2 b1 b0

i-th word

Last word

Memory Word
118
• Modern computers have word length is 32 bit or 64 bit .
• If word length of computer is 32 bit, a single word can store a 32
bit 2’s complement number.
• Or 4 ASCII characters , which occupying 8 bits.
b31 b0

32 bit

8 bit ASCII Character 8 bit ASCII Character 8 bit ASCII Character 8 bit ASCII Character

119
 Address SPACE

• Addressing the memory to store or retrieve a single item of

information, either a word or byte requires addresses for each
location.
• Example: For 24 bit address generates an address space of
2^24 location. ( 16,777,216)
• 1 MB = 2 ^20
• byte = 8 bits
• 1 kilobyte (KB) = 1024 bytes
• 1 megabyte (MB) = 1024 kilobytes
• 1 gigabyte (GB) = 1024 megabytes
• 1 terabyte (TB) = 1024 gigabytes
• 1 petabyte (PB) = 1024 terabytes

120
 Byte Addressability

• Byte is always 8 bit.

• Word length ranges from 16 to 64 bit.
• Byte addressable Memory
• Byte location have addresses 0,1,2,…….
• If the word length of the machine is 32 bits, successive
words are located at addresses 0,4,8…..with each word
consisting of four bytes.

big-endian little-endian

121
 big-endian little-endian

Word Address

122
 In computing, a word is the natural unit of data used by a
particular processor design. A word is a fixed-sized piece of data handled as a
unit by the instruction set or the hardware of the processor. The number
of bits in a word (the word size, word width, or word length) is an important
characteristic of any specific processor design or computer architecture.
Uses of words
The memory model of an architecture is strongly
influenced by the word size. In particular, the
Fixed point numbers resolution of a memory address, that is, the
smallest unit that can be designated by an
address, has often been chosen to be the word.
Floating point numbers

In computer science, the word length can be

Addresses defined as the length in bits of the processors
working registers. this usually corresponds to
Registers the number of data inputs/outputs (aka the data
bus) that the processor uses in its normal
operations

123
Block Diagram of Hardware for Addition and Subtraction

OF = OverFlow bit
SW = Switch (select addition or
subtraction)

124
ADDER

125
126
127
128
 Multiplication
• Compared with addition and subtraction, multiplication is a
complex operation, whether performed in hardware or
software
• Multiplying two unsigned
• Multiplication of numbers in twos complement
representation

129
unsigned integers

130
1. Multiplication involves the generation of partial products, one for each
digit in the multiplier. These partial products are then summed to
produce the final product.
2.The partial products are easily defined. When the multiplier bit is 0, the
partial product is 0. When the multiplier is 1, the partial product is the
multiplicand.
3. The total product is produced by summing the partial products. For this
operation, each successive partial product is shifted one position to the
left relative to the preceding partial product.

4.The multiplication of two n-bit binary integers results in a product of up

to 2n bits in length (e.g., 11 * 11 = 1001).
132
Compared with the pencil-and-paper approach, there are several things we
can do to make computerized multiplication more efficient.

First, we can perform a running addition on the

partial products rather than waiting until the end.
This eliminates the need for storage of all the
partial products; fewer registers are needed
Second, we can save some time on the generation
of partial products. For each 1 on the multiplier, an
add and a shift operation are required; but for each
0, only a shift is required.
133
 unsigned integers
The multiplier and multiplicand are loaded into two registers
(Q and M). Hardware
Implementation of
Unsigned Binary
Multiplication

134
 Flowchart for Unsigned Binary Multiplication

135
 Booth’s Algorithm

136
137
 Division

Division is somewhat more complex than multiplication but is based

on the same general principles. As before, the basis for the algorithm
is the paper-and-pencil approach, and the operation involves
repetitive shifting and addition or subtraction

Division of Unsigned Binary Integers

138
Flowchart for Unsigned Binary Division

139
Example of Restoring Twos Complement Division (7/3)

140
The algorithm assumes that the divisor V and the dividend D are positive and that ∙V∙ 6 ∙D∙. If ∙V∙ = ∙D∙,
then the quotient Q = 1 and the remainder R = 0. If ∙V∙ 7 ∙D∙, then Q = 0 and R = D. The algorithm can
be summarized as follows:
1. Load the twos complement of the divisor into the M register; that is, the M
register contains the negative of the divisor. Load the dividend into the A, Q
registers. The dividend must be expressed as a 2n-bit positive number. Thus,
for example, the 4-bit 0111 becomes 00000111.

2. Shift A, Q left 1 bit position.

3. Perform A dA - M. This operation subtracts the divisor from the contents of A.

4. a. If the result is nonnegative (most significant bit of A = 0), then set Q0

d1.
b. If the result is negative (most significant bit of A = 1), then set Q0 d0.
and
restore the previous value of A.

5. Repeat steps 2 through 4 as many times as there are bit positions in Q.

141
Algorithm for Non-restoring division

In this problem, Dividend (A) = 101110, ie

46, and Divisor (B) = 010111, ie 23.
Initialization:
Set Register A = Dividend = 000000
Set Register Q = Dividend = 101110
( So AQ = 000000 101110 , Q0 = LSB of Q = 0 )
Set M = Divisor = 010111, M' = 2's complement of M = 101001
Set Count = 6, since 6 digits operation is being done here.
After this we start the algorithm, which I
have shown in a table below:
In table, SHL(AQ) denotes shift left AQ by one position leaving
Q0 blank.

Similarly, a square symbol in Q0 position

denote, it142
is to be calculated later
Tracing of Non-restoring division

143
 IEEE Standard 754 Floating
Point Numbers

• The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a

technical standard for floating-point computation which was
established in 1985 by the Institute of Electrical and
Electronics Engineers (IEEE).
• IEEE Standard 754 floating point is the most common
representation
IEEE 754 today for real numbers on computers
has 3 basic components:

1. The Sign of Mantissa –

This is as simple as the name. 0 represents a positive number while 1 represents a
negative number.
2. The Biased exponent –
The exponent field needs to represent both positive and negative exponents. A bias is
added to the actual exponent in order to get the stored exponent.
3. The Normalised Mantissa –
The mantissa is part of a number in scientific notation or a floating-point number,
consisting of its significant digits. Here we have only 2 digits, i.e. O and 1. So a
normalised mantissa is one with only one 1 to the left of the decimal.

144
IEEE 754 numbers are divided into two based on the above three
components:
• single precision
• double precision

145
 BIASED NORMALISED
TYPES SIGN BIAS
EXPONENT MANTISA

Single precision 1(31st bit) 8(30-23) 23(22-0) 127

1(63rd bit)
Double precision 11(62-52) 52(51-0) 1023

146
 Example

85.125
85 = 1010101
0.125 = 001
85.125 = 1010101.001
=1.010101001 x 2^6
sign = 0
1.Single precision: biased exponent
127+6=133 133 = 10000101
Normalized mantissa = 010101001
we will add 0's to complete the 23 bits The IEEE
754 Single precision is: =
0 10000101 01010100100000000000000
This can be written in hexadecimal form 42AA4000

147
2. Double precision:
biased exponent 1023+6=1029
1029 = 10000000101
Normalised mantissa = 010101001
we will add 0's to complete the 52 bits The IEEE
754 Double precision is: =
0 10000000101
01010100100000000000000000000000000000000000000000
00 This can be written in hexadecimal form
4055480000000000

148
Special Values: IEEE has reserved some values that can ambiguity.
• Zero –
Zero is a special value denoted with an exponent and mantissa of 0. -0 and +0 are
distinct values, though they both are equal.
• Denormalised –
If the exponent is all zeros, but the mantissa is not then the value is a denormalized
number. This means this number does not have an assumed leading one before the
binary point.
• Infinity –
The values +infinity and -infinity are denoted with an exponent of all ones and a
mantissa of all zeros. The sign bit distinguishes between negative infinity and
positive infinity. Operations with infinite values are well defined in IEEE.
• Not A Number (NAN) –
The value NAN is used to represent a value that is an error. This is represented when
exponent field is all ones with a zero sign bit or a mantissa that it not 1 followed by
zeros. This is a special value that might be used to denote a variable that doesn’t
yet hold a value.

149
 EXPONENT MANTISA VALUE
Similar for Double precision
0 0 exact 0 (just replacing 255 by 2049),
Ranges of Floating point
255 0 Infinity numbers:

0 not 0 denormalised

255 not 0 Not a number (NAN)

Denormalized Normalized Approximate Decimal

± approximately 10-44.85 to
Single Precision ± 2-149 to (1 – 2-23)×2-126 ± 2-126 to (2 – 2-23)×2127
approximately 1038.53

± approximately 10-323.3 to
Double Precision ± 2-1074 to (1 – 2-52)×2-1022 ± 2-1022 to (2 – 2-52)×21023
approximately 10308.3

150
Thank You

151