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Data Converters

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0% found this document useful (0 votes)
24 views18 pages

Data Converters

Uploaded by

Divey Pradhan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Analog ICs and

Systems
(EC1401)
Data Converters
Data Converters
• The data converters convert one form of data into another form.
• Real world processes produce analog signals which carry information pertaining to process
variables such as voltage, current, charge, temperature and pressure. The rate of flow of
such information may be very slow or very fast.
• It is difficult to store, manipulate, compare, calculate and retrieve such data with good
accuracy using purely analog technology. But, computers can perform these operations
quickly and efficiently using digital techniques. Therefore, it is necessary to convert the
analog signals from various transducers into its equivalent digital data, which in turn act as
the input for digital systems. Thus the requirement for converting analog signal into digital
data emerged.
• The computers also need to communicate with people and physical processes through the
use of analog signals, which necessitated the process of digital to analog conversion. This
chapter discusses the most common D/A and A/D conversion techniques, D/A converter
and A/D converter ICs, delta modulators and demodulators followed by sigma-delta
converters and widely used ICs for D/A and A/D conversions.
Digital to Analog Conversion
In general, a DAC accepts an n – bit digital input
word say b1 , b2 , b3 ,…… bn in binary format and
produces an analog output signal Vout proportional
to input digital signal Bin. Bin is defined as n-bit
digital word given by
Bin = b1 2-1 + b2 2-2 + b3 2-3 + ………. + bn 2-n
Each digital input can be represented by an electrical signal
representing either logic 1 and logic 0. Also b1 is defined as most
significant
A basic circuit symbol for n-bit D/A converter is as shown in fig. bit (MSB), while bn is defined as least significant bit
The relationship between digital input word Bin, analog (LSB).
output Vo and reference voltage VR is given by,
Vo = VR . Bin = VR (b1 2-1 + b2 2-2 + b3 2-3 + ………. + bn 2-n )
Digital to Analog Conversion Techniques
There are mainly two techniques used for digital to analog conversion.
•Binary weighted resistor DAC
•R/2R ladder DAC
In these techniques, the shunt resistors are used to generate n binary weighted currents. These currents are added
according to switch positions controlled by the digital input and then converted into voltage to give analog voltage
equivalent to the digital input. Therefore, such digital to analog converters are called current driven DACs.
Binary Weighted Resistor DAC
The binary weighted resistor DAC uses an op-amp to sum n binary
weighted currents derived from a reference voltage V R via current
scaling resistors 2R, 4R, 8R, ….2n R
Here operational amplifier is used as a summing
amplifier. Due to high input impedance of op-amp,
summing current will flow through Rf. Hence the total
current through Rf can be given as
I = I1 + I2 + I3 + …….. In
The outputT voltage is the voltage across R f and it is given as
The simplicity of the binary weighted DAC is offset by drawbacks associated with it.

Drawbacks

1. Wide range of resistor values are required. For 8-bit DAC, the resistors required are 2 1 R, 22 R, 23 R , …… and 28 R.
Therefore the largest resistor is 128 times the smallest one.
2.This wide range of resistor values has restrictions on both, higher and lower ends. It is impracticable to fabricate
large values of resistor in IC and voltage drop across such a large resistor due to the bias current also affects the
accuracy. For smaller values of resistors, the loading effect may occur.
3.The finite resistance of the switches disturbs the binary-weighted relationship among the various currents,
particularly in the most significant bit positions, where the current setting resistance are smaller.

All these drawbacks, especially the requirement of wide range of resistors restricts the use of binary weighted
resistor DACs below 8 bits.
R/2R Ladder DAC
• Another method of digital-
to-analog conversion is the R
/ 2R ladder, as shown in
figure below for four bits. In
R-2R ladder D/A converter,
resistors of only two values,
i.e. R and 2R are used.
• Hence, it is suitable for
integrated circuit fabrication.
This can be represented for an n-bit D/A converter as follows:

where n is the total number of bits at the input.

The output voltage Vo is expressed by

Or, more generally for an n-bit input signal, assuming R f = R


Analog to Digital Converters
An A/D converter does the inverse function of a D/A converter. It converts an analog signal
into its equivalent n-bit binary coded digital output signal.
The A/D converter accepts an analog input vi and produces an output binary word b1, b2 ... bn of fractional value
D such that

where b1 is the MSB and bn is the LSB.

• Various Types of Analog to Digital Convertors are:


• Flash type ADC
• Counter type ADC
• Servo tracking type ADC
• Successive Approximation type ADC
• Single slope type ADC
• Dual slope type ADC
Flash type or Simultaneous type
ADC
• The flash type or simultaneous type A/D converter is based on comparing an unknown
analog input voltage with a set of reference voltages.
• To convert an analog signal into a digital signal of n output bits (2n – 1) number of
comparators are required. For example, a 2-bit A/D converter requires 3 or (2 2 – 1)
comparators, while a 3-bit converter needs 7 or (23 – 1) comparators. The block diagram of
a 2-bit simultaneous type A/D converter is shown in Fig.

Advantages
(i) Simultaneous type A/D converter is the fastest because A/D
conversion is performed simultaneously through a set of
comparators. Hence, it is also called flash type A/D converter.
(ii) The construction is simple and easier to design.
Disadvantages
The simultaneous type A/D converter is not suitable for A/D
conversion with more than 3 or 4 digital output bits.
Counter type ADC
• The counter type A/D converter is constructed using only one comparator with a variable
reference voltage.
• The variable reference voltage can be obtained by a sequence counter and a D/A converter.
The block diagram for an n-bit counter type A/D converter is shown in Fig

Advantages
(i) The counter type A/D converter is very simple and needs less
hardware compared to the simultaneous type A/D converter.
(ii) This is suitable for digitising applications with high resolution.

Disadvantage
In counter type A/D converter, the conversion time is very long,
variable and
proportional to the amplitude of the analog input voltage
Continuous type (Servo tracking
type) ADC
• The main drawback of very long conversion time of the counter type A/D converter can be
eliminated by counting from the previously counted value, instead of resetting the counter
for each conversion.
• This requires an UP/DOWN counter mechanism and additional control circuitry as shown in
the continuous or servo tracking A/D converter of Fig.

Advantages
The continuous type A/D converter is faster than the counter type
A/D converter as the conversion starts from the previous counted
value instead of resetting the counter every time. iii) The tracking continues efficiently as long as the analog
Disadvantages input changes slowly. When the analog input changes
(i) Additional logic is required to control the circuit for rapidly, the tracking cannot be achieved in tune with the
performing UP/DOWN counting operations. change in analog input. This is called the tracking error
(ii) Conversion time is variable and it also depends on the last
Successive Approximation type ADC
• The conversion time is maintained constant in successive approximation type A/D converter,
and it is proportional to the number of bits in the digital output, unlike the counter and
continuous
• The type
basic principle of A/D converters.
this A/D converter is that the unknown analog input voltage is
approximated against an n-bit digital value by trying one bit at a time, beginning with the
MSB.
• The principle of successive approximation process for a 4-bit conversion is shown in Fig.
This type of A/D converter operates by successively
dividing the voltage range by half, as explained in the
following steps.
1. The MSB is initially set to 1 with the remaining three
bits set as 0. The digital equivalent is compared with
the unknown analog input voltage.
2. If the analog input voltage is higher than the digital
equivalent, the MSB is retained as 1 and the second
MSB is set to 1. Otherwise, the MSB is reset to 0 and
the second MSB is set to 1.
3. Comparison is made as given in step 1 to decide
whether to retain or reset the second MSB. The third
MSB is set to 1 and the operation is repeated down
This method uses
to LSB and byathis
verytime,
efficient search strategy
the converted digitalto complete an n-bit conversion in just n-clock
value
periods.
is available in the SAR.
• The circuit employs a successive approximation register (SAR) which finds the required value
of each successive bit by trial and error method.
• The output of the SAR is fed to an n-bit D/A converter.
• The analog output equivalent of the D/A converter is applied to the non-inverting input of the
comparator, while the other input of the comparator is connected with an unknown analog
input voltage Vi under conversion.
• The comparator output is used to activate the successive
• When approximation logic of SAR.
the START command is applied, the SAR sets
the MSB (b1) of the digital signal, while the other bits
are made zero, so that the trial code becomes 1
followed by zeros. For example, for an 8-bit A/D
converter the trial code is 10000000.
• The output of the SAR is converted into analog
equivalent Vr and gets compared with the input signal
Vi.
• If Vi is greater than the D/A converter output, then the
trial code
• 10000000 is less than the correct digital value. The
MSB is retained as 1 and the next significant bit is
made 1 and the testing is repeated.
• If the analog input Vi is now less than the D/A
converter output,
• This process is repeated for all the remaining lower bits in sequence until all the bit positions
• then the value 11000000 is greater than the exact
are tested. The EOC signal is sent out when all the bits are scanned and the value of D/A
digital equivalent. Therefore, the comparator resets
converter output just crosses Vi.
Single slope type ADC
• The main circuit of this converter is a ramp
generator, which, on receiving a RESET from the
control circuit increases linearly with time from 0 V
to a maximum voltage Vm. For example, if Vm = 10 V
and it takes 1 ms to move from 0 V to 10 V, then
the slope is 10 V/ms.
• Such a ramp generator can be either an op-amp
based integrator circuit or a D/A converter driven
by a sequence binary counter, whose output
waveform is a staircase increasing linearly.
The operation of this converter is explained as follows. Assume
that a positive analog input voltage Vi is applied at the non-
• inverting
Now, when a RESET signal is applied to the control logic, inputdecade
the 4-digit of the comparator.
counter resets to 0 and the ramp voltage
begins to increase.
• Since Vi is positive, the comparator output is in HIGH state. This allows the CLK pulse to pass to the input of the 4-digit
counter through the AND gate and the counter is incremented. This process continues until the analog input voltage is
greater than the ramp generator voltage.
• When the ramp generator voltage is equal to the analog input voltage, the comparator output becomes negatively
saturated or logic 0 and the clock is prevented from passing through the gate, ceasing the counter operation.
• Then, the control circuit generates a STROBE signal, which latches the counter value in the 4-digit latch, which is displayed
on 7-segment displays. The displayed value is then equivalent to the amplitude of analog input voltage.
Phase Locked Loop
• The phase locked loop, commonly called PLL, is a closed loop feedback system, whose output
frequency and phase are in lock with the frequency and phase of the input signal.
• The PLL is an important building block of a linear system, which can detect the phases of two
signals and reduce the difference in the presence of a phase difference.
• The realisation of PLL had been very costly in most industrial and consumer applications.
However, the evolution achieved in monolithic IC technology has made the fabrication of IC
PLL inexpensive, and the use of PLL is constantly expanding in many applications such as
satellite communication systems, FM demodulators, stereo demodulators, tone detectors and
frequency synthesisers.
• The voltage controlled oscillator (VCO) forms an integral part of the PLL.
• The main elements of the PLL are a
phase detector/comparator, a low-
pass filter, an error amplifier (A) and
a voltage controlled oscillator (VCO).
• The phase detector is fundamentally
a multiplier, which generates the
sum and difference of the two input
signals.
Operation
• The free running frequency fo of the VCO is determined by an externally connected resistor and a timing capacitor.
• When the loop is locked, the frequency fo is directly proportional to an externally applied voltage vc, called the dc
control voltage.
• When an input periodic signal vi of frequency fi and VCO output signal vo of frequency fo are applied to the PLL, the
phase detector produces a dc or low frequency signal ve which is proportional to the phase difference between the
input signal vi and the VCO output signal vo.

• When the phase sensitive signal from the phase detector is passed through the low-pass filter F(s), the high frequency
sum component is filtered out.
• The low frequency difference component passes out of the filter and then amplified by the error amplifier A. This
amplified signal is applied to the input of VCO as control voltage vc, which changes the VCO frequency fo in such a way
that the difference between fo and fi is reduced.
• If the two frequencies are brought almost identical by this feedback action, then the circuit is said to be locked.
• Once the lock is achieved, the VCO frequency fo becomes equal to the input signal frequency fi with a finite phase

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