UNIT - 5

MEMORY AND PROGRAMMABLE

LOGIC DEVICES
 MEMORY
⮚ Memory is a semiconductor of magnetic device used to store the digital data. A
memory unit stores binary information in groups of bits called words.
• 1 byte = 8 bits
• 1 word = 2 bytes
⮚ The memory can hold one or more bits of information to store the data,
instruction and addresses.
⮚ The communication between a memory and its environment is achieved
through data input and output lines, address selection lines, and control lines
that specify the direction of transfer.
•

Write and Read operations :

Transferring a new word to be stored into memory:

1. Apply the binary address of the desired word to the address lines.
2. Apply the data bits that must be stored in memory to the data input lines.
3. Activate the write input.

Transferring a stored word out of memory:

1. Apply the binary address of the desired word to the address lines.
2. Activate the read input.
TYPES OF MEMORY
 RANDOM ACCESS MEMORY (RAM)
• A RAM constitutes the internal memory of the CPU for storing data, program
and program result.
• It is also called as read write memory or the main memory or the primary
memory.
• The programs and data that the CPU requires during execution of a program
are stored in this memory.
• RAM is independent of the address to the word
• It is a volatile memory as the data loses when the power is turned off.
• RAM is further classified into two types-
SRAM (Static Random Access Memory)
and
DRAM (Dynamic Random Access Memory).
 ⮚ Static RAM (SRAM)
• The word static indicates that the memory retains its contents as long as power remains
applied.
• SRAM chips use a matrix of 6-transistors and no capacitors.
• Transistors do not require power to prevent leakage, so SRAM need not have to be
refreshed on a regular basis.
• Because of the extra space in the matrix, SRAM uses more chips than DRAM for the same
amount of storage space, thus making the manufacturing costs higher.
• Static RAM is used as cache memory needs to be very fast and small.
⮚ Dynamic RAM (DRAM)
• DRAM, unlike SRAM, must be continually refreshed in order for it to maintain the data.
• This is done by placing the memory on a refresh circuit that rewrites the data several
hundred times per second.
• DRAM is used for most system memory because it is cheap and small.
• All DRAMs are made up of memory cells.
• These cells are composed of one capacitor and one transistor.
DRAM vs SRAM
READ ONLY MEMORY (ROM)
• Stores crucial information essential to operate the system, like the program
essential to boot the computer.
• It is not volatile.
• Always retains its data.
• Used in embedded systems or where the programming needs no change.
• Used in calculators and peripheral devices.
• ROM is further classified into 4 types-
• MROM,
• PROM,
• EPROM,
• EEPROM.
⮚ MROM (Masked ROM)
• The very first ROMs were hard-wired devices that contained a pre-programmed set
of data or instructions.
• These kinds of ROMs are known as masked ROMs.
• It is inexpensive ROM.

⮚ PROM (Programmable Read Only Memory)

• PROM is read-only memory that can be modified only once by a user.
• The user buys a blank PROM and enters the desired contents using a PROM
programmer.
• Inside the PROM chip there are small fuses which are burnt open during
programming. It can be programmed only once and is not erasable.
⮚ EPROM (Erasable and Programmable Read Only Memory)
• The EPROM can be erased by exposing it to ultra-violet light for a duration of upto 40
minutes.
• Usually, an EPROM eraser achieves this function.
• During programming an electrical charge is trapped in an insulated gate region. The
charge is retained for more than ten years because the charge has no leakage path.
• For erasing this charge, ultra-violet light is passed through a quartz crystal window (lid).
This exposure to ultra-violet light dissipates the charge. During normal use the quartz lid is
sealed with a sticker.
⮚ EEPROM (Electrically Erasable and Programmable Read Only Memory)
• The EEPROM is programmed and erased electrically.
• It can be erased and reprogrammed about ten thousand times.
• Both erasing and programming take about 4 to 10 ms (millisecond).
• In EEPROM, any location can be selectively erased and programmed. EEPROMs can be
erased one byte at a time, rather than erasing the entire chip. Hence, the process of re-
programming is flexible but slow.
DIFFERENCE BETWEEN RAM & ROM
 PROGRAMMABLE
LOGIC DEVICES
• Programmable Logic Devices
(PLDs) are one kind of chip consists
of programmable switches as well as
logic gates used to implement the
logic circuit.
• It includes a set of logic circuit
elements that can be modified in
several ways.
• The main function of the switches is to
let the logic gates within the PLD to be
associated mutually to execute logic
circuits.
• A combinational PLD is an integrated circuit with programmable gates divided
into an AND array and an OR array to provide an AND-OR sum of product
implementation.
• There are three major types of combinational PLDs and they differ in the
placement of the programmable connections in the AND-OR array.

⮚ The PROM has a fixed AND array constructed as a decoder and programmable
OR array. The programmable OR gates implement the Boolean functions in sum
of minterms.
⮚ The Programmable Array Logic (PAL) has a programmable AND array and a
fixed OR array. The AND gates are programmed to provide the product terms for
the Boolean functions which are logically summed in each OR gate.

⮚ The most flexible PLD is the Programmable Logic Array (PLA) where both AND
and OR arrays can be programmed. The product terms in the AND array may be
shared by any OR gate to provide the required sum of products implementation
 THE PROGRAMMABLE ARRAY LOGIC (PAL)
• Programmable Array Logic (PAL) is a commonly used
programmable logic device (PLD).
• It has programmable AND array and fixed OR array.
Because only the AND array is programmable, it is
easier to use but not flexible as compared to
Programmable Logic Array (PLA).
• PAL’s only limitation is number of AND gates.
• PLAs implement two-level combinational logic in sum-
of-products (SOP) form. PLAs are built from an AND
array followed by an OR array, as shown in Figure .
• The inputs (in true and complementary form) drive an
AND array, which produces implicants, which in turn
are ORed together to form the outputs.
• An M × N × P-bit PLA has M inputs, N implicants,
and P outputs.
EXAMPLE SCHEMATIC OF A PAL

f 1 = X1 X2 X3‘ + X1‘ X2 X3

f 2 = X1’ X2‘ + X1 X2 X3
1. Using the connection abbreviations, redraw the circuit in figure to
show how it can be programmed to implement
F1 = ABC + AC + ABC & F2 = ABC + BC
• Solution:
Note that one unused AND
gate has all its links intact. All
links intact can be
represented by X in the AND
gate as shown in the fig.
PAL Programming Table
• PAL programming Table consists of 3 columns. The first column lists the
product terms numerically, the second column specifies the required paths
between inputs and AND gates and the third column specifies the outputs of
the OR gates.
• For each product term the inputs are marked with 1,0 or - .
• If a variable in a product term appears in its true form, the corresponding input
variable is marked with 1 and marked with 0 when the variable appears in
complemented form.
• If the variable is absent in product term its is marked as - .
• The parts between the inputs and the AND gates are specified under the column
heading inputs in the programming table.
• 1 in the input column specifies a connection from the input variable to the AND gate
and 0 input specifies a connection from the complement of the variable to the input
of the AND gate.
• A – specifies blown fuse in both the input variable and its complement. It is
assumed that open terminal in the input of an AND gate behaves like a 1.

• The outputs of the OR gates are specified under the output column.
 PROGRAMMABLE LOGIC ARRAY (PLA)

• Programmable Logic Array(PLA) is a fixed architecture logic device with

programmable AND gates followed by programmable OR gates.
• PLA is a combination of memory and logic.
• PAL combines the characteristics of PROM & PAL. i.e in PLA both AND & OR
gates have fuses at the inputs.
• A third set of fuses in the output inverters allows the output function to be
inverted if required.
• Usually EX-OR gate is used for controlled inversion.
• The main disadvantage of PLA is it has 2 sets of fuses, it is more difficult to
manufacturing, program and test it than PROM and PAL.
• Block diagram of PLA

• Structure of
unprogrammed PLA
Example : 1. Show how the PAL circuit as shown in fig, would be programmed to
implement the Sum and Carry of the full adder.

⮚ Solution :
1. Truth Table of Full-adder
2. Simplify the equation using K-map

3. Realization of Full-adder
 PLA Programming Table

• PLA programming Table consists of 3 columns. The first column lists the product
terms numerically, the second column specifies the required paths between inputs
and AND gates and the third column specify the paths between AND & OR gates.

• For each output variable, may have True (T) and complimented (C) for
programming EX-OR gate.
• For each product term the inputs are marked with 1,0 or - .
• If a variable in a product term appears in its true form, the corresponding input
variable is marked with 1 and marked with 0 when the variable appears in
complemented form. If the variable is absent in product term its is marked as - .
PROBLEMS ON PAL AND PLA

• REFER TO ALL SOLVED AND

HOMEWORK PROBLEMS DONE IN
CLASS. REFER TEXTBOOK FOR
EXTRA EXAMPLES.