Common DSP Algorithms
Common DSP Algorithms
𝑦 (𝑛)= ∑ 𝑎 ( 𝑘 ) 𝑥 (𝑛+𝑘)
𝑘=− ∞ ∞
• Correlation 𝑦 ( 𝑛 ) =𝑥 ( 𝑛 ) ∗ h (𝑛 )= ∑ 𝑥 ( 𝑘) h (𝑛−𝑘)
𝑀−1 𝑘=− ∞
• Convolution 𝑦 (𝑛)= ∑ 𝑏𝑘 𝑥 (𝑛−𝑘)
• Digital Filters 𝑘=0
Direct Broadcast
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ALTERNATIVES AT ALGORITHMIC
LEVEL
DCT as a matrix computation
Note: sampling rate does not necessarily equal clock frequency in DSP
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Graphical Representation
to Support Architectural Design of DSP
• Graphical representations are efficient for investigating and
analyzing data flow properties of DSP algorithm and for
exploiting the inherent parallelism among different subtasks.
More importantly, graphical representations can be used to
map DSP algorithms to hardware implementations.
• Four types of directed graph representation will be used
Block Diagram
Signal Flow Graph SFG
Data Flow Graph DFG
Dependent Graph DG
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BLOCK DIAGRAM
• A block diagram consists of functional blocks connected
with directed edges, which represent the data flow from
its input block to its output block
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SIGNAL FLOW GRAPH
• SFG is collection of nodes and directed edges
Node – represent computation
Edge – linear transformation of signals at the node on the input side of
the edge to signals at the node on the output side
• There are two special nodes
Source node – signals injected into the system
Sink node – signals extracted from the system
3-tap FIR Filter
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FORM TRANSFORM OF SFG
• Transposition – reversing the directions of all the edges,
exchanging the input and output nodes while keeping
the edge gain or edge delay unchanged
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DATA FLOW GRAPH
• A directed graph has nodes representing computations and directed edges
representing data paths (communications between nodes), and each edge has
a non-negative number of delays associated with it. Associated with node is its
execution time in terms of normalized time units.
• The data flow graph captures the data-driven property of a DSP system, where
all the input data are available. A node with multiple input edges can only be
fired after all its precedent nodes have fired. This imposes the precedence
constraint on a DFG.
Intra-iteration precedence constraint – edge has no delay
Inter-iteration precedence constraint – edge has(2)one or more delays
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Different Forms of DFG for 3-tap
FIR Filter
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Synchronous Data Flow
• Special case of data flowGraph
graph where the number of data
samples produced or consumed by each node in each
execution is specified a priori
2 𝑓 𝐵 2𝑓 𝐴
𝑓 𝐶= =
3 5
• Unfolded graph
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DEPENDENCE GRAPH
• Show only the dependence of computations in an algorithm. In
a DG, a new node created whenever a new computation is
called for in an algorithm and no node in a DG is ever re-used on
a single computation basis
3-tap FIR Filter
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Loop Bound
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𝐿𝑜𝑜𝑝 𝐵𝑜𝑢𝑛𝑑= =3 𝑢 .𝑡 .
2
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Iteration Bound
• The DFG with three loops that have loop bounds of 4/2u.t., 5/3u.t., 5/4u.t.
𝑇 ∞ =𝑚𝑎𝑥 { 4 5 5
}
, , =2𝑢 . 𝑡 .
2 3 4
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Bellman-Ford Shortest Path
Algorithm
• Find the shortest path from one node to any other
nodes
• Number of iterations required is at most the number of
nodes minus 1
• Complexity N-node number E-edge number
S
8 10
E A
-4
1 1
2
D B
-1 C -2
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