Transistor Transistor Logic (TTL):
-It can perform many digital function and have achieved the most popularity.
-TTL IC are given the numerical designation as 5400 and 7400 series.
-The basic circuit of TTL with totem pole output stage is NAND gate.
-TTL uses a multi-miter transistor at the input and is fast saturation logic circuit.
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-The output transistor Q3 and Q4 form a totem- pole connection.
-This extra output stage is known as totem-pole stage because three output
components Q3 and Q4 and Diode are stacked on one another.
-This arrangement will increase the speed of operation and also increase output
current capability.
- The function of diode in this circuit prevent both Q3 and Q4 being turned ON
Simultaneously.
Fig.9: TTL Circuit diagram
Truth Table
A B Y= ̅𝐀̅̅.̅𝐁̅
0 0 1
0 1 1
1 0 1
1 1 0
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Operation:
A= 0, B= 0; A= 1, B= 0; A= 0, B=1;
-The emitter base junction of Q1 turns
on.
-The collector potential of Q1 falls to
0v,then Q2 turns off.
-Therefore, at point M we have 0 volt
i.e., the base voltage of Q2 is 0 volt.
-So that, Q2 is also turns off.
-But at the same time we have
L=+VCC, this voltage is applied on the
base of Q4
-As a result transistor Q3 is turned ON.
-Therefore, the output voltage is given
by:
V0= +VCC- [Voltage drop in R4+drop in diode ‘D’]
- A=1, B=1;
-When both input are high then emitter base junction of transistor
Q1 becomes reverse bias. Hence Q1 is turned off.
- However its collector base junction is forward bias, supplying base current to
the transistor Q2. Hence Q2 turns ON.
- As a result collector potential of Q2 becomes "0" volt.
- Now if L= 0 volt is applied to the base of Q3, it turns off.
- At the same time Q4 is turn ON. Then its collector potential nearly equal to
0volts.
- Hence the output is low or logic 0.
Characteristics:
■ TTL has greater speed than DTL.
■ Less noise immunity.
■ Power dissipation is 10mw.
■ It has fan-in of 6 and fan-out of 10.
■ Propagation time delay is 5-15nsec.
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Comparison of TTL Logic gates
Propagation Power Speed Power
delay dissipation Product
Name Abbreviation
(ns) (mw) (PJ)
Standard TTL TTL 10 10 100
Low Power LTTL 33 1 33
TTL
High Speed HTTL 6 22 132
TTL
Schottky TTL STTL 3 19 57
Low Power LSTTL 9.5 2 19
Schottky TTL
Note: The standard TTL gate was constructed with different resistor values to
produce gate with lower dissipation or higher speed.
The propagation delay of a saturated logic family depends largely on two factors,
storage time and RC time constant.
Example 5: A two input NAND gate has Vcc = +5 V and 1 KΩ load connected to
its output. Calculate the output voltage,
(a) When both input are LOW (b) When both input are HIGH.
Solution: a) When both inputs of NAND gate are LOW, the output is HIGH and it
is given as,
VOH = VCC VCE(sat)- VD - IL x (130Ω)
= 5 - 0.1 - 0.7 - IL (130Ω)
= 4.2 V - IL (130Ω)
where the load current is,
IL = V O H =
RL
1KΩ
V OH
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Substituting in the equation 1 we get,
VOH
VOH = 4.2V - 1K
(130Ω) Ω
∴VOH + 130𝑉 𝑂𝐻 =
100
0
∴ 1130V 4.2
VOH =4200
420
∴ VOH = 0
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= 3.716V
0
b) When both inputs of NAND gate are HIGH, the output is LOW and it is given
as,
VOL = VCE(sat) = 0.1 V
