Module 3 PPT - Template Ait Ddco
Module 3 PPT - Template Ait Ddco
Text Book:
Carl Hamacher, ZvonkoVranesic, SafwatZaky, Computer
Organization, 5th Edition, Tata McGraw Hill.
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COMPUTER ORGANIZATION
3.Basic Structure of Computers
• Functional Units
• Bus structure
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i.e. execution control passes back and forth between the application
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program and the OS routines.
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Performance
The speed with which a computer executes programs is affected
by the design of its hardware and its machine language
instructions
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Performance
• Processor circuits are controlled by a timing signal called a clock
• The clock defines regular time intervals, called clock cycles
• To execute a machine instruction, the processor divides the action to be
performed into a sequence of basic steps, such that each step can be
completed in one clock cycle
• Let the length P of one clock cycle, its inverse is the clock rate, R=1/P
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Basic performance equation
T=(NxS)/R,
where T is the processor time required to execute a program,
N is the number of instruction executions,
S is the average number of basic steps needed to execute one machine
instruction
Note: these are not independent to each other
How to improve T?
Pipeline and Superscalar Operation
• Instructions are not necessarily executed one after another.
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• Modem computers have word lengths that typically range from 16 to 64
• If the word length of a computer is 32 bits, a single word can store a 32-bit
2's-complement number or four ASCII characters. each occupying 8 bits,
shown in figure 2.
• A unit of 8 bits is called a byte. Machine instructions nay require one or
more words for their representation.
• Accessing the memory to store or retrieve a single item of information, either a
word or a byte, requires distinct names or addresses for each item location.
Dept of CSE • It is customary to use numbers from 0 through 2k — l, for some suitable value of
k, as the address the of successive locations is the memory.
• 2k addresses constitute the address space of the computer, and the memory can
have up to 2k addressable locations.
• For example, a 24-bit address generates an address space of 224 (16,777,216) This
number is usually written as 16M (16 mega), where 1M is the number 220
(1,048576).
• A 32-bit address creates an address space of 232 or 4G (4 giga) locations, where IG
is 230.
BYTE ADDRESSABILITY
• We now have three information quantities to deal with: the bit,
byte, word.
• A byte is always 8 bits, but the word length typically ranges from 16
to 64 bits.
• The most practical assignment is to have successive addresses refer
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to successive byte locations in the memory.
• Term byte-addressable memory is used for this assignment. Byte
locations have addresses 0.1,2….
• Thus, if the word length of the machine is 32 bits, successive
words are located at addresses O, 4, 8, with each word consisting
of four bytes.
BIG-ENDIAS AND LETTLE END1AN ASSIGNMENTS
• There are two ways that byte addresses can be assigned across
words, shown in Figure.
• The name big-endian is used when lower byte addresses are used
for the more significant bytes (the leftmost bytes) of the word
• The name little-endian is used for the opposite ordering, the
Dept of CSE lower byte addresses are used for the less significant bytes
(rightmost bytes) of the word.
• The words ‘more significant' and "less significant“ are used in
relation to the weights (powers of 2) assigned to bits when the
word represents a number.
• Both little-endian and big-endian are used in commercial
machines.
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A computer must have instructions capable of performing four
types of operations:
Data transfers between the memory and the processor registers
Arithmetic and logic operations on data
Program sequencing and control
I/O transfers
To facilitate the discussion, we need some notation which we present first.
REGISTER TRANSFER NOTATION
• We need to describe the transfer of information from one location in
the computer to another.
• Possible locations that may be involved in such transfers are memory
locations, registers, registers in the I/O subsystem.
• Most of the time, we identify a location by a symbolic name standing
for its hardware binary address.
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For example Names for the addresses of memory Iotations may be
LOC, PLACE, A, VAR2;
processor register may be RO. RS;
I/O register names may be DATAIN, OUTSTATUS, and so on.
The contents of a location are denoted by placing square brackets around the
name of the location.
Thus, the expression
means that the contents memory location LOC are referred into processor register
RI.
Example 2
consider the operation that adds the contents of registers RI and
R2, and then places their sum into register R3.
For example, an instruction that cases the transfer described above, from
memory location LOC to processor register RI, is specified by the
statement
Dept of CSE Move LOC RI
Egg: Add A, B
In the preceding of
instruction formats, we
used the task
C [A] + [B)
for illustration. Figure
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program segment for
this task as it appears in
the memory of a
computer.
Thus, the different ways Of specifying the instruction are called as addressing modes:
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Register mode — The operand is the contents of a processor register,
the name (address) of the register is given in the instruction.
example -MOVE R1,R0
Assuming that A and B have been declared earlier as variables and may
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be accessed using the Absolute mode, this statement may be compiled
as follows:
Move B, R1
Add #6, R1
Move R1, A
INDIRECTION AND POINTERS
• In the addressing modes, the instruction does not give the operand
or its address explicitly.
• It provides information from which the memory address of the
operand can be determined.
• This address is referred as the effective address (EA) of the
operand.
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The register or memory location that contains the address of an operand is called
a pointer. Indirection and the use of pointers are important and powerful concepts
in programming.
Consider the program shown below. To add the test of numbers using loop. we can
use indirect Addressing mode to access successive numbers.
1. Total no. of elements are moved to R1,R1 is a
counter
2. The address of the first no. in the list is moved to
R2.
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3. Clear R0 to 0
4. Add the content of location pointed to by R2 to
pointer to the contents of R0.
5. To make R2 to point to next location incremented by
(4 because its 32-bit no.)
6. Decrement the counter R1.
7. Check if the counter R1 reached Zero. If it is not
zero(greater than zero) go back to loop and repeat the
execution of instructions.
8. If counter becomes zero, since branch greater then
zero is false, it stops the interactions. Final sum is in
R0 and is moved to memory location SUM.
INDEXING AND ARRAYS
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X(PC) - used to a memory location that is X bytes away from the location
presently pointed to by PC program counter.
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Here the addressed location is identified ‘relative" to the program
counter, which always identifies the current execution point in a
program, the name Relative mode is associated with this type of
addressing.
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Autodecrement mode — The contents of a register specified in
the instruction are first automatically decremented and are then
used as the effective address of the operand.