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5 views74 pages

Module 3 PPT - Template Ait Ddco

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sushantranjan002
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© © All Rights Reserved
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COMPUTER ORGANIZATION

Text Book:
Carl Hamacher, ZvonkoVranesic, SafwatZaky, Computer
Organization, 5th Edition, Tata McGraw Hill.

Dept of CSE
COMPUTER ORGANIZATION
3.Basic Structure of Computers
• Functional Units

• Basic Operational Concept

• Bus structure
Dept of CSE

• Performance – Processor Clock, Basic Performance Equation, Clock


Rate, Performance Measurement.

• Machine Instructions and Programs: Memory Location and Addresses,


Memory Operations, Instruction and Instruction sequencing,
Addressing Modes.
Basics of Computer Organization
• A computer can be defined as a fast electronic calculating
machine that accepts the (data) digitized input information
process it as per the list of internally stored instructions and
produces the resulting information.

Dept of CSE • The different types of computers are


• Personal computers
• Note book computers
• Work stations
• Enterprise systems
• Super computers
Computer Types
Personal Computers (PCs): These are computers designed for
individual use. They typically include desktop computers used for
general tasks like word processing, web browsing, gaming, and other
personal activities. PCs are usually cost-effective and commonly
found in homes and offices.
Dept of CSE
Notebook Computers (Laptops): These are portable, compact
computers that provide the same functions as a desktop PC but are
designed for mobile use. Laptops run on battery power and are
convenient for people who need computing on the go. They are
popular among students and professionals.
Computer Types
Workstations: Workstations are high-performance computers designed for
technical or scientific applications. They have powerful processors, large
amounts of RAM, and high-end graphics capabilities to handle intensive tasks
such as computer-aided design (CAD), video editing, and scientific
simulations.

Enterprise Systems: These are large-scale computing systems used by


Dept of CSE organizations to support critical applications and services across the
enterprise. They handle tasks like data management, resource planning, and
processing large amounts of transactions in real-time. Enterprise systems are
often highly secure and built for scalability and reliability.

Supercomputers: Supercomputers are the most powerful and fastest


computers, capable of performing complex calculations at extraordinary
speeds. They are used for highly demanding tasks such as climate research,
molecular modeling, and simulations of p
Functional Units

Dept of CSE

Fig: Basic functional units of a computer


Input Unit:
This unit is responsible for receiving data and instructions from
the external environment. Devices like keyboards, mice, and
scanners convert data into a format the computer can
understand, allowing it to be processed by the CPU.
Output Unit:
This unit takes processed data and converts it into a form
Dept of CSE understandable to users, sending it to devices
Memory Unit:
The memory unit stores data, instructions, and intermediate
results. It's divided into
Primary Memory (RAM): Temporary storage for data and
instructions actively in use.
Secondary Memory (e.g., hard drives, SSDs ): Long-term
data storage.
Arithmetic Logic Unit (ALU):
The ALU performs arithmetic and logical operations, such as addition,
subtraction, and comparison. It's a crucial component for data
processing.
Control Unit (CU):
The CU directs operations by managing and coordinating activities
Dept of CSE across all units. It fetches instructions from memory, decodes them,
and guides data through the ALU, memory, and output units as
required.
Central Processing Unit (CPU):
Often called the "brain" of the computer, the CPU consists of the ALU,
CU, and registers. It executes instructions and processes data,
managing all computer functions
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Single-bus Structure
• To achieve a reasonable speed of operation, a computer must be
organized so that all its units can handle one full word of data at a given
time.
• In order to communicate, they need to be connected.
• Functional units may be connected by a group of parallel wires.
• The group of parallel wires is called a bus.
Dept of CSE • Each wire in a bus can transfer one bit of information.
• The number of parallel wires in a bus is equal to the word length of a
computer
• A group of lines that serves a connecting path for several devices is called
a bus
• In addition to the lines that carry the data, the bus must have lines for
address and control purposes
Single-bus Structure
• The simplest way to interconnect functional units is to use a
single bus, as shown below.
• All units are connected to this bus, because the bus can be
used for only one transfer at a time, only two units can actively
use the bus at any given time
Dept of CSE

Input Output Memory Processor


Drawbacks of the Single Bus Structure

The devices connected to a bus vary widely in their speed of


operation.

• Some devices are relatively slow, such as printer and keyboard


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• Some devices are considerably fast, such as optical disks

• Memory and processor units operate are the fastest parts of a


computer
Efficient transfer mechanism thus is needed to cope with this problem

• A common approach is to include buffer registers with the devices to


hold the information during transfers

• Another approach is to use two-bus structure and an additional


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transfer mechanism

• A high-performance bus, a low-performance, and a bridge for


transferring the data between the two buses. ARMA Bus belongs to this
structure
Software
In order for a user to enter and run an application program, the computer
must already contain some system software in its memory System.
software is a collection of programs that are executed as needed to
perform functions such as

• Receiving and interpreting user commands


Dept of CSE
• Running standard application programs such as word processors, or
games

• Managing the storage and retrieval of files in secondary storage devices

• Controlling I/O units to receive input information and produce output


results.
Functions of system Software
• Translating programs from source form prepared by the user into
object form consisting of machine instructions.

• Linking and running user-written application programs with existing


standard library routines, such as numerical computation packages.
Dept of CSE

• System software is thus responsible for the coordination of all


activities in a computing system.
Operating System
• This is a large program, or actually a collection of routines, that is
used to control the sharing of and interaction among various
computer units as they perform application programs

• The OS routines perform the tasks required to assign computer


Dept of CSE resource to individual application programs

• These tasks include assigning memory and magnetic disk space to


program and data files, moving data between memory and disk
units, and handling I/O operations
• In the following, a system with one processor, one disk, and one
printer is given to explain the basics of OS
• Assume that part of the program’s task involves reading a data file
from the disk into the memory, performing some computation on
the data, and printing the results.
Dept of CSE
Sequence of the steps involved in running one
application program.
 Assume that the application program has been compiled from
a high-level language form into a machine language form and
stored on the disk.
 The first step is to transfer this file into the memory.
 When the transfer is completed, execution of the program is
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started.
 Assume that part of the program's task involves reading a
data file from the disk into the memory, performing some
computation on the data, and printing the results.
 When execution of the program reaches the point where the
data file is needed, the program requests the OS to transfer the
data file from the disk to the memory.
 The OS performs this task and passes execution control back
to the application program, which then proceeds to perform the
 When the computation is completed and the results are ready to be
printed, the application program again sends a request to the OS.

 An OS routine is then executed to cause the printer to print the results.

 i.e. execution control passes back and forth between the application
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program and the OS routines.

 A convenient way to illustrate this sharing of the processor execution


time is by a time-line diagram, such as that shown in Figure.
Execution of more than one application program
at a time

 Computer resources can be used more efficiently if several


application
programs are to be processed.
 Notice that the disk and the processor are idle during most
Dept of CSE of the time
period {t4 to t5) .
 The OS can load the next program to be executed into the
memory from the disk while the printer is operating.
 Similarly, during to to t1, the OS can arrange to print the
previous program's results while the current program is being
loaded from the disk.
 Thus, the OS manages the concurrent execution of several
application
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• During the time period to to t1, an OS routine initiates loading
the application program from disk to memory, waits until the
transfer is completed, and then passes execution control to the
application program.

• A similar pattern of activity occurs during period t2 to t3 and


Dept of CSE period t4 to t5 when the OS transfers the data file from the disk
and prints the results.

• At t5 , the OS may load and execute another application


program.
Multiprogramming or Multitasking

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Performance
 The speed with which a computer executes programs is affected
by the design of its hardware and its machine language
instructions

 Because programs are usually written in a high-level language,


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performance is also affected by the compiler that translates
programs into machine languages

For best performance, the following factors must be considered


• Compiler
• Instruction set
• Hardware design
Performance

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Performance
• Processor circuits are controlled by a timing signal called a clock
• The clock defines regular time intervals, called clock cycles
• To execute a machine instruction, the processor divides the action to be
performed into a sequence of basic steps, such that each step can be
completed in one clock cycle
• Let the length P of one clock cycle, its inverse is the clock rate, R=1/P

Dept of CSE
Basic performance equation
T=(NxS)/R,
where T is the processor time required to execute a program,
N is the number of instruction executions,
S is the average number of basic steps needed to execute one machine
instruction
Note: these are not independent to each other
How to improve T?
Pipeline and Superscalar Operation
• Instructions are not necessarily executed one after another.

• The value of S doesn’t have to be the number of clock cycles to


execute one instruction.
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• Use of Pipelining – overlapping the execution of successve
instructions.

• Use multiple functional units

• Goal is to reduce S (could become <1!)


Pipeline and Superscalar Operation

• Pipelining: overlapping the execution of successive instructions

• Superscalar: different instructions are concurrently executed with


multiple instruction pipelines.
Dept of CSE • This means that multiple functional units are needed. The processor
and a relatively small cache memory can be fabricated on a single
integrated circuit chip
Clock rate improvement
• Improving the integrated-circuit technology makes logic circuits
faster (R inereases), which reduces the time needed to complete a
basic step.
• Reducing amount of processing done in one basic step also makes
it possible to reduce the clock period, P.
• However, if the actions that have to be performed by an
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instruction remain the same, the number of basic steps needed
may increase.
INSTRUCTION SET: Reduced instruction set computers
(RISC) and complex instruction set computers (CISC)
Compiler
• A compiler translates a high-level language program into a
sequence of machine instructions.

• To reduce N, we need a suitable machine instruction set


and a compiler that makes good use of it.
Dept of CSE

• Goal – reduce N×S

• A compiler may not be designed for a specific processor;


however, a high-quality compiler is usually designed for,
and with, a specific processor
Performance Measurement
• T is difficult to compute.
• Measure computer performance using benchmark programs.
• System Performance Evaluation Corporation (SPEC) selects and publishes
representative application programs for different application domains,
together with test results for many commercially available computers.
• SPEC rating is a measure of the combined effect of all factors affecting
performance.(Compiler, OS, CPU and of the computer being
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tested)Memory how much fast the computer under test
• Compile and run (no simulation)
MEMORY LOCATIONS AND ADDRESSES
• Number and character operands, as well as instructions, are
stored in the memory of a computer.
• The memory consists of many millions of storage cells, each of
which store a bit of information having the value O or l. Because a
single bit represents a very small amount of information, bits are
handled individually.
Dept of CSE
• The usual approach is to deal with them in groups of fixed size.
• For this purpose, the memory is organized so that a group of n bits
can be stored or retrieved in a single, basic operation.
• Each group of n bits is referred to a word of information, and n is
called word length. The memory of a computer can be
schematically represented as a collection of words as shown in
Figure .
Memory word Examples of encoded
information in a 32-bit word.

Dept of CSE
• Modem computers have word lengths that typically range from 16 to 64
• If the word length of a computer is 32 bits, a single word can store a 32-bit
2's-complement number or four ASCII characters. each occupying 8 bits,
shown in figure 2.
• A unit of 8 bits is called a byte. Machine instructions nay require one or
more words for their representation.
• Accessing the memory to store or retrieve a single item of information, either a
word or a byte, requires distinct names or addresses for each item location.
Dept of CSE • It is customary to use numbers from 0 through 2k — l, for some suitable value of
k, as the address the of successive locations is the memory.
• 2k addresses constitute the address space of the computer, and the memory can
have up to 2k addressable locations.
• For example, a 24-bit address generates an address space of 224 (16,777,216) This
number is usually written as 16M (16 mega), where 1M is the number 220
(1,048576).
• A 32-bit address creates an address space of 232 or 4G (4 giga) locations, where IG
is 230.
BYTE ADDRESSABILITY
• We now have three information quantities to deal with: the bit,
byte, word.
• A byte is always 8 bits, but the word length typically ranges from 16
to 64 bits.
• The most practical assignment is to have successive addresses refer
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to successive byte locations in the memory.
• Term byte-addressable memory is used for this assignment. Byte
locations have addresses 0.1,2….
• Thus, if the word length of the machine is 32 bits, successive
words are located at addresses O, 4, 8, with each word consisting
of four bytes.
BIG-ENDIAS AND LETTLE END1AN ASSIGNMENTS
• There are two ways that byte addresses can be assigned across
words, shown in Figure.
• The name big-endian is used when lower byte addresses are used
for the more significant bytes (the leftmost bytes) of the word
• The name little-endian is used for the opposite ordering, the
Dept of CSE lower byte addresses are used for the less significant bytes
(rightmost bytes) of the word.
• The words ‘more significant' and "less significant“ are used in
relation to the weights (powers of 2) assigned to bits when the
word represents a number.
• Both little-endian and big-endian are used in commercial
machines.
Dept of CSE

Fig: Byte and word addressing.


WORD ALIGNMENT
• In case of a 32-bit word length, natural word boundaries occur at addresses
0, 4, 8, , shown in Figure. that the word locations have aligned addresses.
• In general, words are said to be aligned in memory if they begin at a byte
address that is a multiple of the number of bytes in a word.
ACCESSING NUMBERS, CHARACTERS, AND CHARACTER STRINGS
• A number usually occupies one word. It can be accessed in the memory by
specifying its word address.
Dept of CSE • Similarly, individual characters can be accessed by their byte address. The
beginning of the string is indicated by giving the address of the byte
containing its first character.
• Successive byte locations contain successive characters of the string.
There are two ways to indicate the length of the string.
• A special control character with the meaning "end of string" can be used as
the last character in the string, or a separate memory word location or
processor register can contain a number indicating the length of the sting in
bytes.
MEMORY OPERATIONS
• Both program instructions and operands are stored in the memory.

• To execute an instruction, the processor control circuits must cause the


word (or words) containing the instruction to be transferred from the
memory to the processor.
Dept of CSE
• Operands and results must also be moved between the memory and the
processor.

Thus, two basic operations involving memory needed, namely,


• Load (or Read or Fetch)
• and Store (or Write).
• The Ioad operation transfers a copy of the contents of a specific
memory location processor.
• To start a Load operation, the processor sends the address of the
desired location to the memory and requests that its contents be
read.
• The memory reads the data stored at that address and sends
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them to the processor.

• The Store operation transfers item of information from the


processor to a specific location, destroying the former contents of
that location.
• The processor sends the address of the desired location to the
memory, together with data to be written into the location.
MEMORY LOCATIONS AND ADDRESSES
• Number and character operands, as well as instructions, are
stored in the memory of a computer.
• The memory consists of many millions of storage cells, each of
which store a bit of information having the value O or l. Because a
single bit represents a very small amount of information, bits are
handled individually.
Dept of CSE
• The usual approach is to deal with them in groups of fixed size.
• For purpose, the memory is organized so that a group of n bits can
be stored or retrieved in a single, basic operation.
• Each group of n bits is referred to a word of information, and n is
called word length. The memory of a computer can be
schematically represented as a collection of words as shown in
Figure above.
INSTRUCTONS AND INSTRUCTION SEQUENCING

Tasks caried out by a computer program consist of a sequence of


small steps, such adding two numbers, testing for a particular
condition, reading a character from the keyboard, or sending a
character to be displayed on a display screen.

Dept of CSE
A computer must have instructions capable of performing four
types of operations:
 Data transfers between the memory and the processor registers
 Arithmetic and logic operations on data
 Program sequencing and control
 I/O transfers
To facilitate the discussion, we need some notation which we present first.
REGISTER TRANSFER NOTATION
• We need to describe the transfer of information from one location in
the computer to another.
• Possible locations that may be involved in such transfers are memory
locations, registers, registers in the I/O subsystem.
• Most of the time, we identify a location by a symbolic name standing
for its hardware binary address.
Dept of CSE
For example Names for the addresses of memory Iotations may be
LOC, PLACE, A, VAR2;
processor register may be RO. RS;
I/O register names may be DATAIN, OUTSTATUS, and so on.
The contents of a location are denoted by placing square brackets around the
name of the location.
Thus, the expression
means that the contents memory location LOC are referred into processor register
RI.
Example 2
consider the operation that adds the contents of registers RI and
R2, and then places their sum into register R3.

Dept of CSE This action is as


This type of notation is known as Register Transfer Notation (RTN).
Note that the right-hand side of an RTN expression always denotes
a value, and the left-hand side is the name of a location where the
value is to be placed, overwriting the old contents of that location.
ASSEMBLY LANGUAGE NOTATION
We need another type of notation to represent machine instructions and
programs. For this, we use an assembly language format.

For example, an instruction that cases the transfer described above, from
memory location LOC to processor register RI, is specified by the
statement
Dept of CSE Move LOC RI

Contents of LOC are unchanged by the execution of this instruction, but


the old contents of register RI are overwritten.

The second example of adding two numbers contained in processor


registers RI and R2 and placing their sum in R3 can be specified by
assembly language statement
Add R1,R2,R3
BASIC INSTRUCTION TYPES
• The operation of adding two numbers is a fundamental capability in
any computer. The Statement C=A+B
• In a high-level language program is a command to the computer to
add current values of the two variables called A and B, and to assign
the sum to a third variable C.
• When program containing this statement is compiled, the three
variables, A, B, and C, are assigned to distinct locations in the memory.
Dept of CSE

High level language


C=A+B
B=A+B
C=B
BASIC INSTRUCTION TYPES
Let us first assume that this action is to be accomplished by a single
machine. Furthermore, assume that this instruction contains the
memory addresses of three operands — A, B, and C. This three-
address instruction can be represented symbolically as
Add A,B,C
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A and B are called the source operands,
C is called the destination operand,
Add is the operation to be performed on the operands.

A general instruction of this type has the format


Operation Source l, Source 2, Destination
BASIC INSTRUCTION TYPES
If k bits are needed to specify the memory address of each the
encoded form of the above instruction must contain 3k bits for
addressing the purposes in addition to the bits needed to denote the
Add operation.

For a modem with a 32-bit address space, a 3-address instruction is


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too large to fit in one word.

Thus, a format that allows


• multiple words to be used for a single instruction would be
needed.
• An alterative approach is to use a sequence of simpler
instructions to perform same task.
Suppose that two-address instructions of the form
Operation Source, Destination are available.

Egg: Add A, B

which performs the operation B [A] + [B] When the sum is


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calculated, the result is sent to the memory and stored in location B,
replacing the original contents of this location. This means that
B is both a source and a destination.

Therefore perform Move B, C


The operation C [A] + [B] can be performed by the 2 instructions
Move B,C
Add A,C
EXECUTION AND STRAIGHT LJNE SEQUENCING

In the preceding of
instruction formats, we
used the task
C [A] + [B)
for illustration. Figure
Dept of CSE shows a possible
program segment for
this task as it appears in
the memory of a
computer.

Fig: A program C [A) + [Bl.


BRANCHING
Consider the
task of Here, there is a long list of
Add instructions.
adding a list
of n numbers Instead of this, we can use
single ADD instruction in a
loop.
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Fig: A straight line program


for adding n numbers.
• N: total no of numbers to be
added.

• R1: loop iteration counter


• R1 is having value N

• Decrement R1, reduces the


content of R1 by 1 each time
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through the loop

• Execution of loop repeated as


long as the result of the
operation is greater than zero

Fig: Using a loop to odd


n numbers.
ADDRESSING MODES
The different ways in which the locations of an operand is specified in an instruction is
referred to as addressing mode. The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the operand is actually executed.

Thus, the different ways Of specifying the instruction are called as addressing modes:

1. Immediate Addressing Mode


2. Register Direct Addressing Mode
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3. Direct Addressing Mode
4. Indirect Addressing Mode
5. Index addressing mode
6. Base with Index addressing mode
7. Base with index and offset addressing Mode.
8. Relative Addressing Mode
9. Auto-increment Addressing Mode
10. Auto-decrement Addressing Mode
Table: Generic addressing modes.

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Register mode — The operand is the contents of a processor register,
the name (address) of the register is given in the instruction.
example -MOVE R1,R0

Absolute mode — The operand is in a memory location; tie address of


this location is given explicitly in the instruction. (In some assembly
Dept of CSE languages, this mode is called Direct.

example -Move LOC,R2

Immediate mode — The operand is given explicitly in the instruction.


The value of the source operand is specified .
example, Move #200, R0
places the value in register R0.
Constant values are used frequently in high-level language programs.

For example, A=B+6 contains constant 6

Assuming that A and B have been declared earlier as variables and may
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be accessed using the Absolute mode, this statement may be compiled
as follows:

Move B, R1
Add #6, R1
Move R1, A
INDIRECTION AND POINTERS
• In the addressing modes, the instruction does not give the operand
or its address explicitly.
• It provides information from which the memory address of the
operand can be determined.
• This address is referred as the effective address (EA) of the
operand.
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Indirect mode — The effective address of the operand is the contents


of a register or memory location whose address a in instruction.
Indirection is denoted by placing the name of the register or the
memory address given in the instruction in parentheses as illustrated
in Figure and Table.
Example:
1.ADD (R1), R0 Add the content of memory location pointed
to by R1 to the content of R0 and place the result in R0
2. ADD (A), R0 similar to above example, memory location A is
used as pointer.

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The register or memory location that contains the address of an operand is called
a pointer. Indirection and the use of pointers are important and powerful concepts
in programming.
Consider the program shown below. To add the test of numbers using loop. we can
use indirect Addressing mode to access successive numbers.
1. Total no. of elements are moved to R1,R1 is a
counter
2. The address of the first no. in the list is moved to
R2.
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3. Clear R0 to 0
4. Add the content of location pointed to by R2 to
pointer to the contents of R0.
5. To make R2 to point to next location incremented by
(4 because its 32-bit no.)
6. Decrement the counter R1.
7. Check if the counter R1 reached Zero. If it is not
zero(greater than zero) go back to loop and repeat the
execution of instructions.
8. If counter becomes zero, since branch greater then
zero is false, it stops the interactions. Final sum is in
R0 and is moved to memory location SUM.
INDEXING AND ARRAYS

Index mode — Effective address of the operand is generated by adding a


constant value to the contents of a register.
• The register used may be either a special register provided for this purpose, or,
more commonly, it may be any one of a set of general-purpose registers in the
processor.
• In either case, it is referred to as an index register.
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We indicate the Index symbolically as
X(Ri)
where X :denotes the constant value contained in the instruction and
Ri: is the name of the register involved.

The effective address of the operand is given by


EA = X +[Ri]
Example: 1) R1= 1000, R2=20 Example: 2) R1= 20, R2=20
ADD 20(R1),R2 ADD 1000(R1),R2

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EA= X+[R1] EA= X+[R1]


= 20+ 1000 = 1000+ 20
EA= 1020 EA= 1020
contents of memory location is 1020. contents of memory location is 1020.
ADD 20(R1),R2 ADD 1000(R1),R2
R2= [1020]+20 R2= [1020]+20
= 40+20 = 40+20
R2 = 60 R2 = 60
Example: To the usefulness of indexed addressing, consider a simple example involving
a list of test scores for students taking a given course. There are n students and three
tests conducted in a given course. compute the sum of all scores obtained on each of
the tests and sum of all scores and stores these sums in memory location SUM1,SUM2,
and SUM3. Assume that the list of scores, beginning at location LIST, is structured as
shown in Figure .

Dept of CSE

Fig: List of students marks


R0 initially pointing to first student ID

[R0] +4 : test 1 score


[R0] +8 : test 2 score
[R0] +12 : test 3 score
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After accessing all test scores, R0 is
made to point to next student ID.

Therefore R0 is updated to [R0] +16

Therefore next student ID is 4 words


ahead of present student ID LIST+16
Fig: Indexed addressing used in accessing
test scores in the list
see in the previous fig.
RELATIVE ADDRESSING
In this the program counter PC, is used instead of a general-purpose
register.

X(PC) - used to a memory location that is X bytes away from the location
presently pointed to by PC program counter.

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Here the addressed location is identified ‘relative" to the program
counter, which always identifies the current execution point in a
program, the name Relative mode is associated with this type of
addressing.

Relative mode — effective address is determined by the Index mode


using the program counter in place of the general-purpose register Ri.
EA=X+[PC]
This mode can be used to access data operands. But, its most
common use is to specify target address in branch instructions. An
instruction such
Branch>O LOOP

program execution to go to the branch location identified by the


name LOOP if the branch condition is satisfied.
Dept of CSE

This location can be computed by specifying it as an offset from


the current value of the Since the branch target may be either
before or after the branch instruction, the offset is given as a
signed number.
ADDITIONAL MODES
The following two modes are useful for accessing data items in successive
locations in the memory.
Autoincrement mode — The effective address of the contents of a register
specified in the instruction. After accessing the operand, the contents of this
register automatically incremented to point to the next item in a list. Thus
the autoincrement mode is written as
Dept of CSE (Ri)+
Computers that have the Autoincrement mode automatically increment the
contents of the register by a value that corresponds to the size of the
accessed operand.

Thus, the increment is I for byte-sized operands,


2 for16-bit operands,
and 4 for 32-bit operands.
If the Autoincrement mode is available, it can be used in first Add
instruction in Figure shown above and the second Add instruction can be
eliminated. The modified program is shown in Fig below.

Dept of CSE
Autodecrement mode — The contents of a register specified in
the instruction are first automatically decremented and are then
used as the effective address of the operand.

We denote the Autodecrement mode by putting the specified


register in parentheses, preceded by a minus sign to indicate that
Dept of CSE
the contents of the register are to be decremented before being
used as the effective address. Thus, we write
-(Ri)

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