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Implementation_and_Verification_of_Decoder

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0% found this document useful (0 votes)
27 views

Implementation_and_Verification_of_Decoder

Uploaded by

danyalkhattak739
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Implementation and Verification

of Decoder Using Logic Gates


Group Members:
Uzair Aziz
Hashim Bin Wali
Musharib Kiani
M Abubakar
Danyal Nasir
Introduction
• - What is a Decoder?
A combinational circuit that converts `n` input
lines into a maximum of 2^n unique outputs.
• - Applications:
Memory addressing, digital displays, and data
routing.
3-to-8 Decoder Overview
• - Inputs: A, B, C.
• - Outputs: Y0 to Y7.
• - Enable Input (E): Activates the decoder
circuit when set to 1.
Truth Table for 3-to-8 Decoder
E A B C Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
0 X X X 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 1
1 0 0 1 0 0 0 0 0 0 1 0
1 0 1 0 0 0 0 0 0 1 0 0
1 0 1 1 0 0 0 0 1 0 0 0
1 1 0 0 0 0 0 1 0 0 0 0
1 1 0 1 0 0 1 0 0 0 0 0
1 1 1 0 0 1 0 0 0 0 0 0
Circuit Design
• - Boolean Equations:

• - Circuit Diagram:
Operation
• The operation of logic circuit of the 3 to 8 decoder is described as follows −
• When enable input (E) is inactive, i.e set to 0, none of the AND gates will function.
• When enable input (E) is made active by setting it to 1, then the circuit works as
described below.
• When A = 0, B = 0, and C = 0, the AND gate 1 becomes active and produces output
Y0.
• When A = 0, B = 0, and C = 1, the AND gate 2 becomes active and produces output
Y1.
• When A = 0, B = 1, and C = 0, the AND gate 3 becomes active and produces output
Y2.
• When A = 0, B = 1, and C = 1, the AND gate 4 becomes active and produces output
Y3.
• When A = 1, B = 0, and C = 0, the AND gate 5 becomes active and produces output
Y4.
• When A = 1, B = 0, and C = 1, the AND gate 6 becomes active and produces output
Y5.
• When A = 1, B = 1, and C = 0, the AND gate 7 becomes active and produces output
Y6.
• When A = 1, B = 1, and C = 1, the AND gate 8 becomes active and produces output
Y7.
Implementation Steps
• 1. Simulate the circuit using Proteus software.
• 2. Verify outputs for all input combinations
using the truth table.
• 3. Compare theoretical and simulated results.
Applications
• - Memory Address Decoding: Selecting specific
memory blocks.
• - Display Control: Driving 7-segment displays.
• - Data Demultiplexing: Routing data based on
binary address.
Task Insights
• - Observations:
• * The decoder functions only when enabled.
• * Each input combination activates a single
output.
• - Key Learning:
• * Decoders are crucial for data selection and
binary-to-output mapping.
Quiz Questions
• 1. How many outputs does a 3-to-8 decoder
have?
• Answer: 8 outputs.
• 2. What happens when the enable input (E) is
0?
• Answer: All outputs are inactive (0).

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