Microprocessor Interfacing

& Programming

Lecture 17-18
Serial Communication (USART)
Dr. Niaz Ahmed

Slides credit: Slides originally prepared by Dr. Waseem Ikram

 Interrupts Recap
• You should be able to do the following
1. Explain merits and demerits of Interrupt vs.
Polling schemes for transfer of data
2. Explain sequence of steps initiated by arrival of
interrupt signal and leading to the execution of
the ISR to service the interrupt
3. Explain general mechanism to enable and
disable interrupts
4. Program AVR counters/timers for interrupt
driven IO
5. Program AVR hardware interrupts 2
 Serial
Communication

3
 Introduction to Serial
Communication
• Microcontrollers internally
process data in parallel
• Data transfer between
microcontroller and I/O devices
can be in parallel or serial
• Data 0110 0011 is shown to be
transferred in parallel and in
series
• Which scheme of data transfer • Parallel scheme as 8-bits
is faster? are transferred in 1
clock
4
 Introduction to Serial
Communication
• In serial scheme 8 bits are
transferred in 8 clocks
• Which scheme is more
expensive?
• Parallel scheme as 8 wires are
required instead of 1 in serial
scheme
• Which scheme should be used
for long distance transfer of • All modern devices
data? use serial scheme
• Serial Scheme
5
 Introduction to Serial
Communication
• Processors must have ability to convert
1. Parallel Data to Serial for Serial Transmission
2. Serial Data to Parallel for Reception
• Digital data ‘1’ & ‘0’ can be transmitted serially over short
distances
• Serial Data has to be Modulated/ Demodulated for long
distance transmission

Modem Modem
6
 Introduction to Serial
Communication
• Simplex
• Data transmission in one direction only
• Half Duplex
• Data transmission in both directions
• Either receive or transmit
• Full Duplex
• Data transmission in both directions simultaneously through two
dedicated communication links

7
 Introduction to Serial
Communication
• There are two modes of serial data communication
1. Asynchronous Communication
2. Synchronous Communication

8
 Asynchronous
Communication
• Transmitter & Receiver have separate clocks
• Extra bits are sent with each byte of data
transmitted to synchronize the transmitter and
receiver
• Low Data transmission rates
• Used in transmission of Character Oriented Data
• Each character placed between start and stop bits

9
 Synchronous
Communication
• Transmitter & Receiver share a common clock
• Clocks are kept in sync
• Efficient transmission as only data is transmitted
• Used in transmission of Block oriented data
• High Data transmission rates
• Expensive if separate clock lines are used
• Clock coded with Data

10
 Asynchronous
Communication
• Start Bit • Parity bit is used for simple
• Allows the Receiver to error checking
synchronize • If receiver doesn’t detect
• Sample subsequent data bits stop bit, it reports a
• Stop Bit (1 or 2) ‘framing error’ to the host
• Indicates end of data • When no data is being
• Asynchronous Data Format transmitted, line is idle
• Start Bit • Data transfer rate limited to
• Data Bits (5, 6, 7 or 8) 56kbps
• Parity Bit (optional) (even/odd)
• Stop Bit (one or two)

11
 Asynchronous
Communication
• LSB sent first followed by
other bits
• MSB bit sent last
• Receiver samples data bits
in the middle
 Frequency drift between
the two clocks should not
be more than 10%
• Incoming serial data is
reconstructed in parallel
format
12
 AVR Serial
Communication

13
 AVR USART
• AVR has a built-in serial communication interface
USART (Universal Synchronous Asynchronous
Transmitter Receiver
• It can be configured to operate in four different
modes
1. Normal asynchronous
2. Double-speed asynchronous
3. Master synchronous
4. Slave synchronous
We will study Normal and Double-speed
Asynchronous Modes
14
 AVR USART
• In the AVR microcontroller five registers are
associated with the USART
1. UDR (USART Data Register)
2. UCSRA, UCSRB, UCSRC (USART Control Status
Register)
3. UBRR (USART Baud Rate Register)

15
AVR UBRR (USART Baud
Rate Register)
• AVR supports a number of baud rates at which
serial data can be communicated
• The baud rates are programmable through the
UBRR
• Desired Baud Rate= Fosc/(16(X + 1))
• Where Fosc = Oscillator Frequency
• X = number to be programmed in the UBRR

16
AVR UBRR (USART Baud
Rate Register)
• With Fosc = 8 MHz, find the UBRR value needed to
have the following baud rates 9600, 4800 and 2400
• Desired Baud Rate= Fosc/(16(X + 1))
• X = Fosc/(16 x Desired Baud Rate) – 1
• For 9600: X = 8/(16 x 9600) – 1 = 51.08 = 51
• For 4800: X = 8/(16 x 4800) – 1 = 103.16 = 103
• For 2400: X = 8/(16 x 2400) – 1 = 207.33 = 207

17
AVR UBRR (USART Baud
Rate Register)
• The UBRR register is a 16-bit register split into
• UBRRH 8-bit register
• UBRRL 8-bit register
• 12-bit ‘Desired Baud Rate’ value can be programmed (Bits 0
to 3 of UBRRH and UBRRL)
• Bit 7 of UBRRH, URSEL
• URSEL = 0 Access the UBRRH register
• URSEL = 1 Access the UCSRC register

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 AVR UDR (USART Data
Register)
• AVR provides full-duplex serial communication
• There are two shift registers referred to as
1. Transmit Shift Register
2. Receive Shift Register
• Each shift register is connected to a buffer

19
 AVR UDR (USART Data
Register)
• These buffers are
1. Transmit Data Buffer Register
2. Receive Data Buffer Register
• The two Data Buffer Register share the same I/O address,
and are called USART Data Reg.

20
 AVR UDR (USART Data
Register)
• When data is written to UDR, it will be transferred
to the Transmit Data Buffer (TXB)
• When data is read from UDR, it will return the
contents of the Receive Data Buffer (RXB)

21
AVR UCSR (USART Control
& Status Register)
• UCSRs are 8-bit control registers used for
controlling serial communication in the AVR
• There are three USART Control Status Registers in
the AVR, UCSRA, UCSRB, and UCSRC
• UCSRA
• RXC (Bit 7): Set to 1 by AVR to indicate new
received data
• TXC (Bit 6): Set to 1 by AVR to indicate entire frame
transmitted and UDR is empty
• Flag is reset by writing a 1
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AVR UCSR (USART Control
& Status Register)
• UDRE (Bit 5): The flag indicates if the transmit
buffer (UDR) is ready to receive new data
• If UDRE is one, the buffer is empty, and therefore ready
to be written
• FE (Bit 4): This bit is set if a frame error has
occurred in receiving the next character in the
receive buffer
• A frame error is detected when the first stop bit of the
next character in the receive buffer is zero
• This bit is valid until the receive buffer (UDR) is read

23
AVR UCSR (USART Control
& Status Register)
• DOR (Bit 3): This bit is set if a data overrun is
detected
• A data overrun occurs when the receive data buffer
and receive shift register are full, and a new start
bit is detected
• PE (Bit 2): This bit is set if parity checking was
enabled (UPM1 = 1) and the next character in the
receive buffer had a parity error when received

24
AVR UCSR (USART Control
& Status Register)
• U2X (Bit 1): Setting this bit will double the transfer
rate for asynchronous communication
• MPCM (Bit 0): This bit enables the multi-processor
communication mode
• Notice that FE, DOR, and PE are valid until the
receive buffer (UDR) is read
• Always set these bits to zero when writing to
UCSRA

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AVR UCSR (USART Control
& Status Register)
• UCSRB
• RXCIE (Bit 7): Receive Complete Interrupt Enable
• Set bit to ‘1’ to enable the interrupt on the RXC flag
in UCSRA
• TXCIE (Bit 6): Transmit Complete Interrupt Enable
• Set bit to’1’ to enable the interrupt on the TXC flag
in UCSRA

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AVR UCSR (USART Control
& Status Register)
• UDRIE (Bit 5): USART Data Register Empty Interrupt
Enable
• Set bit to ‘1’ to enable the interrupt on the UDRE
flag in UCSRA
• RXEN (Bit 4): Receive Enable
• Set bit to ‘1’ to enable the USART receiver
• TXEN (Bit 3): Transmit Enable
• Set bit to ‘1’ to enable the USART transmitter

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AVR UCSR (USART Control
& Status Register)
• UCSZ2 (Bit 2): Character Size
• This bit combined with the UCSZ1:0 bits in UCSRC sets
the number of data bits (character size) in a frame
• RXB8 (Bit 1): Receive data bit 8
• This is the ninth data bit of the received character
when using serial frames with nine data bits. NA
• TXB8 (Bit 0): Transmit data bit 8
• This is the ninth data bit of the transmitted character
when using serial frames with nine data bits. NA

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AVR UCSR (USART Control
& Status Register)
• UCSRC
• URSEL (Bit 7): Register Select
• This bit selects to access either the UCSRC or the
UBRRH register
• UMSEL (Bit 6): USART Mode Select
• 0 = Selects Asynchronous mode of operation
• 1 = Selects Synchronous mode of operation

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AVR UCSR (USART Control
& Status Register)
• UPM1:0 (Bit 5:4): Parity Mode
• 00 = Disabled
• 01 = Reserved
• 10 = Even Parity
• 11 = Odd Parity
• USBS (Bit 3): Stop Bit Select
• 0 = Selects 1 Stop bit
• 1 = Selects 2 Stop bits

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AVR UCSR (USART Control
& Status Register)
• UCSZ1:0 (Bit 2:1): Character Size
• These bits combined with the UCSZ2 bit in UCSRB set the
character size in a frame
• UCSZ2 UCSZ1 UCSZ0 Character Size
•0 0 0 5 bits
•0 0 1 6 bits
•0 1 0 7 bits
•0 1 1 8 bits
•1 1 1 9 bits

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AVR UCSR (USART Control
& Status Register)
• UCPOL (Bit 0): Clock Polarity
• This bit is used for synchronous mode only

32
 Example 1
• Configure USART for asynchronous operating mode, 8 data
bits, no parity, and 1 stop bit
• Enable both receive and transmit
• LDI R16, (1<<RXEN) | (1<<TXEN)
• OUT UCSRB, R16
• LDI R16, (1<<UCSZ1) | (1<<UCSZ0) | (1<<URSEL)
• OUT UCSRC, R16

1 1 0
1 0 0 0 0 1 1 33
 Example 2
• Set the baud rate to 1200
• For 1200 bauds X = 415 = 0x19F
• Baud Rate must be programmed in UBRRH and
UBRRL
• Bit 7 of UBRRH should be 0 to allow access to UBRRH
• LDI R16,0x9F
• OUT UBRRL, R16
• LDI R16,0x1

0
• OUT UBRRH,R16
1 1 1 1 1 11 34
 Example 3
• Write a program for the AVR to transfer the letter 'G'
serially at 9600 baud, continuously
• Assume XTAL = 8 MHz
• Algorithm
1. Enable Transmitter Control Reg
2. Initialize character format Control Reg
3. Initialize baud rate Baud Reg
4. Transmit data Data Reg
5. Goto 4
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 LDI R16, 0x8
OUT UCSRB, R16
Example 3LDI R16, 0x86
OUT UCSRC, R16
LDI R16, 0x33
1. Enable Transmitter Control
OUT UBRRL,Reg
R16

2. Initialize character format Control

Reg
3. Initialize baud rate
• 9600 baud rate
1
X = 51 = 0x33
Baud Reg

1 1 1

1 1 1 1 36
 LDI R16, 0x8
OUT UCSRB, R16
LDI R16, 0x86
Example 3 OUT UCSRC, R16
LDI R16, 0x33
OUT UBRRL, R16
4. Transmit data Data
AGAIN:Reg
5. Goto 4 LDI R16, ‘G’
OUT UDR, R16
• What is wrong with the program? RJMP AGAIN
• Have to check if previous character ‘G’ has been transmitted
and buffer is empty before writing the next character
AGAIN:
• Which flag and which register should be checked?
SBIS UCSRA, UDRE
RJMP AGAIN
• UDRE flag = 1 in UCSRA reg LDI R16, ‘G’
• Rewrite the assembly code OUT UDR, R16
RJMP AGAIN

1 37
 Example 4
• Program the AVR in example 3 to receive bytes of data
serially and put them on Port B
• Algorithm
1. Enable Receiver Control Reg
2. Initialize character format Control Reg
3. Initialize Port B as output
4. Initialize baud rate Baud Reg
5. Check Receive flag Control Reg
6. Read data Data Reg
7. Write data to Port B
8. Goto 5 39
 LDI R16, 0x10
OUT UCSRB, R16
Example 4LDI R16, 0x86
OUT UCSRC, R16
LDI R16, 0xFF
1. Enable Receiver Control Reg
OUT DDRB, R16
LDI R16, 0x33
2. Initialize character format OUT UBRRL,Control
R16
Reg
3. Initialize Port B as output
4. Initialize baud rate
• 9600 baud rate
1X = 51 = 0x33 Baud Reg

1 1 1
1 1 1 1 40
 AGAIN:
Example 4 SBIS UCSRA, RXC
RJMP AGAIN
IN R17, UDR
5. Check Receive flag Control
OUT PORTB,Reg
R17
RJMP AGAIN
6. Read data Data Reg
7. Write data to Port B
8. Goto 5

1 41
 Example 5
• Two AVRs are connected together through serial
link to communicate in full-duplex mode
• Port A of AVRs is connected to 8 LEDs
• Port B of AVRs is connected to 8 switches
• Data selected on Port B through switches is
communicated serially to the other processor and
displayed on Port A and vice versa
LE Port A RxD TxD LE
Port A
D D
AVR AVR
S TxD RxD S
W Port B Port B W
T T 42
 Example 5
• When an AVR is powered up it initially transmits a
message ‘YES’ to be displayed on the LEDs of the
other AVR which is followed by exchange of data

43
 Example 5
• Algorithm
1. Initialize Port A and B as output and input ports
2. Setup serial data format
3. Setup Baud rate
4. Transmit ‘YES’ message
5. Check if serial data received
6. If yes then display on Port A
7. Else check if data can be transmitted
8. If yes then read switch from Port B and transmit
9. Goto 5 44
 TRNSMT: LDI R20, 0xFF

Example 5
SBIS USCRA, UDRE OUT DDRA, R20
RJMP TRNSMT LDI R20, 0
OUT UDR, R17 OUT DDRB, R20
RET LDI R16, 0x18
• Program OUT UCSRB, R16
LDI R16, 0x86
1. Initialize Port A and B as output andOUT
input
UCSRC,ports
R16
2. Setup serial data format LDI R16, 0x33
OUT UBRRL, R16
3. Setup Baud rate LDI R17, 'Y'
CALL TRNSMT
4. Transmit ‘YES’ message LDI R17, 'E’
CALL TRNSMT
5. Check if serial data received LDI R17, 'S'
CALL TRNSMT
6. If yes then display on Port A
AGAIN:
SBIS USCRA, RXC
RJMP CHK_TXC
IN R17, UDR
OUT PORTA, R17 45
 Example 5
• Program
7. Else check if data can be transmitted
8. If yes then read switch from Port B AGAIN:
and transmit
SBIS USCRA, RXC
9. Goto 5 RJMP CHK_TXC
IN R17, UDR
OUT PORTA, R17
CHK_TXC:
SBIS USCRA, TXC
RJMP AGAIN
IN R17, PORTB
OUT UDR, R17
RJMP AGAIN
46
 Doubling Baud Rate
• When the AVR is powered up, the U2X bit of the UCSRA
register is zero
• We can set it to high by software and thereby double the
baud rate
• Desired Baud Rate= Fosc/(8(X + 1))
• X = Fosc/(8 x Desired Baud Rate) – 1
• With 8 Mhz
• X = 1 Mhz/Desired Baud Rate – 1

47
 Error in Baud Rate
• In calculating the baud rate integer number are
used for the UBRR register values because AVR
microcontrollers can only use integer values
• By dropping the decimal portion of the calculated
values an error is introduced into the baud rate
• The error is calculated as
• Error=(Calculated value - Integer part)IInteger part
• Error = (51.08 – 51)/51 = 0.16%
• For 0% error 7.3728 or 11.0592 crystals can be used

48
 Interrupt based Serial
Communication
• To enable interrupt based serial communication
1. The Receiver and Transmitter interrupts are
enabled (set to 1) in USCRB register
2. The I bit in the SREG register is set to 1

49
 Example 6
• Two AVRs are connected together through serial
link to communicate in full-duplex mode
• Port A of AVRs is connected to 8 LEDs
• Port B of AVRs is connected to 8 switches
• Data selected on Port B through switches is
communicated serially to the other processor and
displayed on Port A and vice versa
• When an AVR is powered up it initially transmits a
message ‘YES’ to be displayed on the LEDs of the
other AVR which is followed by exchange of data
50
 Example 6
• Algorithm
1. Initialize Port A and B as output and input ports
2. Setup serial data format
3. Setup Baud rate
4. Enable Transmit and Receive interrupts
5. Transmit ‘YES’ message
6. Goto 6

51
 TRNSMT: LDI R20, 0xFF

Example 6
SBIS USCRA, UDRE OUT DDRA, R20
RJMP TRNSMT LDI R20, 0
OUT UDR, R17 OUT DDRB, R20
RET
• Program
LDI R16, 0x86
1. Initialize Port A and B as output andOUT
input
UCSRC,ports
R16
2. Setup serial data format LDI R16, 0x33
OUT UBRRL, R16
3. Setup Baud rate LDI R16, 0xD8
OUT UCSRB, R16
4. Enable Transmit and Receive interrupts
SEI
5. Transmit ‘YES’ message LDI R17, 'Y'
CALL TRNSMT
6. Goto 6 LDI R17, 'E’
CALL TRNSMT
.ORG $300 .ORG $320 LDI R17, 'S'
RX_ISR: TX_ISR: CALL TRNSMT
IN R17, UDR IN R17, PINB
OUT PORTA, R17 OUT UDR, R17 AGAIN:
RETI RETI RJMP AGAIN 52
LDI R20, 0xFF AGAIN: TRNSMT: LDI R20, 0xFF
OUT DDRA, R20 SBIS USCRA, RXC SBIS USCRA, UDRE OUT DDRA, R20
LDI R20, 0 RJMP CHK_TXC RJMP TRNSMT LDI R20, 0
OUT DDRB, R20
LDI R16, 0x18
Comparison
IN R17, UDR
OUT PORTA, R17
OUT UDR, R17
RET
OUT DDRB, R20

OUT UCSRB, R16 CHK_TXC:

LDI R16, 0x86 SBIS USCRA, TXC LDI R16, 0x86
RJMP AGAIN .ORG $320 OUT UCSRC, R16
OUT UCSRC, R16
TX_ISR:
LDI R16, 0x33 IN R17, PORTB LDI R16, 0x33
IN R17, PINB
OUT UBRRL, R16 OUT UDR, R17 OUT UBRRL, R16
OUT UDR, R17
LDI R17, 'Y' RJMP AGAIN RETI LDI R16, 0xD8
CALL TRNSMT OUT UCSRB, R16
LDI R17, 'E’ SEI
CALL TRNSMT .ORG $300 LDI R17, 'Y'
LDI R17, 'S' TRNSMT: RX_ISR: CALL TRNSMT
CALL TRNSMT SBIS USCRA, UDRE IN R17, UDR LDI R17, 'E’
RJMP TRNSMT OUT PORTA, R17
AGAIN: CALL TRNSMT
OUT UDR, R17 RETI
SBIS USCRA, RXC LDI R17, 'S'
RET
RJMP CHK_TXC CALL TRNSMT
IN R17, UDR AGAIN:
OUT PORTA, R17 53 RJMP AGAIN 53
 Summary
• You should be able to do the following
1. Explain the basics of Synchronous and
Asynchronous Communication
2. Explain the working of AVR Asynchronous
Transmitter and Receiver Circuitry
3. Explain the working of AVR Baud Rate generator
4. Program the AVR UART for transmitting and
receiving data through polling-based IO
5. Program the AVR USRT for transmitting and
receiving data through interrupt-based IO
54
 Data Communication
• Data Terminal
Equipment (DTE)
• Host computers at the
transmitter and
receiver ends
• Data Carrier Equipment
(DCE)
• Modems connected to
host computers at the
transmitter and
receiver ends

55
 RS232 Standard for
Serial Communication
• Transmission of Serial Synchronous Data follows
certain set of rules for maintaining compatibility
between all serial devices
• RS232 is the most widely used serial I/O interfacing
standard
• RS232 defines the mechanical connectors
• RS232 defines the electrical signal levels
• RS232 defines the protocol of control signals

56
 RS232 Standard for
Serial Communication
• Mechanical Interface
• RS232-C specification defines a 25-pin connector
(DB25)
• PC uses a subset of RS232-C signals, through a 9-pin
connector (DB9)

57
 RS232 Standard for
Serial Communication
• Electrical Interface
• Logic 1 is represented by -3 to -25 V
• Logic 0 is represented by 3 to 25 V
• Voltage converters MAX232 are used to convert TTL
voltages to RS232 voltage levels and vice versa

58
 RS232 Standard for
Serial Communication
• Protocol of Control Signals
• Indicate the state of transmission media
• Regulate flow of Data
• Modulate/Demodulate data signals for
transmission/reception
• Additional signals control operation of Modem

59
 RS232 Standard for
Serial Communication
• Pin Name Source
• Pin 3 TD (Transmit Data) DTE
• Pin 2 RD (Receive Data) DCE
• Pin 7 RTS (Request to Send) DTE
• Pin 8 CTS (Clear to Send) DCE
• Pin 6 DSR (Data Set Ready) DCE
• Pin 5 SG/GND (Signal Ground)
• Pin 1 DCD/CD (Data Carrier Detect) DCE
• Pin 4 DTR (Data Terminal Ready) DTE
• Pin 9 RI (Ring Indicator) DCE
60
RS232 Standard for Serial
Communication

61
 RS232 Standard for Serial
Communication
• DTR (Data Terminal
Ready) Active-low signal
• When DTE is switched
on the DTR signal is
activated to indicate
availability of DTE

62
 RS232 Standard for Serial
Communication
• DSR (Data Set Ready)
Active-low signal
• When DCE (modem) is
turned on the DSR signal
is activated to indicate
availability of DCE

63
 RS232 Standard for Serial
Communication
• DCD (Data Carrier
Detect) Active-low
signal
• The modem asserts the
signal to indicate that it
has detected a valid
carrier signal and the
two modems are
connected to
communicate

64
 RS232 Standard for Serial
Communication
• RTS (Request to Send)
Active-low signal
• When DTE has a byte to
transmit it activates the
RTS signal

65
 RS232 Standard for Serial
Communication
• CTS (Clear to Send)
Active-low signal
• In response to RTS,
when the modem has
room for storing data it
sends out the CTS signal
to start the transmission

66