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Lecture 1 - Computer System Overview

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Lecture 1 - Computer System Overview

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Operating

Systems:
Internals
and
Chapter 1
Design Computer
Principles
System Overview
Eighth Edition
By William Stallings
Operating System
 Manages hardware resources and
software
 Manages secondary memory and I/O
devices
 Provides a set of services to system users
A modern computer
system
Basic Elements

I/O
Proces Module
sor s

Main System
Memor Bus
y
Processor
Performs the
Controls the
data
operation of
processing
the computer
functions

Referred to as
the Central
Processing
Unit (CPU)
Main Memory
 Volatile

 Contentsof the memory is


lost when the computer is
shut down
 Referredto as real memory
or primary memory
I/O Modules
storage (e.g.
hard drive)
Moves data
between the
computer communicatio
and external ns equipment
environments
such as:
terminals
System Bus

Provides
for
communication among
processors, main
memory, and I/O
modules
Instruction Execution
A program consists of a set of
instructions stored in memory

processor reads
processor
(fetches)
executes each
instructions from
instruction
memory

Two steps
Instruction Fetch
and Execute
 Theprocessor fetches the instruction
from memory
 Program counter (PC) holds address of
the instruction to be fetched next
 PC is incremented after each fetch
Instruction Register
(IR)

 Processor interprets
Fetched instruction is
loaded into the instruction and
Instruction Register performs required
(IR) action:
 Processor-
memory
 Processor-I/O
 Data processing
 Control
Interrupts
 Interrupt
– a signal to the processor emitted by
hardware/software indicating an event needs
immediate attention.
 Interrupt the normal sequencing of the
processor
 Software interrupts, hardware interrupts

 Provided to improve processor utilization


 most I/O devices are slower than the processor
 processor must pause to wait for device
 wasteful use of the processor
Table 1.1 Classes of Interrupts

Program Generated by some condition that occurs


as a result of an instruction execution, such as
arithmetic overflow, division by zero, attempt to
execute an illegal machine instruction, and reference
outside a user's allowed memory space.
Known as traps/exceptions.

Timer Generated by a timer within the processor. This


allows the operating system to perform certain
functions on a regular basis.

I/O Generated by an I/O controller, to signal normal


completion of an operation or to signal a
variety of error conditions.

Hardware Generated by a failure, such as power failure or


memory
Traps vs Interrups
PSW – Program Status
Word
Memory Hierarchy
 Major constraints in memory
 amount
 speed
 expense
 Memory must be able to keep up with the
processor
 Cost of memory must be reasonable in
relationship to the other components
Memory Relationships

Faster Greater
access capacity =
time = smaller cost
greater per bit Greater
cost per capacity =
bit slower
access speed
The Memory Hierarchy
 Going down the
hierarchy:
 decreasing cost per
bit
 increasing capacity
 increasing access time
 decreasing frequency
of access to the
memory by the
Second
ary
Memory

Also referred
to as
auxiliary
memory
• external
• nonvolatile
• used to store
program and
data files
Cache Memory
 Invisible to the OS
 Interacts with other memory management hardware
 Processor must access memory at least once per
instruction cycle
 Processor execution is limited by memory cycle time
 Exploit the principle of locality with a small, fast
memory
I/O Techniques
∗ When the processor encounters an instruction
relating to I/O, it executes that instruction by
issuing a command to the appropriate I/O
module
Three techniques are possible for I/O
operations:

Programme Direct
d I/O Interrupt-
Memory
Driven I/O
(Polling) Access (DMA)
I/O Techniques
Programmed I/O
 The I/O module performs the requested
action then sets the appropriate bits in the
I/O status register
 The processor periodically checks the
status of the I/O module until it determines
the instruction is complete
 With programmed I/O the performance
level of the entire system is severely
degraded
Interrupt-Driven I/O
Processor
issues an
I/O The
command processor
to a module executes the
and then data transfer
goes on to and then
do some resumes its
other useful former
work processing

The I/O module More efficient than


will then interrupt Programmed I/O
the processor to but still requires
request service active intervention
when it is ready to of the processor to
exchange data transfer data
with the processor between memory
and an I/O module
Direct Memory Access
(DMA)
∗ Performed by a separate module on the system
bus or incorporated into an I/O module
When the processor wishes to read or write
data it issues a command to the DMA module
containing:
• whether a read or write is requested
• the address of the I/O device involved
• the starting location in memory to read/write
• the number of words to be read/written
Direct Memory Access
 Transfers the entire block of data
directly to and from memory without
going through the processor
 processor is involved only at the beginning and
end of the transfer
 processor executes more slowly during a transfer
when processor access to the bus is required
 Moreefficient than interrupt-driven or
programmed I/O
Approaches to parallel
processing
 Symmetric Multiprocessors
 Multicore

 Clusters
Symmetric Multiprocessors

(SMP)
Symmetric Multiprocessors

(SMP)
 A stand-alone computer system with
the following characteristics:
 two or more similar processors of comparable capability
 processors share the same main memory and are
interconnected by a bus or other internal connection
scheme
 processors share access to I/O devices
 all processors can perform the same functions
 the system is controlled by an integrated operating system
that provides interaction between processors and their
programs at the job, task, file, and data element levels
SMP Advantages
Performance Scaling
• a system with multiple • vendors can offer a
processors will yield range of products with
greater performance if different price and
work can be done in performance
parallel characteristics

Availability Incremental Growth


• the failure of a single • an additional processor
processor does not halt can be added to
the machine enhance performance
Multicore Computer
 Also known as a chip multiprocessor
 Combines two or more processors
(cores) on a single piece of silicon (die)
 each core consists of all of the
components of an independent processor

Dual-core design with 2 cores on the same


chip
Clusters
 Group of interconnected (by high-speed
LAN) , whole computers working
together as a unified computing
resource
 Illusion is one machine
 System can run on its own
Summary
 Basic Elements  Cache memory
 Evolution of the  Direct memory
microprocessor access
 Instruction execution  Multiprocessor and
 Interrupts multicore
 Interrupts and the organization
instruction cycle  Symmetric
 Interrupt processing multiprocessors
 Multiple interrupts  Multicore computers
 The memory hierarchy  Clusters
REVIEW QUESTIONS
 A) What are interrupts? What is the purpose of interrupts?
What happens when there is an interrupt? Give a specific
example of an interrupt and its purpose.
 B) Describe in your words the following I/O techniques :
Programmed I/O, Interrupt-driven I/O, Direct memory
access (DMA)
 C) Cache Memory – Why do we need the cache when we
already have RAM? Is there an ideal size for a cache
memory?

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