Scribd
Upload
18 views

Lesson 1.1 Introduction To HDL

Uploaded by

Alona Magante
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
18 views

Lesson 1.1 Introduction To HDL

Uploaded by

Alona Magante
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 23

Introduction to HDL

CPEHDL 311
Brief History of HDL
VHDL arose out of the United States government’s Very High
Speed Integrated Circuits (VHSIC) program, it became clear
that there was a need for a standard language for describing
the structure and function of integrated circuits (ICs).

It was subsequently developed further under the support of the


Institute of Electrical and Electronic Engineers (IEEE) and
adopted in the form of the IEEE Standard 1076, Standard VHDL
Language Reference Manual, in 1987.
1. Origins and Development (1980s)
1980: VHDL was initiated as part of the U.S. Department of Defense's Very
High-Speed Integrated Circuit (VHSIC) program. The goal was to create a
standardized language for describing and simulating complex digital systems.

1983: The first version of VHDL, known as VHDL-87, was officially released.
It was designed to be a detailed and versatile language, capable of describing
the behavior and structure of digital systems.
2. Standardization and Growth (1990s)
1993: VHDL-93, an updated version, 1996: The IEEE 1076-1993 standard,
introduced significant improvements based on VHDL-93, was officially
including enhanced support for data adopted by the Institute of Electrical
types, better modeling of and Electronics Engineers (IEEE),
concurrency, and improved syntax for providing a formalized and widely
ease of use. recognized standard for VHDL.
3. Further Enhancements (2000s)
2002: VHDL-2002 brought further
enhancements to the language,
including support for new features 2008: VHDL-2008 introduced
additional features, including
such as the generate statement and
improved support for complex data
improved modeling capabilities. types, better synthesis and
simulation capabilities, and
enhancements to language
constructs.
Recent Developments (2010s-Present)
2019: VHDL-2019 was released, continuing the evolution of the language
with further improvements to data handling and simulation accuracy. It
introduced new features such as better support for assertions and enhanced
modularity.
Current Status
VHDL remains a critical tool in the The language is widely supported by
design and verification of digital various EDA (Electronic Design
circuits, especially in sectors Automation) tools, and its evolution
requiring high reliability and complex reflects ongoing advancements in
system modeling, such as aerospace digital design technology.
and defense.
Key areas where VHDL is currently utilized:
FPGA DESIGN – (FIELD- ASIC DESIGN – (APPLICATION-
PROGRAMMABLE GATE ARRAYS) SPECIFIC INTEGRATED CIRCUITS)
• It allows engineers to create • Engineers use VHDL to simulate
complex digital systems and then and verify the design, ensuring that
program these systems into FPGA it meets the required specifications
devices. before committing to fabrication.
Key areas where VHDL is currently utilized (cont):

EMBEDDED SYSTEMS SYSTEM-LEVEL DESIGN


• VHDL is used to develop custom • This includes the development of
hardware that interfaces with system-on-chip (SoC) designs
microcontrollers or processors, where multiple components are
enhancing the performance and integrated into a single chip.
functionality of the system.
Key areas where VHDL is currently utilized (cont):

SIGNAL PROCESSING AUTOMOTIVE INDUSTRY


• VHDL is applied in digital signal • VHDL is used for designing
processing (DSP) for designing critical control systems, such as
filters, modulators, and other those found in advanced driver-
signal processing units. This is assistance systems (ADAS) and
crucial in telecommunications, engine control units (ECUs).
audio processing, and image
processing applications.
Key areas where VHDL is currently utilized (cont):

TELECOMMUNICATIONS EDUCATIONAL AND RESEARCH


• VHDL is used to design and • VHDL is also used in academic
implement communication settings for teaching digital design
protocols, network interfaces, and principles and in research for
hardware accelerators for exploring new hardware
telecommunications equipment. architectures and methodologies.
Two of the most widely used HDLs are VHDL (VHSIC
Hardware Description Language) and Verilog.
WHAT IS VERILOG?
Verilog is a hardware description
language (HDL) used to model, simulate, and
IEEE industry standard synthesize digital systems. It is a crucial tool
Hardware Description in digital design and verification, allowing
Language (HDL) –used to engineers to describe complex electronic
described a digital system. circuits and systems in a textual form. Verilog
helps in both the design and verification
phases of hardware development.
HISTORY
 Introduced in 1984 by Gateway Design Automation
1989 Cadence purchased Gateway (Verilog-XL simulator)
1990 Cadence released Verilog to the public
Open Verilog International (OVI) was formed to control the language
specifications
1993 OVI released version 2.0
1995 IEE accepted OVI Verilog as standard, Verilog 1364
2001 IEEE revised standard
2005 IEEE accepted new revision for the standard
COMPARISON OF VHDL AND VERILOG

VHDL (VHSIC Hardware Description Language) and


Verilog are two popular hardware description languages
(HDLs) used for designing and simulating digital circuits.
While both serve similar purposes, they have distinct
differences in syntax, style, and features.
ORIGIN AND HISTORY
VHDL VERILOG

Developed in the 1980s by the Developed in the 1980s by Gateway


U.S. Department of Defense as part Design Automation, it was later
of the Very High-Speed Integrated acquired by Cadence Design
Circuit (VHSIC) program. It was Systems. It was designed as a simpler
created to standardize hardware and more intuitive language for
description and simulation. describing hardware.
SYNTAX AND LANGUAGE STYLE
VHDL VERILOG

 Strongly typed and verbose. It has  C-like syntax that is more concise and less
a syntax that is similar to Ada, strict compared to VHDL. It is similar to
and it enforces strict type C/C++ in terms of language structure.
checking.  Uses module to define hardware blocks,
 Uses entity and which tends to be more straightforward and
architecture constructs to less verbose.
define and describe hardware.
 More rigid, which can lead to
more reliable code but requires
more detail.
DESIGN ABSTRACTION LEVELS
VHDL VERILOG

 Provides higher abstraction levels  Focuses more on the lower abstraction levels
and supports both behavioral and and is often preferred for register-transfer
structural descriptions. level (RTL) design.
 Allows for detailed modeling,  Supports both behavioral and structural
including timing and concurrency. modeling but is generally less verbose.
SIMULATION AND SYNTHESIS
VHDL VERILOG

 Tends to be preferred for  Often favored for commercial and consumer


applications requiring rigorous and electronics due to its simplicity and ease of
precise descriptions, such as in use.
military and aerospace systems.
 Widely used in industry, particularly in the
 Simulators and synthesis tools for U.S., and has strong support in simulation
VHDL are well-supported, and its and synthesis tools.
formal specification leads to highly
reliable simulations.
CONCURRENCY AND TIMING
VHDL VERILOG

 Provides more explicit constructs for  Also supports concurrency but with a
handling concurrency and timing, different set of constructs. It may be more
which can lead to more accurate intuitive for designers familiar with software
modeling of complex systems. programming.
LANGUAGE EXTENSIONS AND EVOLUTION
VHDL VERILOG

 Has evolved through several  Initially evolved into SystemVerilog (starting


versions, including VHDL-87, from Verilog-2001), which incorporates
VHDL-93, VHDL-2002, VHDL- object-oriented programming and assertions,
2008, and VHDL-2019, with each providing enhanced modeling capabilities
version adding new features and and verification features.
capabilities.
COMMUNITY AND INDUSTRY USAGE
VHDL VERILOG

 Popular in Europe and for defense  Predominantly used in the U.S. and for
and aerospace industries. The commercial electronics. Its simpler syntax
language's strict type checking and and broader acceptance in industry make it a
detailed syntax cater to high- common choice for practical designs.
reliability applications.
NEXT TOPIC: STRUCTURE OF HDL MODULE

You might also like