Chapter-1 CPU ORGANIZATION
Chapter-1 CPU ORGANIZATION
• Program execution
Cache Memory:
• "... a fully processed result is obtained only after an operand set has
passed through the entire pipeline."
Pipelining:
• A Pipeline is a series of stages, where some work is done at each
stage. The work is not finished until it has passed through all stages.
• Types of Pipelines
• Instructional pipeline
where different stages of an instruction fetch and execution are
handled in a pipeline.
• Arithmetic pipeline
where different stages of an arithmetic operation are handled
along the stages of a pipeline.
Basic Information Types
Fixed- Point Numbers
• Allows limited range of values and have relatively simple hardware
requirements
• Binary Numbers:
-derived from ordinary representation of number
-left side represent number while right side represent fraction
called positional notation(each digit has same weight)
• Hexadecimal Numbers
Floating- Point Numbers
• Allows much larger range of values but require either costly processing
hardware or lengthy software implementations
• Floating point codes used in computers are binary(or binary coded) version
M (Mantissa),
E (Exponent),
B (Base)
Instruction Set
• Instruction Format
• RISC Format
Addressing Modes
• To point the current value V(X) of some operand X used by an
instruction.
1. Immediate Addressing modes MOV R0, #300-opernd is mentioned
directly
2. Direct Addressing modes
MOV R0, X